@@ -1767,6 +1767,7 @@ Kernel response contents:
``ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES`` nested Supported power limit
configuration ranges.
``ETHTOOL_A_PSE_ID`` u32 Index of the PSE
+ ``ETHTOOL_A_PSE_PW_D_ID`` u32 Index of the PSE power domain
========================================== ====== =============================
When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies
@@ -1843,6 +1844,9 @@ equal.
The ``ETHTOOL_A_PSE_ID`` attribute identifies the index of the PSE
controller.
+The ``ETHTOOL_A_PSE_PW_D_ID`` attribute identifies the index of PSE power
+domain.
+
PSE_SET
=======
@@ -980,6 +980,9 @@ static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev,
}
status->pse_id = pcdev->id;
+ if (pcdev->pi[id].pw_d)
+ status->pw_d_id = pcdev->pi[id].pw_d->id;
+
return ops->ethtool_get_status(pcdev, id, extack, status);
}
@@ -42,6 +42,7 @@ struct pse_control_config {
* struct pse_control_status - PSE control/channel status.
*
* @pse_id: index number of the PSE. Set by PSE core.
+ * @pw_d_id: PSE power domain index. Set by PSE core.
* @podl_admin_state: operational state of the PoDL PSE
* functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState
* @podl_pw_status: power detection status of the PoDL PSE.
@@ -64,6 +65,7 @@ struct pse_control_config {
*/
struct pse_control_status {
u32 pse_id;
+ u32 pw_d_id;
enum ethtool_podl_pse_admin_state podl_admin_state;
enum ethtool_podl_pse_pw_d_status podl_pw_status;
enum ethtool_c33_pse_admin_state c33_admin_state;
@@ -972,6 +972,7 @@ enum {
ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, /* u32 */
ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, /* nest - _C33_PSE_PW_LIMIT_* */
ETHTOOL_A_PSE_ID, /* u32 */
+ ETHTOOL_A_PSE_PW_D_ID, /* u32 */
/* add new constants above here */
__ETHTOOL_A_PSE_CNT,
@@ -84,6 +84,8 @@ static int pse_reply_size(const struct ethnl_req_info *req_base,
int len = 0;
len += nla_total_size(sizeof(u32)); /* _PSE_ID */
+ if (st->pw_d_id > 0)
+ len += nla_total_size(sizeof(u32)); /* _PSE_PW_D_ID */
if (st->podl_admin_state > 0)
len += nla_total_size(sizeof(u32)); /* _PODL_PSE_ADMIN_STATE */
if (st->podl_pw_status > 0)
@@ -152,6 +154,11 @@ static int pse_fill_reply(struct sk_buff *skb,
if (nla_put_u32(skb, ETHTOOL_A_PSE_ID, st->pse_id))
return -EMSGSIZE;
+ if (st->pw_d_id > 0 &&
+ nla_put_u32(skb, ETHTOOL_A_PSE_PW_D_ID,
+ st->pw_d_id))
+ return -EMSGSIZE;
+
if (st->podl_admin_state > 0 &&
nla_put_u32(skb, ETHTOOL_A_PODL_PSE_ADMIN_STATE,
st->podl_admin_state))