diff mbox series

[v6,16/28] sfc: obtain root decoder with enough HPA free space

Message ID 20241202171222.62595-17-alejandro.lucero-palau@amd.com (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series cxl: add type2 device basic support | expand

Checks

Context Check Description
netdev/tree_selection success Guessing tree name failed - patch did not apply

Commit Message

Lucero Palau, Alejandro Dec. 2, 2024, 5:12 p.m. UTC
From: Alejandro Lucero <alucerop@amd.com>

Asking for availbale HPA space is the previous step to try to obtain
an HPA range suitable to accel driver purposes.

Add this call to efx cxl initialization.

Signed-off-by: Alejandro Lucero <alucerop@amd.com>
---
 drivers/net/ethernet/sfc/efx_cxl.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

kernel test robot Dec. 3, 2024, 2:34 a.m. UTC | #1
Hi,

kernel test robot noticed the following build warnings:

[auto build test WARNING on e70140ba0d2b1a30467d4af6bcfe761327b9ec95]

url:    https://github.com/intel-lab-lkp/linux/commits/alejandro-lucero-palau-amd-com/cxl-add-type2-device-basic-support/20241203-031134
base:   e70140ba0d2b1a30467d4af6bcfe761327b9ec95
patch link:    https://lore.kernel.org/r/20241202171222.62595-17-alejandro.lucero-palau%40amd.com
patch subject: [PATCH v6 16/28] sfc: obtain root decoder with enough HPA free space
config: openrisc-allyesconfig (https://download.01.org/0day-ci/archive/20241203/202412031010.o6gZQgE3-lkp@intel.com/config)
compiler: or1k-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241203/202412031010.o6gZQgE3-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412031010.o6gZQgE3-lkp@intel.com/

All warnings (new ones prefixed by >>):

   In file included from include/linux/device.h:15,
                    from include/linux/pci.h:37,
                    from include/cxl/cxl.h:8,
                    from drivers/net/ethernet/sfc/efx_cxl.c:12:
   drivers/net/ethernet/sfc/efx_cxl.c: In function 'efx_cxl_init':
>> drivers/net/ethernet/sfc/efx_cxl.c:117:34: warning: format '%llu' expects argument of type 'long long unsigned int', but argument 4 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=]
     117 |                 pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
         |                                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:110:30: note: in definition of macro 'dev_printk_index_wrap'
     110 |                 _p_func(dev, fmt, ##__VA_ARGS__);                       \
         |                              ^~~
   include/linux/dev_printk.h:154:56: note: in expansion of macro 'dev_fmt'
     154 |         dev_printk_index_wrap(_dev_err, KERN_ERR, dev, dev_fmt(fmt), ##__VA_ARGS__)
         |                                                        ^~~~~~~
   include/linux/pci.h:2694:41: note: in expansion of macro 'dev_err'
    2694 | #define pci_err(pdev, fmt, arg...)      dev_err(&(pdev)->dev, fmt, ##arg)
         |                                         ^~~~~~~
   drivers/net/ethernet/sfc/efx_cxl.c:117:17: note: in expansion of macro 'pci_err'
     117 |                 pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
         |                 ^~~~~~~
   drivers/net/ethernet/sfc/efx_cxl.c:117:67: note: format string is defined here
     117 |                 pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
         |                                                                ~~~^
         |                                                                   |
         |                                                                   long long unsigned int
         |                                                                %u


vim +117 drivers/net/ethernet/sfc/efx_cxl.c

    20	
    21	int efx_cxl_init(struct efx_probe_data *probe_data)
    22	{
    23		struct efx_nic *efx = &probe_data->efx;
    24		DECLARE_BITMAP(expected, CXL_MAX_CAPS);
    25		DECLARE_BITMAP(found, CXL_MAX_CAPS);
    26		struct pci_dev *pci_dev;
    27		struct efx_cxl *cxl;
    28		struct resource res;
    29		resource_size_t max;
    30		u16 dvsec;
    31		int rc;
    32	
    33		pci_dev = efx->pci_dev;
    34		probe_data->cxl_pio_initialised = false;
    35	
    36		dvsec = pci_find_dvsec_capability(pci_dev, PCI_VENDOR_ID_CXL,
    37						  CXL_DVSEC_PCIE_DEVICE);
    38		if (!dvsec)
    39			return 0;
    40	
    41		pci_dbg(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability found\n");
    42	
    43		cxl = kzalloc(sizeof(*cxl), GFP_KERNEL);
    44		if (!cxl)
    45			return -ENOMEM;
    46	
    47		cxl->cxlds = cxl_accel_state_create(&pci_dev->dev);
    48		if (IS_ERR(cxl->cxlds)) {
    49			pci_err(pci_dev, "CXL accel device state failed");
    50			rc = -ENOMEM;
    51			goto err1;
    52		}
    53	
    54		cxl_set_dvsec(cxl->cxlds, dvsec);
    55		cxl_set_serial(cxl->cxlds, pci_dev->dev.id);
    56	
    57		res = DEFINE_RES_MEM(0, EFX_CTPIO_BUFFER_SIZE);
    58		if (cxl_set_resource(cxl->cxlds, res, CXL_RES_DPA)) {
    59			pci_err(pci_dev, "cxl_set_resource DPA failed\n");
    60			rc = -EINVAL;
    61			goto err2;
    62		}
    63	
    64		res = DEFINE_RES_MEM_NAMED(0, EFX_CTPIO_BUFFER_SIZE, "ram");
    65		if (cxl_set_resource(cxl->cxlds, res, CXL_RES_RAM)) {
    66			pci_err(pci_dev, "cxl_set_resource RAM failed\n");
    67			rc = -EINVAL;
    68			goto err2;
    69		}
    70	
    71		rc = cxl_pci_accel_setup_regs(pci_dev, cxl->cxlds);
    72		if (rc) {
    73			pci_err(pci_dev, "CXL accel setup regs failed");
    74			goto err2;
    75		}
    76	
    77		bitmap_clear(expected, 0, CXL_MAX_CAPS);
    78		bitmap_set(expected, CXL_DEV_CAP_HDM, 1);
    79		bitmap_set(expected, CXL_DEV_CAP_RAS, 1);
    80	
    81		if (!cxl_pci_check_caps(cxl->cxlds, expected, found)) {
    82			pci_err(pci_dev,
    83				"CXL device capabilities found(%08lx) not as expected(%08lx)",
    84				*found, *expected);
    85			goto err2;
    86		}
    87	
    88		rc = cxl_request_resource(cxl->cxlds, CXL_RES_RAM);
    89		if (rc) {
    90			pci_err(pci_dev, "CXL request resource failed");
    91			goto err2;
    92		}
    93	
    94		/* We do not have the register about media status. Hardware design
    95		 * implies it is ready.
    96		 */
    97		cxl_set_media_ready(cxl->cxlds);
    98	
    99		cxl->cxlmd = devm_cxl_add_memdev(&pci_dev->dev, cxl->cxlds);
   100		if (IS_ERR(cxl->cxlmd)) {
   101			pci_err(pci_dev, "CXL accel memdev creation failed");
   102			rc = PTR_ERR(cxl->cxlmd);
   103			goto err3;
   104		}
   105	
   106		cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd,
   107						   CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
   108						   &max);
   109	
   110		if (IS_ERR(cxl->cxlrd)) {
   111			pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
   112			rc = PTR_ERR(cxl->cxlrd);
   113			goto err3;
   114		}
   115	
   116		if (max < EFX_CTPIO_BUFFER_SIZE) {
 > 117			pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
   118				__func__, max, EFX_CTPIO_BUFFER_SIZE);
   119			rc = -ENOSPC;
   120			goto err3;
   121		}
   122	
   123		probe_data->cxl = cxl;
   124	
   125		return 0;
   126	
   127	err3:
   128		cxl_release_resource(cxl->cxlds, CXL_RES_RAM);
   129	err2:
   130		kfree(cxl->cxlds);
   131	err1:
   132		kfree(cxl);
   133		return rc;
   134	}
   135
Martin Habets Dec. 3, 2024, 2:34 p.m. UTC | #2
On Mon, Dec 02, 2024 at 05:12:10PM +0000, alejandro.lucero-palau@amd.com wrote:
> 
> From: Alejandro Lucero <alucerop@amd.com>
> 
> Asking for availbale HPA space is the previous step to try to obtain
> an HPA range suitable to accel driver purposes.
> 
> Add this call to efx cxl initialization.
> 
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>

Reviewed-by: Martin Habets <habetsm.xilinx@gmail.com>
One comment below.

> ---
>  drivers/net/ethernet/sfc/efx_cxl.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> index d03fa9f9c421..79b93d92f9c2 100644
> --- a/drivers/net/ethernet/sfc/efx_cxl.c
> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> @@ -26,6 +26,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>  	struct pci_dev *pci_dev;
>  	struct efx_cxl *cxl;
>  	struct resource res;
> +	resource_size_t max;
>  	u16 dvsec;
>  	int rc;
>  
> @@ -102,6 +103,23 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>  		goto err3;
>  	}
>  
> +	cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd,
> +					   CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
> +					   &max);
> +
> +	if (IS_ERR(cxl->cxlrd)) {
> +		pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
> +		rc = PTR_ERR(cxl->cxlrd);
> +		goto err3;
> +	}
> +
> +	if (max < EFX_CTPIO_BUFFER_SIZE) {
> +		pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
> +			__func__, max, EFX_CTPIO_BUFFER_SIZE);

Seems it should use %pa[p] for max here.

Martin

> +		rc = -ENOSPC;
> +		goto err3;
> +	}
> +
>  	probe_data->cxl = cxl;
>  
>  	return 0;
> -- 
> 2.17.1
> 
>
Alejandro Lucero Palau Dec. 3, 2024, 3:24 p.m. UTC | #3
On 12/3/24 14:34, Martin Habets wrote:
> On Mon, Dec 02, 2024 at 05:12:10PM +0000, alejandro.lucero-palau@amd.com wrote:
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Asking for availbale HPA space is the previous step to try to obtain
>> an HPA range suitable to accel driver purposes.
>>
>> Add this call to efx cxl initialization.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> Reviewed-by: Martin Habets <habetsm.xilinx@gmail.com>
> One comment below.
>
>> ---
>>   drivers/net/ethernet/sfc/efx_cxl.c | 18 ++++++++++++++++++
>>   1 file changed, 18 insertions(+)
>>
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> index d03fa9f9c421..79b93d92f9c2 100644
>> --- a/drivers/net/ethernet/sfc/efx_cxl.c
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -26,6 +26,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>>   	struct pci_dev *pci_dev;
>>   	struct efx_cxl *cxl;
>>   	struct resource res;
>> +	resource_size_t max;
>>   	u16 dvsec;
>>   	int rc;
>>   
>> @@ -102,6 +103,23 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>>   		goto err3;
>>   	}
>>   
>> +	cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd,
>> +					   CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
>> +					   &max);
>> +
>> +	if (IS_ERR(cxl->cxlrd)) {
>> +		pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
>> +		rc = PTR_ERR(cxl->cxlrd);
>> +		goto err3;
>> +	}
>> +
>> +	if (max < EFX_CTPIO_BUFFER_SIZE) {
>> +		pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
>> +			__func__, max, EFX_CTPIO_BUFFER_SIZE);
> Seems it should use %pa[p] for max here.


Yes, I was looking at how to fix it after the robot warning.

I'll change it.

Thanks


> Martin
>
>> +		rc = -ENOSPC;
>> +		goto err3;
>> +	}
>> +
>>   	probe_data->cxl = cxl;
>>   
>>   	return 0;
>> -- 
>> 2.17.1
>>
>>
Fan Ni Dec. 6, 2024, 9:36 p.m. UTC | #4
On Mon, Dec 02, 2024 at 05:12:10PM +0000, alejandro.lucero-palau@amd.com wrote:
> From: Alejandro Lucero <alucerop@amd.com>
> 
> Asking for availbale HPA space is the previous step to try to obtain
/availbale/available/

Fan
> an HPA range suitable to accel driver purposes.
> 
> Add this call to efx cxl initialization.
> 
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> ---
>  drivers/net/ethernet/sfc/efx_cxl.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> index d03fa9f9c421..79b93d92f9c2 100644
> --- a/drivers/net/ethernet/sfc/efx_cxl.c
> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> @@ -26,6 +26,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>  	struct pci_dev *pci_dev;
>  	struct efx_cxl *cxl;
>  	struct resource res;
> +	resource_size_t max;
>  	u16 dvsec;
>  	int rc;
>  
> @@ -102,6 +103,23 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>  		goto err3;
>  	}
>  
> +	cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd,
> +					   CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
> +					   &max);
> +
> +	if (IS_ERR(cxl->cxlrd)) {
> +		pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
> +		rc = PTR_ERR(cxl->cxlrd);
> +		goto err3;
> +	}
> +
> +	if (max < EFX_CTPIO_BUFFER_SIZE) {
> +		pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
> +			__func__, max, EFX_CTPIO_BUFFER_SIZE);
> +		rc = -ENOSPC;
> +		goto err3;
> +	}
> +
>  	probe_data->cxl = cxl;
>  
>  	return 0;
> -- 
> 2.17.1
>
Alejandro Lucero Palau Dec. 9, 2024, 9:24 a.m. UTC | #5
On 12/6/24 21:36, Fan Ni wrote:
> On Mon, Dec 02, 2024 at 05:12:10PM +0000, alejandro.lucero-palau@amd.com wrote:
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Asking for availbale HPA space is the previous step to try to obtain
> /availbale/available/
>
> Fan


Good catch.

I'll fix it.

Thanks!


>> an HPA range suitable to accel driver purposes.
>>
>> Add this call to efx cxl initialization.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> ---
>>   drivers/net/ethernet/sfc/efx_cxl.c | 18 ++++++++++++++++++
>>   1 file changed, 18 insertions(+)
>>
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> index d03fa9f9c421..79b93d92f9c2 100644
>> --- a/drivers/net/ethernet/sfc/efx_cxl.c
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -26,6 +26,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>>   	struct pci_dev *pci_dev;
>>   	struct efx_cxl *cxl;
>>   	struct resource res;
>> +	resource_size_t max;
>>   	u16 dvsec;
>>   	int rc;
>>   
>> @@ -102,6 +103,23 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>>   		goto err3;
>>   	}
>>   
>> +	cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd,
>> +					   CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
>> +					   &max);
>> +
>> +	if (IS_ERR(cxl->cxlrd)) {
>> +		pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
>> +		rc = PTR_ERR(cxl->cxlrd);
>> +		goto err3;
>> +	}
>> +
>> +	if (max < EFX_CTPIO_BUFFER_SIZE) {
>> +		pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
>> +			__func__, max, EFX_CTPIO_BUFFER_SIZE);
>> +		rc = -ENOSPC;
>> +		goto err3;
>> +	}
>> +
>>   	probe_data->cxl = cxl;
>>   
>>   	return 0;
>> -- 
>> 2.17.1
>>
diff mbox series

Patch

diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
index d03fa9f9c421..79b93d92f9c2 100644
--- a/drivers/net/ethernet/sfc/efx_cxl.c
+++ b/drivers/net/ethernet/sfc/efx_cxl.c
@@ -26,6 +26,7 @@  int efx_cxl_init(struct efx_probe_data *probe_data)
 	struct pci_dev *pci_dev;
 	struct efx_cxl *cxl;
 	struct resource res;
+	resource_size_t max;
 	u16 dvsec;
 	int rc;
 
@@ -102,6 +103,23 @@  int efx_cxl_init(struct efx_probe_data *probe_data)
 		goto err3;
 	}
 
+	cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd,
+					   CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
+					   &max);
+
+	if (IS_ERR(cxl->cxlrd)) {
+		pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
+		rc = PTR_ERR(cxl->cxlrd);
+		goto err3;
+	}
+
+	if (max < EFX_CTPIO_BUFFER_SIZE) {
+		pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
+			__func__, max, EFX_CTPIO_BUFFER_SIZE);
+		rc = -ENOSPC;
+		goto err3;
+	}
+
 	probe_data->cxl = cxl;
 
 	return 0;