| Message ID | 20241202171222.62595-28-alejandro.lucero-palau@amd.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | cxl: add type2 device basic support | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Guessing tree name failed - patch did not apply |
On Mon, Dec 02, 2024 at 05:12:21PM +0000, alejandro.lucero-palau@amd.com wrote: > > From: Alejandro Lucero <alucerop@amd.com> > > The script used to generate these now includes CXL definitions. The number of deleted lines here is expected: we improved the script that gerates these defines so it now omits a lot of data that was not used by the driver. > > Signed-off-by: Alejandro Lucero <alucerop@amd.com> Reviewed-by: Martin Habets <habetsm.xilinx@gmail.com> > --- > drivers/net/ethernet/sfc/mcdi_pcol.h | 13645 +++++++++---------------- > 1 file changed, 4861 insertions(+), 8784 deletions(-) > > diff --git a/drivers/net/ethernet/sfc/mcdi_pcol.h b/drivers/net/ethernet/sfc/mcdi_pcol.h > index cd297e19cddc..5338b430bc31 100644 > --- a/drivers/net/ethernet/sfc/mcdi_pcol.h > +++ b/drivers/net/ethernet/sfc/mcdi_pcol.h > @@ -72,19 +72,19 @@ > * | \------- Error > * \------------------------------ Resync (always set) > * > - * The client writes it's request into MC shared memory, and rings the > - * doorbell. Each request is completed by either by the MC writing > + * The client writes its request into MC shared memory, and rings the > + * doorbell. Each request is completed either by the MC writing > * back into shared memory, or by writing out an event. > * > * All MCDI commands support completion by shared memory response. Each > * request may also contain additional data (accounted for by HEADER.LEN), > - * and some response's may also contain additional data (again, accounted > + * and some responses may also contain additional data (again, accounted > * for by HEADER.LEN). > * > * Some MCDI commands support completion by event, in which any associated > * response data is included in the event. > * > - * The protocol requires one response to be delivered for every request, a > + * The protocol requires one response to be delivered for every request; a > * request should not be sent unless the response for the previous request > * has been received (either by polling shared memory, or by receiving > * an event). > @@ -321,7 +321,7 @@ > /* enum: The requesting client is not a function */ > #define MC_CMD_ERR_CLIENT_NOT_FN 0x100c > /* enum: The requested operation might require the command to be passed between > - * MCs, and thetransport doesn't support that. Should only ever been seen over > + * MCs, and the transport doesn't support that. Should only ever been seen over > * the UART. > */ > #define MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d > @@ -358,7 +358,7 @@ > * sub-variant switching. > */ > #define MC_CMD_ERR_FILTERS_PRESENT 0x1014 > -/* enum: The clock whose frequency you've attempted to set set doesn't exist on > +/* enum: The clock whose frequency you've attempted to set doesn't exist on > * this NIC > */ > #define MC_CMD_ERR_NO_CLOCK 0x1015 > @@ -387,25 +387,6 @@ > */ > #define MC_CMD_ERR_PIOBUFS_PRESENT 0x101b > > -/* MC_CMD_RESOURCE_SPECIFIER enum */ > -/* enum: Any */ > -#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff > -#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */ > - > -/* MC_CMD_FPGA_FLASH_INDEX enum */ > -#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */ > -#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */ > - > -/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */ > -/* enum: Legacy mode as described in XN-200039-TC. */ > -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0 > -/* enum: Switchdev mode as described in XN-200039-TC. */ > -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1 > -/* enum: Bootstrap mode as described in XN-200039-TC. */ > -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2 > -/* enum: Link-mode change is in-progress as described in XN-200039-TC. */ > -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf > - > /* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe > * interfaces. There is a need to refer to interfaces explicitly from drivers > * (for example, a management driver on one interface administering a function > @@ -424,6 +405,14 @@ > * an on-NIC ARM module is expected to be connected. > */ > #define PCIE_INTERFACE_NIC_EMBEDDED 0x1 > +/* enum: The PCIe logical interface 0. It is an alias for HOST_PRIMARY. */ > +#define PCIE_INTERFACE_PCIE_HOST_INTF_0 0x0 > +/* enum: The PCIe logical interface 1. */ > +#define PCIE_INTERFACE_PCIE_HOST_INTF_1 0x2 > +/* enum: The PCIe logical interface 2. */ > +#define PCIE_INTERFACE_PCIE_HOST_INTF_2 0x3 > +/* enum: The PCIe logical interface 3. */ > +#define PCIE_INTERFACE_PCIE_HOST_INTF_3 0x4 > /* enum: For MCDI commands issued over a PCIe interface, this value is > * translated into the interface over which the command was issued. Not > * meaningful for other MCDI transports. > @@ -640,7 +629,11 @@ > * be allocated by different counter blocks, so e.g. AR counter 42 is different > * from CT counter 42. Generation counts are also type-specific. This value is > * also present in the header of streaming counter packets, in the IDENTIFIER > - * field (see packetiser packet format definitions). > + * field (see packetiser packet format definitions). Also note that LACP > + * counter IDs are not allocated individually, instead the counter IDs are > + * directly tied to the LACP balance table indices. These in turn are allocated > + * in large contiguous blocks as a LAG config. Calling MAE_COUNTER_ALLOC/FREE > + * with an LACP counter type will return EPERM. > */ > /* enum: Action Rule counters - can be referenced in AR response. */ > #define MAE_COUNTER_TYPE_AR 0x0 > @@ -648,6 +641,14 @@ > #define MAE_COUNTER_TYPE_CT 0x1 > /* enum: Outer Rule counters - can be referenced in OR response. */ > #define MAE_COUNTER_TYPE_OR 0x2 > +/* enum: LACP counters - linked to LACP balance table entries. */ > +#define MAE_COUNTER_TYPE_LACP 0x3 > + > +/* MAE_COUNTER_ID enum: ID of allocated counter or counter list. */ > +/* enum: A counter ID that is guaranteed never to represent a real counter or > + * counter list. > + */ > +#define MAE_COUNTER_ID_NULL 0xffffffff > > /* TABLE_ID enum: Unique IDs for tables. The 32-bit ID values have been > * structured with bits [31:24] reserved (0), [23:16] indicating which major > @@ -656,7 +657,9 @@ > * variations of the same table. (All of the tables currently defined within > * the streaming engines are listed here, but this does not imply that they are > * all supported - MC_CMD_TABLE_LIST returns the list of actually supported > - * tables.) > + * tables.) The DPU offload engines' enumerators follow a deliberate pattern: > + * 0x01010000 + is_dpu_net * 0x10000 + is_wr_or_tx * 0x8000 + is_lite_pipe * > + * 0x1000 + oe_engine_type * 0x100 + oe_instance_within_pipe * 0x10 > */ > /* enum: Outer_Rule_Table in the MAE - refer to SF-123102-TC. */ > #define TABLE_ID_OUTER_RULE_TABLE 0x10000 > @@ -694,45 +697,70 @@ > #define TABLE_ID_RSS_CONTEXT_TABLE 0x20200 > /* enum: Indirection_Table in VNIC Rx - refer to SF-123102-TC. */ > #define TABLE_ID_INDIRECTION_TABLE 0x20300 > - > -/* TABLE_COMPRESSED_VLAN enum: Compressed VLAN TPID as used by some field > - * types; can be calculated by (((ether_type_msb >> 2) & 0x4) ^ 0x4) | > - * (ether_type_msb & 0x3); > - */ > -#define TABLE_COMPRESSED_VLAN_TPID_8100 0x5 /* enum */ > -#define TABLE_COMPRESSED_VLAN_TPID_88A8 0x4 /* enum */ > -#define TABLE_COMPRESSED_VLAN_TPID_9100 0x1 /* enum */ > -#define TABLE_COMPRESSED_VLAN_TPID_9200 0x2 /* enum */ > -#define TABLE_COMPRESSED_VLAN_TPID_9300 0x3 /* enum */ > - > -/* TABLE_NAT_DIR enum: NAT direction. */ > -#define TABLE_NAT_DIR_SOURCE 0x0 /* enum */ > -#define TABLE_NAT_DIR_DEST 0x1 /* enum */ > - > -/* TABLE_RSS_KEY_MODE enum: Defines how the value for Toeplitz hashing for RSS > - * is constructed as a concatenation (indicated here by "++") of packet header > - * fields. > - */ > -/* enum: IP src addr ++ IP dst addr */ > -#define TABLE_RSS_KEY_MODE_SA_DA 0x0 > -/* enum: IP src addr ++ IP dst addr ++ TCP/UDP src port ++ TCP/UDP dst port */ > -#define TABLE_RSS_KEY_MODE_SA_DA_SP_DP 0x1 > -/* enum: IP src addr */ > -#define TABLE_RSS_KEY_MODE_SA 0x2 > -/* enum: IP dst addr */ > -#define TABLE_RSS_KEY_MODE_DA 0x3 > -/* enum: IP src addr ++ TCP/UDP src port */ > -#define TABLE_RSS_KEY_MODE_SA_SP 0x4 > -/* enum: IP dest addr ++ TCP dest port */ > -#define TABLE_RSS_KEY_MODE_DA_DP 0x5 > -/* enum: Nothing (produces input of 0, resulting in output hash of 0) */ > -#define TABLE_RSS_KEY_MODE_NONE 0x7 > - > -/* TABLE_RSS_SPREAD_MODE enum: RSS spreading mode. */ > -/* enum: RSS uses Indirection_Table lookup. */ > -#define TABLE_RSS_SPREAD_MODE_INDIRECTION 0x0 > -/* enum: RSS uses even spreading calculation. */ > -#define TABLE_RSS_SPREAD_MODE_EVEN 0x1 > +/* enum: DPU.host read pipe first CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_HOST_RD_CRC0_OE_PROFILE 0x1010000 > +/* enum: DPU.host read pipe second CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_HOST_RD_CRC1_OE_PROFILE 0x1010010 > +/* enum: DPU.host write pipe first CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_HOST_WR_CRC0_OE_PROFILE 0x1018000 > +/* enum: DPU.host write pipe second CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_HOST_WR_CRC1_OE_PROFILE 0x1018010 > +/* enum: DPU.net 'full' receive pipe CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_RX_CRC0_OE_PROFILE 0x1020000 > +/* enum: DPU.net 'full' receive pipe first checksum offload engine profiles - > + * refer to XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_RX_CSUM0_OE_PROFILE 0x1020100 > +/* enum: DPU.net 'full' receive pipe second checksum offload engine profiles - > + * refer to XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_RX_CSUM1_OE_PROFILE 0x1020110 > +/* enum: DPU.net 'full' receive pipe AES-GCM offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_RX_AES_GCM0_OE_PROFILE 0x1020200 > +/* enum: DPU.net 'lite' receive pipe CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_RXLITE_CRC0_OE_PROFILE 0x1021000 > +/* enum: DPU.net 'lite' receive pipe checksum offload engine profiles - refer > + * to XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_RXLITE_CSUM0_OE_PROFILE 0x1021100 > +/* enum: DPU.net 'full' transmit pipe CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_TX_CRC0_OE_PROFILE 0x1028000 > +/* enum: DPU.net 'full' transmit pipe first checksum offload engine profiles - > + * refer to XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_TX_CSUM0_OE_PROFILE 0x1028100 > +/* enum: DPU.net 'full' transmit pipe second checksum offload engine profiles - > + * refer to XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_TX_CSUM1_OE_PROFILE 0x1028110 > +/* enum: DPU.net 'full' transmit pipe AES-GCM offload engine profiles - refer > + * to XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_TX_AES_GCM0_OE_PROFILE 0x1028200 > +/* enum: DPU.net 'lite' transmit pipe CRC offload engine profiles - refer to > + * XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_TXLITE_CRC0_OE_PROFILE 0x1029000 > +/* enum: DPU.net 'lite' transmit pipe checksum offload engine profiles - refer > + * to XN-200147-AN. > + */ > +#define TABLE_ID_DPU_NET_TXLITE_CSUM0_OE_PROFILE 0x1029100 > > /* TABLE_FIELD_ID enum: Unique IDs for fields. Related concepts have been > * loosely grouped together into blocks with gaps for expansion, but the values > @@ -1026,6 +1054,16 @@ > #define TABLE_FIELD_ID_BAL_TBL_BASE_DIV64 0xde > /* enum: Length of balance table region: 0=>64, 1=>128, 2=>256. */ > #define TABLE_FIELD_ID_BAL_TBL_LEN_ID 0xdf > +/* enum: LACP LAG ID (i.e. the low 3 bits of LACP LAG mport ID), indexing > + * LACP_LAG_Config_Table. Refer to SF-123102-TC. > + */ > +#define TABLE_FIELD_ID_LACP_LAG_ID 0xe0 > +/* enum: Address in LACP_Balance_Table. The balance table is partitioned > + * between LAGs according to the settings in LACP_LAG_Config_Table and then > + * indexed by the LACP hash, providing the mapping to destination mports. Refer > + * to SF-123102-TC. > + */ > +#define TABLE_FIELD_ID_BAL_TBL_ADDR 0xe1 > /* enum: UDP port to match for UDP-based encapsulations; required to be 0 for > * other encapsulation types. > */ > @@ -1082,6 +1120,55 @@ > #define TABLE_FIELD_ID_INDIR_TBL_LEN_ID 0x105 > /* enum: An offset to be applied to the base destination queue ID. */ > #define TABLE_FIELD_ID_INDIR_OFFSET 0x106 > +/* enum: DPU offload engine profile ID to address. */ > +#define TABLE_FIELD_ID_OE_PROFILE 0x3e8 > +/* enum: Width of the CRC to calculate - see CRC_VARIANT enum. */ > +#define TABLE_FIELD_ID_CRC_VARIANT 0x3f2 > +/* enum: If set, reflect the bits of each input byte, bit 7 is LSB, bit 0 is > + * MSB. If clear, bit 7 is MSB, bit 0 is LSB. > + */ > +#define TABLE_FIELD_ID_CRC_REFIN 0x3f3 > +/* enum: If set, reflect the bits of each output byte, bit 7 is LSB, bit 0 is > + * MSB. If clear, bit 7 is MSB, bit 0 is LSB. > + */ > +#define TABLE_FIELD_ID_CRC_REFOUT 0x3f4 > +/* enum: If set, invert every bit of the output value. */ > +#define TABLE_FIELD_ID_CRC_INVOUT 0x3f5 > +/* enum: The CRC polynomial to use for checksumming, in normal form. */ > +#define TABLE_FIELD_ID_CRC_POLY 0x3f6 > +/* enum: Operation for the checksum engine to perform - see DPU_CSUM_OP enum. > + */ > +#define TABLE_FIELD_ID_CSUM_OP 0x410 > +/* enum: Byte offset of checksum relative to region_start (for VALIDATE_* > + * operations only). > + */ > +#define TABLE_FIELD_ID_CSUM_OFFSET 0x411 > +/* enum: Indicates there is additional data on OPR bus that needs to be > + * incorporated into the payload checksum. > + */ > +#define TABLE_FIELD_ID_CSUM_OPR_ADDITIONAL_DATA 0x412 > +/* enum: Log2 data size of additional data on OPR bus. */ > +#define TABLE_FIELD_ID_CSUM_OPR_DATA_SIZE_LOG2 0x413 > +/* enum: 4 byte offset of where to find the additional data on the OPR bus. */ > +#define TABLE_FIELD_ID_CSUM_OPR_4B_OFF 0x414 > +/* enum: Operation type for the AES-GCM core - see GCM_OP_CODE enum. */ > +#define TABLE_FIELD_ID_GCM_OP_CODE 0x41a > +/* enum: Key length - AES_KEY_LEN enum. */ > +#define TABLE_FIELD_ID_GCM_KEY_LEN 0x41b > +/* enum: OPR 4 byte offset for ICV or GHASH output (only in BULK_* mode) or > + * IPSEC descrypt output. > + */ > +#define TABLE_FIELD_ID_GCM_OPR_4B_OFFSET 0x41c > +/* enum: If OP_CODE is BULK_*, indicates Emit GHASH (Fragment mode). Else, > + * indicates IPSEC-ESN mode. > + */ > +#define TABLE_FIELD_ID_GCM_EMIT_GHASH_ISESN 0x41d > +/* enum: Replay Protection Enable. */ > +#define TABLE_FIELD_ID_GCM_REPLAY_PROTECT_EN 0x41e > +/* enum: IPSEC Encrypt ESP trailer NEXT_HEADER byte. */ > +#define TABLE_FIELD_ID_GCM_NEXT_HDR 0x41f > +/* enum: Replay Window Size. */ > +#define TABLE_FIELD_ID_GCM_REPLAY_WIN_SIZE 0x420 > > /* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100 > * platforms > @@ -1138,6 +1225,24 @@ > #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_OFST 0 > #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN 24 > #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_WIDTH 8 > +#define MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_OFST 0 > +#define MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_LBN 0 > +#define MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_WIDTH 24 > +#define MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_OFST 0 > +#define MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_LBN 24 > +#define MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_WIDTH 7 > +#define MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_OFST 0 > +#define MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_LBN 31 > +#define MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_WIDTH 1 > +#define MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_OFST 0 > +#define MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_LBN 0 > +#define MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_WIDTH 24 > +#define MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_OFST 0 > +#define MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_LBN 24 > +#define MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_WIDTH 7 > +#define MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_OFST 0 > +#define MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_LBN 31 > +#define MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_WIDTH 1 > #define MCDI_EVENT_SENSOREVT_MONITOR_OFST 0 > #define MCDI_EVENT_SENSOREVT_MONITOR_LBN 0 > #define MCDI_EVENT_SENSOREVT_MONITOR_WIDTH 8 > @@ -1237,7 +1342,7 @@ > #define MCDI_EVENT_AOE_FPGA_LOAD_FAILED 0xe > /* enum: Notify that invalid flash type detected */ > #define MCDI_EVENT_AOE_INVALID_FPGA_FLASH_TYPE 0xf > -/* enum: Notify that the attempt to run FPGA Controller firmware timedout */ > +/* enum: Notify that the attempt to run FPGA Controller firmware timed out */ > #define MCDI_EVENT_AOE_FC_RUN_TIMEDOUT 0x10 > /* enum: Failure to probe one or more FPGA boot flash chips */ > #define MCDI_EVENT_AOE_FPGA_BOOT_FLASH_INVALID 0x11 > @@ -1255,7 +1360,7 @@ > #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_WIDTH 8 > /* enum: FC Assert happened, but the register information is not available */ > #define MCDI_EVENT_AOE_ERR_FC_ASSERT_SEEN 0x0 > -/* enum: The register information for FC Assert is ready for readinng by driver > +/* enum: The register information for FC Assert is ready for reading by driver > */ > #define MCDI_EVENT_AOE_ERR_FC_ASSERT_DATA_READY 0x1 > #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_OFST 0 > @@ -1364,6 +1469,12 @@ > #define MCDI_EVENT_MODULECHANGE_SEQ_OFST 0 > #define MCDI_EVENT_MODULECHANGE_SEQ_LBN 30 > #define MCDI_EVENT_MODULECHANGE_SEQ_WIDTH 2 > +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_OFST 0 > +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_LBN 0 > +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_WIDTH 16 > +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_OFST 0 > +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_LBN 16 > +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_WIDTH 16 > #define MCDI_EVENT_DATA_LBN 0 > #define MCDI_EVENT_DATA_WIDTH 32 > /* Alias for PTP_DATA. */ > @@ -1500,6 +1611,31 @@ > * change to the journal. > */ > #define MCDI_EVENT_CODE_MPORT_JOURNAL_CHANGE 0x27 > +/* enum: Notification that a source queue is enabled and attached to its proxy > + * sink queue. SRC field contains the handle of the affected descriptor proxy > + * function. DATA field contains the relative source queue number and absolute > + * VI ID. > + */ > +#define MCDI_EVENT_CODE_DESC_PROXY_FUNC_QUEUE_START 0x28 > +/* enum: Notification of a change in link state and/or link speed of a network > + * port link. This event applies to a network port identified by a handle, > + * PORT_HANDLE, which is discovered by the driver using the MC_CMD_ENUM_PORTS > + * command. > + */ > +#define MCDI_EVENT_CODE_PORT_LINKCHANGE 0x29 > +/* enum: Notification of a change in the state of an MDI (external connector) > + * of a network port. This typically corresponds to module plug/unplug for > + * modular interfaces (e.g., SFP/QSFP and similar) or cable connect/disconnect. > + * This event applies to a network port identified by a handle, PORT_HANDLE, > + * which is discovered by the driver using the MC_CMD_ENUM_PORTS command. > + */ > +#define MCDI_EVENT_CODE_PORT_MODULECHANGE 0x2a > +/* enum: Notification that the port enumeration journal has changed since it > + * was last read and updates can be read using the MC_CMD_ENUM_PORTS command. > + * The firmware may moderate the events so that an event is not sent for every > + * change to the journal. > + */ > +#define MCDI_EVENT_CODE_ENUM_PORTS_CHANGE 0x2b > /* enum: Artificial event generated by host and posted via MC for test > * purposes. > */ > @@ -1512,6 +1648,14 @@ > #define MCDI_EVENT_LINKCHANGE_DATA_LEN 4 > #define MCDI_EVENT_LINKCHANGE_DATA_LBN 0 > #define MCDI_EVENT_LINKCHANGE_DATA_WIDTH 32 > +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_OFST 0 > +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_LEN 4 > +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_LBN 0 > +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_WIDTH 32 > +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_OFST 0 > +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_LEN 4 > +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_LBN 0 > +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_WIDTH 32 > #define MCDI_EVENT_SENSOREVT_DATA_OFST 0 > #define MCDI_EVENT_SENSOREVT_DATA_LEN 4 > #define MCDI_EVENT_SENSOREVT_DATA_LBN 0 > @@ -1668,247 +1812,6 @@ > #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_LBN 0 > #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_WIDTH 32 > > -/* FCDI_EVENT structuredef */ > -#define FCDI_EVENT_LEN 8 > -#define FCDI_EVENT_CONT_LBN 32 > -#define FCDI_EVENT_CONT_WIDTH 1 > -#define FCDI_EVENT_LEVEL_LBN 33 > -#define FCDI_EVENT_LEVEL_WIDTH 3 > -/* enum: Info. */ > -#define FCDI_EVENT_LEVEL_INFO 0x0 > -/* enum: Warning. */ > -#define FCDI_EVENT_LEVEL_WARN 0x1 > -/* enum: Error. */ > -#define FCDI_EVENT_LEVEL_ERR 0x2 > -/* enum: Fatal. */ > -#define FCDI_EVENT_LEVEL_FATAL 0x3 > -#define FCDI_EVENT_DATA_OFST 0 > -#define FCDI_EVENT_DATA_LEN 4 > -#define FCDI_EVENT_LINK_STATE_STATUS_OFST 0 > -#define FCDI_EVENT_LINK_STATE_STATUS_LBN 0 > -#define FCDI_EVENT_LINK_STATE_STATUS_WIDTH 1 > -#define FCDI_EVENT_LINK_DOWN 0x0 /* enum */ > -#define FCDI_EVENT_LINK_UP 0x1 /* enum */ > -#define FCDI_EVENT_DATA_LBN 0 > -#define FCDI_EVENT_DATA_WIDTH 32 > -#define FCDI_EVENT_SRC_LBN 36 > -#define FCDI_EVENT_SRC_WIDTH 8 > -#define FCDI_EVENT_EV_CODE_LBN 60 > -#define FCDI_EVENT_EV_CODE_WIDTH 4 > -#define FCDI_EVENT_CODE_LBN 44 > -#define FCDI_EVENT_CODE_WIDTH 8 > -/* enum: The FC was rebooted. */ > -#define FCDI_EVENT_CODE_REBOOT 0x1 > -/* enum: Bad assert. */ > -#define FCDI_EVENT_CODE_ASSERT 0x2 > -/* enum: DDR3 test result. */ > -#define FCDI_EVENT_CODE_DDR_TEST_RESULT 0x3 > -/* enum: Link status. */ > -#define FCDI_EVENT_CODE_LINK_STATE 0x4 > -/* enum: A timed read is ready to be serviced. */ > -#define FCDI_EVENT_CODE_TIMED_READ 0x5 > -/* enum: One or more PPS IN events */ > -#define FCDI_EVENT_CODE_PPS_IN 0x6 > -/* enum: Tick event from PTP clock */ > -#define FCDI_EVENT_CODE_PTP_TICK 0x7 > -/* enum: ECC error counters */ > -#define FCDI_EVENT_CODE_DDR_ECC_STATUS 0x8 > -/* enum: Current status of PTP */ > -#define FCDI_EVENT_CODE_PTP_STATUS 0x9 > -/* enum: Port id config to map MC-FC port idx */ > -#define FCDI_EVENT_CODE_PORT_CONFIG 0xa > -/* enum: Boot result or error code */ > -#define FCDI_EVENT_CODE_BOOT_RESULT 0xb > -#define FCDI_EVENT_REBOOT_SRC_LBN 36 > -#define FCDI_EVENT_REBOOT_SRC_WIDTH 8 > -#define FCDI_EVENT_REBOOT_FC_FW 0x0 /* enum */ > -#define FCDI_EVENT_REBOOT_FC_BOOTLOADER 0x1 /* enum */ > -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_OFST 0 > -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LEN 4 > -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LBN 0 > -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_WIDTH 32 > -#define FCDI_EVENT_ASSERT_TYPE_LBN 36 > -#define FCDI_EVENT_ASSERT_TYPE_WIDTH 8 > -#define FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_LBN 36 > -#define FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_WIDTH 8 > -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_OFST 0 > -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LEN 4 > -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LBN 0 > -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_WIDTH 32 > -#define FCDI_EVENT_LINK_STATE_DATA_OFST 0 > -#define FCDI_EVENT_LINK_STATE_DATA_LEN 4 > -#define FCDI_EVENT_LINK_STATE_DATA_LBN 0 > -#define FCDI_EVENT_LINK_STATE_DATA_WIDTH 32 > -#define FCDI_EVENT_PTP_STATE_OFST 0 > -#define FCDI_EVENT_PTP_STATE_LEN 4 > -#define FCDI_EVENT_PTP_UNDEFINED 0x0 /* enum */ > -#define FCDI_EVENT_PTP_SETUP_FAILED 0x1 /* enum */ > -#define FCDI_EVENT_PTP_OPERATIONAL 0x2 /* enum */ > -#define FCDI_EVENT_PTP_STATE_LBN 0 > -#define FCDI_EVENT_PTP_STATE_WIDTH 32 > -#define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_LBN 36 > -#define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_WIDTH 8 > -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_OFST 0 > -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LEN 4 > -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LBN 0 > -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_WIDTH 32 > -/* Index of MC port being referred to */ > -#define FCDI_EVENT_PORT_CONFIG_SRC_LBN 36 > -#define FCDI_EVENT_PORT_CONFIG_SRC_WIDTH 8 > -/* FC Port index that matches the MC port index in SRC */ > -#define FCDI_EVENT_PORT_CONFIG_DATA_OFST 0 > -#define FCDI_EVENT_PORT_CONFIG_DATA_LEN 4 > -#define FCDI_EVENT_PORT_CONFIG_DATA_LBN 0 > -#define FCDI_EVENT_PORT_CONFIG_DATA_WIDTH 32 > -#define FCDI_EVENT_BOOT_RESULT_OFST 0 > -#define FCDI_EVENT_BOOT_RESULT_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_AOE/MC_CMD_AOE_OUT_INFO/FC_BOOT_RESULT */ > -#define FCDI_EVENT_BOOT_RESULT_LBN 0 > -#define FCDI_EVENT_BOOT_RESULT_WIDTH 32 > - > -/* FCDI_EXTENDED_EVENT_PPS structuredef: Extended FCDI event to send PPS events > - * to the MC. Note that this structure | is overlayed over a normal FCDI event > - * such that bits 32-63 containing | event code, level, source etc remain the > - * same. In this case the data | field of the header is defined to be the > - * number of timestamps > - */ > -#define FCDI_EXTENDED_EVENT_PPS_LENMIN 16 > -#define FCDI_EXTENDED_EVENT_PPS_LENMAX 248 > -#define FCDI_EXTENDED_EVENT_PPS_LENMAX_MCDI2 1016 > -#define FCDI_EXTENDED_EVENT_PPS_LEN(num) (8+8*(num)) > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_NUM(len) (((len)-8)/8) > -/* Number of timestamps following */ > -#define FCDI_EXTENDED_EVENT_PPS_COUNT_OFST 0 > -#define FCDI_EXTENDED_EVENT_PPS_COUNT_LEN 4 > -#define FCDI_EXTENDED_EVENT_PPS_COUNT_LBN 0 > -#define FCDI_EXTENDED_EVENT_PPS_COUNT_WIDTH 32 > -/* Seconds field of a timestamp record */ > -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_OFST 8 > -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_LEN 4 > -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_LBN 64 > -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_WIDTH 32 > -/* Nanoseconds field of a timestamp record */ > -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_OFST 12 > -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LEN 4 > -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LBN 96 > -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_WIDTH 32 > -/* Timestamp records comprising the event */ > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LBN 64 > -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_WIDTH 64 > - > -/* MUM_EVENT structuredef */ > -#define MUM_EVENT_LEN 8 > -#define MUM_EVENT_CONT_LBN 32 > -#define MUM_EVENT_CONT_WIDTH 1 > -#define MUM_EVENT_LEVEL_LBN 33 > -#define MUM_EVENT_LEVEL_WIDTH 3 > -/* enum: Info. */ > -#define MUM_EVENT_LEVEL_INFO 0x0 > -/* enum: Warning. */ > -#define MUM_EVENT_LEVEL_WARN 0x1 > -/* enum: Error. */ > -#define MUM_EVENT_LEVEL_ERR 0x2 > -/* enum: Fatal. */ > -#define MUM_EVENT_LEVEL_FATAL 0x3 > -#define MUM_EVENT_DATA_OFST 0 > -#define MUM_EVENT_DATA_LEN 4 > -#define MUM_EVENT_SENSOR_ID_OFST 0 > -#define MUM_EVENT_SENSOR_ID_LBN 0 > -#define MUM_EVENT_SENSOR_ID_WIDTH 8 > -/* Enum values, see field(s): */ > -/* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ > -#define MUM_EVENT_SENSOR_STATE_OFST 0 > -#define MUM_EVENT_SENSOR_STATE_LBN 8 > -#define MUM_EVENT_SENSOR_STATE_WIDTH 8 > -#define MUM_EVENT_PORT_PHY_READY_OFST 0 > -#define MUM_EVENT_PORT_PHY_READY_LBN 0 > -#define MUM_EVENT_PORT_PHY_READY_WIDTH 1 > -#define MUM_EVENT_PORT_PHY_LINK_UP_OFST 0 > -#define MUM_EVENT_PORT_PHY_LINK_UP_LBN 1 > -#define MUM_EVENT_PORT_PHY_LINK_UP_WIDTH 1 > -#define MUM_EVENT_PORT_PHY_TX_LOL_OFST 0 > -#define MUM_EVENT_PORT_PHY_TX_LOL_LBN 2 > -#define MUM_EVENT_PORT_PHY_TX_LOL_WIDTH 1 > -#define MUM_EVENT_PORT_PHY_RX_LOL_OFST 0 > -#define MUM_EVENT_PORT_PHY_RX_LOL_LBN 3 > -#define MUM_EVENT_PORT_PHY_RX_LOL_WIDTH 1 > -#define MUM_EVENT_PORT_PHY_TX_LOS_OFST 0 > -#define MUM_EVENT_PORT_PHY_TX_LOS_LBN 4 > -#define MUM_EVENT_PORT_PHY_TX_LOS_WIDTH 1 > -#define MUM_EVENT_PORT_PHY_RX_LOS_OFST 0 > -#define MUM_EVENT_PORT_PHY_RX_LOS_LBN 5 > -#define MUM_EVENT_PORT_PHY_RX_LOS_WIDTH 1 > -#define MUM_EVENT_PORT_PHY_TX_FAULT_OFST 0 > -#define MUM_EVENT_PORT_PHY_TX_FAULT_LBN 6 > -#define MUM_EVENT_PORT_PHY_TX_FAULT_WIDTH 1 > -#define MUM_EVENT_DATA_LBN 0 > -#define MUM_EVENT_DATA_WIDTH 32 > -#define MUM_EVENT_SRC_LBN 36 > -#define MUM_EVENT_SRC_WIDTH 8 > -#define MUM_EVENT_EV_CODE_LBN 60 > -#define MUM_EVENT_EV_CODE_WIDTH 4 > -#define MUM_EVENT_CODE_LBN 44 > -#define MUM_EVENT_CODE_WIDTH 8 > -/* enum: The MUM was rebooted. */ > -#define MUM_EVENT_CODE_REBOOT 0x1 > -/* enum: Bad assert. */ > -#define MUM_EVENT_CODE_ASSERT 0x2 > -/* enum: Sensor failure. */ > -#define MUM_EVENT_CODE_SENSOR 0x3 > -/* enum: Link fault has been asserted, or has cleared. */ > -#define MUM_EVENT_CODE_QSFP_LASI_INTERRUPT 0x4 > -#define MUM_EVENT_SENSOR_DATA_OFST 0 > -#define MUM_EVENT_SENSOR_DATA_LEN 4 > -#define MUM_EVENT_SENSOR_DATA_LBN 0 > -#define MUM_EVENT_SENSOR_DATA_WIDTH 32 > -#define MUM_EVENT_PORT_PHY_FLAGS_OFST 0 > -#define MUM_EVENT_PORT_PHY_FLAGS_LEN 4 > -#define MUM_EVENT_PORT_PHY_FLAGS_LBN 0 > -#define MUM_EVENT_PORT_PHY_FLAGS_WIDTH 32 > -#define MUM_EVENT_PORT_PHY_COPPER_LEN_OFST 0 > -#define MUM_EVENT_PORT_PHY_COPPER_LEN_LEN 4 > -#define MUM_EVENT_PORT_PHY_COPPER_LEN_LBN 0 > -#define MUM_EVENT_PORT_PHY_COPPER_LEN_WIDTH 32 > -#define MUM_EVENT_PORT_PHY_CAPS_OFST 0 > -#define MUM_EVENT_PORT_PHY_CAPS_LEN 4 > -#define MUM_EVENT_PORT_PHY_CAPS_LBN 0 > -#define MUM_EVENT_PORT_PHY_CAPS_WIDTH 32 > -#define MUM_EVENT_PORT_PHY_TECH_OFST 0 > -#define MUM_EVENT_PORT_PHY_TECH_LEN 4 > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_UNKNOWN 0x0 /* enum */ > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_OPTICAL 0x1 /* enum */ > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE 0x2 /* enum */ > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE_EQUALIZED 0x3 /* enum */ > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LIMITING 0x4 /* enum */ > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LINEAR 0x5 /* enum */ > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_BASE_T 0x6 /* enum */ > -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_LOOPBACK_PASSIVE 0x7 /* enum */ > -#define MUM_EVENT_PORT_PHY_TECH_LBN 0 > -#define MUM_EVENT_PORT_PHY_TECH_WIDTH 32 > -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_LBN 36 > -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_WIDTH 4 > -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_FLAGS 0x0 /* enum */ > -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_COPPER_LEN 0x1 /* enum */ > -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_CAPS 0x2 /* enum */ > -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_TECH 0x3 /* enum */ > -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_MAX 0x4 /* enum */ > -#define MUM_EVENT_PORT_PHY_SRC_PORT_NO_LBN 40 > -#define MUM_EVENT_PORT_PHY_SRC_PORT_NO_WIDTH 4 > - > > /***********************************/ > /* MC_CMD_READ32 > @@ -1968,90 +1871,6 @@ > #define MC_CMD_WRITE32_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_COPYCODE > - * Copy MC code between two locations and jump. Note - this command really > - * belongs to INSECURE category but is required by shmboot. The command handler > - * has additional checks to reject insecure calls. > - */ > -#define MC_CMD_COPYCODE 0x3 > -#undef MC_CMD_0x3_PRIVILEGE_CTG > - > -#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_COPYCODE_IN msgrequest */ > -#define MC_CMD_COPYCODE_IN_LEN 16 > -/* Source address > - * > - * The main image should be entered via a copy of a single word from and to a > - * magic address, which controls various aspects of the boot. The magic address > - * is a bitfield, with each bit as documented below. > - */ > -#define MC_CMD_COPYCODE_IN_SRC_ADDR_OFST 0 > -#define MC_CMD_COPYCODE_IN_SRC_ADDR_LEN 4 > -/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT (see below) */ > -#define MC_CMD_COPYCODE_HUNT_NO_MAGIC_ADDR 0x10000 > -/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT and > - * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED (see below) > - */ > -#define MC_CMD_COPYCODE_HUNT_NO_DATAPATH_MAGIC_ADDR 0x1d0d0 > -/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT, > - * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED and BOOT_MAGIC_IGNORE_CONFIG (see > - * below) > - */ > -#define MC_CMD_COPYCODE_HUNT_IGNORE_CONFIG_MAGIC_ADDR 0x1badc > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_OFST 0 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_LBN 17 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_WIDTH 1 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_OFST 0 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_LBN 2 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_WIDTH 1 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_OFST 0 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_LBN 3 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_WIDTH 1 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_OFST 0 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_LBN 4 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_WIDTH 1 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_OFST 0 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_LBN 5 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_WIDTH 1 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_OFST 0 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_LBN 6 > -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_WIDTH 1 > -/* Destination address */ > -#define MC_CMD_COPYCODE_IN_DEST_ADDR_OFST 4 > -#define MC_CMD_COPYCODE_IN_DEST_ADDR_LEN 4 > -#define MC_CMD_COPYCODE_IN_NUMWORDS_OFST 8 > -#define MC_CMD_COPYCODE_IN_NUMWORDS_LEN 4 > -/* Address of where to jump after copy. */ > -#define MC_CMD_COPYCODE_IN_JUMP_OFST 12 > -#define MC_CMD_COPYCODE_IN_JUMP_LEN 4 > -/* enum: Control should return to the caller rather than jumping */ > -#define MC_CMD_COPYCODE_JUMP_NONE 0x1 > - > -/* MC_CMD_COPYCODE_OUT msgresponse */ > -#define MC_CMD_COPYCODE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_SET_FUNC > - * Select function for function-specific commands. > - */ > -#define MC_CMD_SET_FUNC 0x4 > -#undef MC_CMD_0x4_PRIVILEGE_CTG > - > -#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_SET_FUNC_IN msgrequest */ > -#define MC_CMD_SET_FUNC_IN_LEN 4 > -/* Set function */ > -#define MC_CMD_SET_FUNC_IN_FUNC_OFST 0 > -#define MC_CMD_SET_FUNC_IN_FUNC_LEN 4 > - > -/* MC_CMD_SET_FUNC_OUT msgresponse */ > -#define MC_CMD_SET_FUNC_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_GET_BOOT_STATUS > * Get the instruction address from which the MC booted. > @@ -2259,6 +2078,7 @@ > /* Log destination */ > #define MC_CMD_LOG_CTRL_IN_LOG_DEST_OFST 0 > #define MC_CMD_LOG_CTRL_IN_LOG_DEST_LEN 4 > +/* enum property: bitmask */ > /* enum: UART. */ > #define MC_CMD_LOG_CTRL_IN_LOG_DEST_UART 0x1 > /* enum: Event queue. */ > @@ -2304,6 +2124,9 @@ > > /* MC_CMD_GET_VERSION_OUT msgresponse */ > #define MC_CMD_GET_VERSION_OUT_LEN 32 > +/* This is normally the UTC build time in seconds since epoch or one of the > + * special values listed > + */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ > /* Enum values, see field(s): */ > @@ -2326,6 +2149,9 @@ > > /* MC_CMD_GET_VERSION_EXT_OUT msgresponse */ > #define MC_CMD_GET_VERSION_EXT_OUT_LEN 48 > +/* This is normally the UTC build time in seconds since epoch or one of the > + * special values listed > + */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ > /* Enum values, see field(s): */ > @@ -2356,6 +2182,9 @@ > * (depending on which components exist on a particular adapter) > */ > #define MC_CMD_GET_VERSION_V2_OUT_LEN 304 > +/* This is normally the UTC build time in seconds since epoch or one of the > + * special values listed > + */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ > /* Enum values, see field(s): */ > @@ -2495,6 +2324,9 @@ > * (depending on which components exist on a particular adapter) > */ > #define MC_CMD_GET_VERSION_V3_OUT_LEN 328 > +/* This is normally the UTC build time in seconds since epoch or one of the > + * special values listed > + */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ > /* Enum values, see field(s): */ > @@ -2641,6 +2473,9 @@ > * version information > */ > #define MC_CMD_GET_VERSION_V4_OUT_LEN 392 > +/* This is normally the UTC build time in seconds since epoch or one of the > + * special values listed > + */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ > /* Enum values, see field(s): */ > @@ -2803,6 +2638,9 @@ > * and board version information > */ > #define MC_CMD_GET_VERSION_V5_OUT_LEN 424 > +/* This is normally the UTC build time in seconds since epoch or one of the > + * special values listed > + */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ > /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ > /* Enum values, see field(s): */ > @@ -3065,8 +2903,11 @@ > * subscribers. > */ > #define MC_CMD_PTP_OP_SET_SYNC_STATUS 0x1b > -/* enum: Above this for future use. */ > -#define MC_CMD_PTP_OP_MAX 0x1c > +/* enum: X4 and later adapters should use this instead of > + * PTP_OP_TIME_EVENT_SUBSCRIBE. Subscribe to receive periodic time events > + * indicating the current NIC time > + */ > +#define MC_CMD_PTP_OP_TIME_EVENT_SUBSCRIBE_V2 0x1c > > /* MC_CMD_PTP_IN_ENABLE msgrequest */ > #define MC_CMD_PTP_IN_ENABLE_LEN 16 > @@ -3507,6 +3348,22 @@ > #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_OFST 12 > #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_LEN 4 > > +/* MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2 msgrequest */ > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_LEN 16 > +/* MC_CMD_PTP_IN_CMD_OFST 0 */ > +/* MC_CMD_PTP_IN_CMD_LEN 4 */ > +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ > +/* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ > +/* Event queue ID */ > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_QUEUE_ID_OFST 8 > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_QUEUE_ID_LEN 4 > +/* Space for flags. */ > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_FLAGS_OFST 12 > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_FLAGS_LEN 4 > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_OFST 12 > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_LBN 31 > +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_WIDTH 1 > + > /* MC_CMD_PTP_IN_MANFTEST_PPS msgrequest */ > #define MC_CMD_PTP_IN_MANFTEST_PPS_LEN 12 > /* MC_CMD_PTP_IN_CMD_OFST 0 */ > @@ -3940,151 +3797,6 @@ > #define MC_CMD_PTP_OUT_SET_SYNC_STATUS_LEN 0 > > > -/***********************************/ > -/* MC_CMD_CSR_READ32 > - * Read 32bit words from the indirect memory map. > - */ > -#define MC_CMD_CSR_READ32 0xc > -#undef MC_CMD_0xc_PRIVILEGE_CTG > - > -#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_CSR_READ32_IN msgrequest */ > -#define MC_CMD_CSR_READ32_IN_LEN 12 > -/* Address */ > -#define MC_CMD_CSR_READ32_IN_ADDR_OFST 0 > -#define MC_CMD_CSR_READ32_IN_ADDR_LEN 4 > -#define MC_CMD_CSR_READ32_IN_STEP_OFST 4 > -#define MC_CMD_CSR_READ32_IN_STEP_LEN 4 > -#define MC_CMD_CSR_READ32_IN_NUMWORDS_OFST 8 > -#define MC_CMD_CSR_READ32_IN_NUMWORDS_LEN 4 > - > -/* MC_CMD_CSR_READ32_OUT msgresponse */ > -#define MC_CMD_CSR_READ32_OUT_LENMIN 4 > -#define MC_CMD_CSR_READ32_OUT_LENMAX 252 > -#define MC_CMD_CSR_READ32_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_CSR_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4) > -/* The last dword is the status, not a value read */ > -#define MC_CMD_CSR_READ32_OUT_BUFFER_OFST 0 > -#define MC_CMD_CSR_READ32_OUT_BUFFER_LEN 4 > -#define MC_CMD_CSR_READ32_OUT_BUFFER_MINNUM 1 > -#define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM 63 > -#define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM_MCDI2 255 > - > - > -/***********************************/ > -/* MC_CMD_CSR_WRITE32 > - * Write 32bit dwords to the indirect memory map. > - */ > -#define MC_CMD_CSR_WRITE32 0xd > -#undef MC_CMD_0xd_PRIVILEGE_CTG > - > -#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_CSR_WRITE32_IN msgrequest */ > -#define MC_CMD_CSR_WRITE32_IN_LENMIN 12 > -#define MC_CMD_CSR_WRITE32_IN_LENMAX 252 > -#define MC_CMD_CSR_WRITE32_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num)) > -#define MC_CMD_CSR_WRITE32_IN_BUFFER_NUM(len) (((len)-8)/4) > -/* Address */ > -#define MC_CMD_CSR_WRITE32_IN_ADDR_OFST 0 > -#define MC_CMD_CSR_WRITE32_IN_ADDR_LEN 4 > -#define MC_CMD_CSR_WRITE32_IN_STEP_OFST 4 > -#define MC_CMD_CSR_WRITE32_IN_STEP_LEN 4 > -#define MC_CMD_CSR_WRITE32_IN_BUFFER_OFST 8 > -#define MC_CMD_CSR_WRITE32_IN_BUFFER_LEN 4 > -#define MC_CMD_CSR_WRITE32_IN_BUFFER_MINNUM 1 > -#define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM 61 > -#define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM_MCDI2 253 > - > -/* MC_CMD_CSR_WRITE32_OUT msgresponse */ > -#define MC_CMD_CSR_WRITE32_OUT_LEN 4 > -#define MC_CMD_CSR_WRITE32_OUT_STATUS_OFST 0 > -#define MC_CMD_CSR_WRITE32_OUT_STATUS_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_HP > - * These commands are used for HP related features. They are grouped under one > - * MCDI command to avoid creating too many MCDI commands. > - */ > -#define MC_CMD_HP 0x54 > -#undef MC_CMD_0x54_PRIVILEGE_CTG > - > -#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_HP_IN msgrequest */ > -#define MC_CMD_HP_IN_LEN 16 > -/* HP OCSD sub-command. When address is not NULL, request activation of OCSD at > - * the specified address with the specified interval.When address is NULL, > - * INTERVAL is interpreted as a command: 0: stop OCSD / 1: Report OCSD current > - * state / 2: (debug) Show temperature reported by one of the supported > - * sensors. > - */ > -#define MC_CMD_HP_IN_SUBCMD_OFST 0 > -#define MC_CMD_HP_IN_SUBCMD_LEN 4 > -/* enum: OCSD (Option Card Sensor Data) sub-command. */ > -#define MC_CMD_HP_IN_OCSD_SUBCMD 0x0 > -/* enum: Last known valid HP sub-command. */ > -#define MC_CMD_HP_IN_LAST_SUBCMD 0x0 > -/* The address to the array of sensor fields. (Or NULL to use a sub-command.) > - */ > -#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4 > -#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8 > -#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4 > -#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4 > -#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32 > -#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32 > -#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8 > -#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4 > -#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64 > -#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32 > -/* The requested update interval, in seconds. (Or the sub-command if ADDR is > - * NULL.) > - */ > -#define MC_CMD_HP_IN_OCSD_INTERVAL_OFST 12 > -#define MC_CMD_HP_IN_OCSD_INTERVAL_LEN 4 > - > -/* MC_CMD_HP_OUT msgresponse */ > -#define MC_CMD_HP_OUT_LEN 4 > -#define MC_CMD_HP_OUT_OCSD_STATUS_OFST 0 > -#define MC_CMD_HP_OUT_OCSD_STATUS_LEN 4 > -/* enum: OCSD stopped for this card. */ > -#define MC_CMD_HP_OUT_OCSD_STOPPED 0x1 > -/* enum: OCSD was successfully started with the address provided. */ > -#define MC_CMD_HP_OUT_OCSD_STARTED 0x2 > -/* enum: OCSD was already started for this card. */ > -#define MC_CMD_HP_OUT_OCSD_ALREADY_STARTED 0x3 > - > - > -/***********************************/ > -/* MC_CMD_STACKINFO > - * Get stack information. > - */ > -#define MC_CMD_STACKINFO 0xf > -#undef MC_CMD_0xf_PRIVILEGE_CTG > - > -#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_STACKINFO_IN msgrequest */ > -#define MC_CMD_STACKINFO_IN_LEN 0 > - > -/* MC_CMD_STACKINFO_OUT msgresponse */ > -#define MC_CMD_STACKINFO_OUT_LENMIN 12 > -#define MC_CMD_STACKINFO_OUT_LENMAX 252 > -#define MC_CMD_STACKINFO_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_STACKINFO_OUT_LEN(num) (0+12*(num)) > -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_NUM(len) (((len)-0)/12) > -/* (thread ptr, stack size, free space) for each thread in system */ > -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_OFST 0 > -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_LEN 12 > -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MINNUM 1 > -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM 21 > -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM_MCDI2 85 > - > - > /***********************************/ > /* MC_CMD_MDIO_READ > * MDIO register read. > @@ -4181,176 +3893,6 @@ > /* MC_CMD_MDIO_STATUS_GOOD 0x8 */ > > > -/***********************************/ > -/* MC_CMD_DBI_WRITE > - * Write DBI register(s). > - */ > -#define MC_CMD_DBI_WRITE 0x12 > -#undef MC_CMD_0x12_PRIVILEGE_CTG > - > -#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_DBI_WRITE_IN msgrequest */ > -#define MC_CMD_DBI_WRITE_IN_LENMIN 12 > -#define MC_CMD_DBI_WRITE_IN_LENMAX 252 > -#define MC_CMD_DBI_WRITE_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_DBI_WRITE_IN_LEN(num) (0+12*(num)) > -#define MC_CMD_DBI_WRITE_IN_DBIWROP_NUM(len) (((len)-0)/12) > -/* Each write op consists of an address (offset 0), byte enable/VF/CS2 (offset > - * 32) and value (offset 64). See MC_CMD_DBIWROP_TYPEDEF. > - */ > -#define MC_CMD_DBI_WRITE_IN_DBIWROP_OFST 0 > -#define MC_CMD_DBI_WRITE_IN_DBIWROP_LEN 12 > -#define MC_CMD_DBI_WRITE_IN_DBIWROP_MINNUM 1 > -#define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM 21 > -#define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM_MCDI2 85 > - > -/* MC_CMD_DBI_WRITE_OUT msgresponse */ > -#define MC_CMD_DBI_WRITE_OUT_LEN 0 > - > -/* MC_CMD_DBIWROP_TYPEDEF structuredef */ > -#define MC_CMD_DBIWROP_TYPEDEF_LEN 12 > -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_OFST 0 > -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LEN 4 > -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LBN 0 > -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_WIDTH 32 > -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_OFST 4 > -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_LEN 4 > -#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_OFST 4 > -#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_LBN 16 > -#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_WIDTH 16 > -#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_OFST 4 > -#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_LBN 15 > -#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_WIDTH 1 > -#define MC_CMD_DBIWROP_TYPEDEF_CS2_OFST 4 > -#define MC_CMD_DBIWROP_TYPEDEF_CS2_LBN 14 > -#define MC_CMD_DBIWROP_TYPEDEF_CS2_WIDTH 1 > -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_LBN 32 > -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_WIDTH 32 > -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_OFST 8 > -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_LEN 4 > -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_LBN 64 > -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_PORT_READ32 > - * Read a 32-bit register from the indirect port register map. The port to > - * access is implied by the Shared memory channel used. > - */ > -#define MC_CMD_PORT_READ32 0x14 > - > -/* MC_CMD_PORT_READ32_IN msgrequest */ > -#define MC_CMD_PORT_READ32_IN_LEN 4 > -/* Address */ > -#define MC_CMD_PORT_READ32_IN_ADDR_OFST 0 > -#define MC_CMD_PORT_READ32_IN_ADDR_LEN 4 > - > -/* MC_CMD_PORT_READ32_OUT msgresponse */ > -#define MC_CMD_PORT_READ32_OUT_LEN 8 > -/* Value */ > -#define MC_CMD_PORT_READ32_OUT_VALUE_OFST 0 > -#define MC_CMD_PORT_READ32_OUT_VALUE_LEN 4 > -/* Status */ > -#define MC_CMD_PORT_READ32_OUT_STATUS_OFST 4 > -#define MC_CMD_PORT_READ32_OUT_STATUS_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_PORT_WRITE32 > - * Write a 32-bit register to the indirect port register map. The port to > - * access is implied by the Shared memory channel used. > - */ > -#define MC_CMD_PORT_WRITE32 0x15 > - > -/* MC_CMD_PORT_WRITE32_IN msgrequest */ > -#define MC_CMD_PORT_WRITE32_IN_LEN 8 > -/* Address */ > -#define MC_CMD_PORT_WRITE32_IN_ADDR_OFST 0 > -#define MC_CMD_PORT_WRITE32_IN_ADDR_LEN 4 > -/* Value */ > -#define MC_CMD_PORT_WRITE32_IN_VALUE_OFST 4 > -#define MC_CMD_PORT_WRITE32_IN_VALUE_LEN 4 > - > -/* MC_CMD_PORT_WRITE32_OUT msgresponse */ > -#define MC_CMD_PORT_WRITE32_OUT_LEN 4 > -/* Status */ > -#define MC_CMD_PORT_WRITE32_OUT_STATUS_OFST 0 > -#define MC_CMD_PORT_WRITE32_OUT_STATUS_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_PORT_READ128 > - * Read a 128-bit register from the indirect port register map. The port to > - * access is implied by the Shared memory channel used. > - */ > -#define MC_CMD_PORT_READ128 0x16 > - > -/* MC_CMD_PORT_READ128_IN msgrequest */ > -#define MC_CMD_PORT_READ128_IN_LEN 4 > -/* Address */ > -#define MC_CMD_PORT_READ128_IN_ADDR_OFST 0 > -#define MC_CMD_PORT_READ128_IN_ADDR_LEN 4 > - > -/* MC_CMD_PORT_READ128_OUT msgresponse */ > -#define MC_CMD_PORT_READ128_OUT_LEN 20 > -/* Value */ > -#define MC_CMD_PORT_READ128_OUT_VALUE_OFST 0 > -#define MC_CMD_PORT_READ128_OUT_VALUE_LEN 16 > -/* Status */ > -#define MC_CMD_PORT_READ128_OUT_STATUS_OFST 16 > -#define MC_CMD_PORT_READ128_OUT_STATUS_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_PORT_WRITE128 > - * Write a 128-bit register to the indirect port register map. The port to > - * access is implied by the Shared memory channel used. > - */ > -#define MC_CMD_PORT_WRITE128 0x17 > - > -/* MC_CMD_PORT_WRITE128_IN msgrequest */ > -#define MC_CMD_PORT_WRITE128_IN_LEN 20 > -/* Address */ > -#define MC_CMD_PORT_WRITE128_IN_ADDR_OFST 0 > -#define MC_CMD_PORT_WRITE128_IN_ADDR_LEN 4 > -/* Value */ > -#define MC_CMD_PORT_WRITE128_IN_VALUE_OFST 4 > -#define MC_CMD_PORT_WRITE128_IN_VALUE_LEN 16 > - > -/* MC_CMD_PORT_WRITE128_OUT msgresponse */ > -#define MC_CMD_PORT_WRITE128_OUT_LEN 4 > -/* Status */ > -#define MC_CMD_PORT_WRITE128_OUT_STATUS_OFST 0 > -#define MC_CMD_PORT_WRITE128_OUT_STATUS_LEN 4 > - > -/* MC_CMD_CAPABILITIES structuredef */ > -#define MC_CMD_CAPABILITIES_LEN 4 > -/* Small buf table. */ > -#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_LBN 0 > -#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_WIDTH 1 > -/* Turbo mode (for Maranello). */ > -#define MC_CMD_CAPABILITIES_TURBO_LBN 1 > -#define MC_CMD_CAPABILITIES_TURBO_WIDTH 1 > -/* Turbo mode active (for Maranello). */ > -#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_LBN 2 > -#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_WIDTH 1 > -/* PTP offload. */ > -#define MC_CMD_CAPABILITIES_PTP_LBN 3 > -#define MC_CMD_CAPABILITIES_PTP_WIDTH 1 > -/* AOE mode. */ > -#define MC_CMD_CAPABILITIES_AOE_LBN 4 > -#define MC_CMD_CAPABILITIES_AOE_WIDTH 1 > -/* AOE mode active. */ > -#define MC_CMD_CAPABILITIES_AOE_ACTIVE_LBN 5 > -#define MC_CMD_CAPABILITIES_AOE_ACTIVE_WIDTH 1 > -/* AOE mode active. */ > -#define MC_CMD_CAPABILITIES_FC_ACTIVE_LBN 6 > -#define MC_CMD_CAPABILITIES_FC_ACTIVE_WIDTH 1 > -#define MC_CMD_CAPABILITIES_RESERVED_LBN 7 > -#define MC_CMD_CAPABILITIES_RESERVED_WIDTH 25 > - > - > /***********************************/ > /* MC_CMD_GET_BOARD_CFG > * Returns the MC firmware configuration structure. > @@ -4426,112 +3968,6 @@ > #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM_MCDI2 32 > > > -/***********************************/ > -/* MC_CMD_DBI_READX > - * Read DBI register(s) -- extended functionality > - */ > -#define MC_CMD_DBI_READX 0x19 > -#undef MC_CMD_0x19_PRIVILEGE_CTG > - > -#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_DBI_READX_IN msgrequest */ > -#define MC_CMD_DBI_READX_IN_LENMIN 8 > -#define MC_CMD_DBI_READX_IN_LENMAX 248 > -#define MC_CMD_DBI_READX_IN_LENMAX_MCDI2 1016 > -#define MC_CMD_DBI_READX_IN_LEN(num) (0+8*(num)) > -#define MC_CMD_DBI_READX_IN_DBIRDOP_NUM(len) (((len)-0)/8) > -/* Each Read op consists of an address (offset 0), VF/CS2) */ > -#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31 > -#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127 > - > -/* MC_CMD_DBI_READX_OUT msgresponse */ > -#define MC_CMD_DBI_READX_OUT_LENMIN 4 > -#define MC_CMD_DBI_READX_OUT_LENMAX 252 > -#define MC_CMD_DBI_READX_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_DBI_READX_OUT_VALUE_NUM(len) (((len)-0)/4) > -/* Value */ > -#define MC_CMD_DBI_READX_OUT_VALUE_OFST 0 > -#define MC_CMD_DBI_READX_OUT_VALUE_LEN 4 > -#define MC_CMD_DBI_READX_OUT_VALUE_MINNUM 1 > -#define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM 63 > -#define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM_MCDI2 255 > - > -/* MC_CMD_DBIRDOP_TYPEDEF structuredef */ > -#define MC_CMD_DBIRDOP_TYPEDEF_LEN 8 > -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_OFST 0 > -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LEN 4 > -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LBN 0 > -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_WIDTH 32 > -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_OFST 4 > -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LEN 4 > -#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_OFST 4 > -#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_LBN 16 > -#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_WIDTH 16 > -#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_OFST 4 > -#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_LBN 15 > -#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_WIDTH 1 > -#define MC_CMD_DBIRDOP_TYPEDEF_CS2_OFST 4 > -#define MC_CMD_DBIRDOP_TYPEDEF_CS2_LBN 14 > -#define MC_CMD_DBIRDOP_TYPEDEF_CS2_WIDTH 1 > -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LBN 32 > -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_SET_RAND_SEED > - * Set the 16byte seed for the MC pseudo-random generator. > - */ > -#define MC_CMD_SET_RAND_SEED 0x1a > -#undef MC_CMD_0x1a_PRIVILEGE_CTG > - > -#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_SET_RAND_SEED_IN msgrequest */ > -#define MC_CMD_SET_RAND_SEED_IN_LEN 16 > -/* Seed value. */ > -#define MC_CMD_SET_RAND_SEED_IN_SEED_OFST 0 > -#define MC_CMD_SET_RAND_SEED_IN_SEED_LEN 16 > - > -/* MC_CMD_SET_RAND_SEED_OUT msgresponse */ > -#define MC_CMD_SET_RAND_SEED_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_LTSSM_HIST > - * Retrieve the history of the LTSSM, if the build supports it. > - */ > -#define MC_CMD_LTSSM_HIST 0x1b > - > -/* MC_CMD_LTSSM_HIST_IN msgrequest */ > -#define MC_CMD_LTSSM_HIST_IN_LEN 0 > - > -/* MC_CMD_LTSSM_HIST_OUT msgresponse */ > -#define MC_CMD_LTSSM_HIST_OUT_LENMIN 0 > -#define MC_CMD_LTSSM_HIST_OUT_LENMAX 252 > -#define MC_CMD_LTSSM_HIST_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_LTSSM_HIST_OUT_DATA_NUM(len) (((len)-0)/4) > -/* variable number of LTSSM values, as bytes. The history is read-to-clear. */ > -#define MC_CMD_LTSSM_HIST_OUT_DATA_OFST 0 > -#define MC_CMD_LTSSM_HIST_OUT_DATA_LEN 4 > -#define MC_CMD_LTSSM_HIST_OUT_DATA_MINNUM 0 > -#define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM 63 > -#define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM_MCDI2 255 > - > - > /***********************************/ > /* MC_CMD_DRV_ATTACH > * Inform MCPU that this port is managed on the host (i.e. driver active). For > @@ -4705,6 +4141,7 @@ > /* Flags associated with this function */ > #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4 > #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN 4 > +/* enum property: bitshift */ > /* enum: Labels the lowest-numbered function visible to the OS */ > #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY 0x0 > /* enum: The function can control the link state of the physical port it is > @@ -4731,22 +4168,6 @@ > #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TX_ONLY_VI_SPREADING_ENABLED 0x5 > > > -/***********************************/ > -/* MC_CMD_SHMUART > - * Route UART output to circular buffer in shared memory instead. > - */ > -#define MC_CMD_SHMUART 0x1f > - > -/* MC_CMD_SHMUART_IN msgrequest */ > -#define MC_CMD_SHMUART_IN_LEN 4 > -/* ??? */ > -#define MC_CMD_SHMUART_IN_FLAG_OFST 0 > -#define MC_CMD_SHMUART_IN_FLAG_LEN 4 > - > -/* MC_CMD_SHMUART_OUT msgresponse */ > -#define MC_CMD_SHMUART_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_PORT_RESET > * Generic per-port reset. There is no equivalent for per-board reset. Locks > @@ -4789,100 +4210,6 @@ > #define MC_CMD_ENTITY_RESET_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_PCIE_CREDITS > - * Read instantaneous and minimum flow control thresholds. > - */ > -#define MC_CMD_PCIE_CREDITS 0x21 > - > -/* MC_CMD_PCIE_CREDITS_IN msgrequest */ > -#define MC_CMD_PCIE_CREDITS_IN_LEN 8 > -/* poll period. 0 is disabled */ > -#define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_OFST 0 > -#define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_LEN 4 > -/* wipe statistics */ > -#define MC_CMD_PCIE_CREDITS_IN_WIPE_OFST 4 > -#define MC_CMD_PCIE_CREDITS_IN_WIPE_LEN 4 > - > -/* MC_CMD_PCIE_CREDITS_OUT msgresponse */ > -#define MC_CMD_PCIE_CREDITS_OUT_LEN 16 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_OFST 0 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_LEN 2 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_OFST 2 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_LEN 2 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_OFST 4 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_LEN 2 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_OFST 6 > -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_LEN 2 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_OFST 8 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_LEN 2 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_OFST 10 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_LEN 2 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_OFST 12 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_LEN 2 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_OFST 14 > -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_LEN 2 > - > - > -/***********************************/ > -/* MC_CMD_RXD_MONITOR > - * Get histogram of RX queue fill level. > - */ > -#define MC_CMD_RXD_MONITOR 0x22 > - > -/* MC_CMD_RXD_MONITOR_IN msgrequest */ > -#define MC_CMD_RXD_MONITOR_IN_LEN 12 > -#define MC_CMD_RXD_MONITOR_IN_QID_OFST 0 > -#define MC_CMD_RXD_MONITOR_IN_QID_LEN 4 > -#define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_OFST 4 > -#define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_LEN 4 > -#define MC_CMD_RXD_MONITOR_IN_WIPE_OFST 8 > -#define MC_CMD_RXD_MONITOR_IN_WIPE_LEN 4 > - > -/* MC_CMD_RXD_MONITOR_OUT msgresponse */ > -#define MC_CMD_RXD_MONITOR_OUT_LEN 80 > -#define MC_CMD_RXD_MONITOR_OUT_QID_OFST 0 > -#define MC_CMD_RXD_MONITOR_OUT_QID_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_FILL_OFST 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_FILL_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_OFST 8 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_OFST 12 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_OFST 16 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_OFST 20 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_OFST 24 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_OFST 28 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_OFST 32 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_OFST 36 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_OFST 40 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_OFST 44 > -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_OFST 48 > -#define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_OFST 52 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_OFST 56 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_OFST 60 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_OFST 64 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_OFST 68 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_OFST 72 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_LEN 4 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_OFST 76 > -#define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_LEN 4 > - > - > /***********************************/ > /* MC_CMD_PUTS > * Copy the given ASCII string out onto UART and/or out of the network port. > @@ -4931,6 +4258,54 @@ > /* MC_CMD_GET_PHY_CFG_IN msgrequest */ > #define MC_CMD_GET_PHY_CFG_IN_LEN 0 > > +/* MC_CMD_GET_PHY_CFG_IN_V2 msgrequest */ > +#define MC_CMD_GET_PHY_CFG_IN_V2_LEN 8 > +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which > + * identifies a real or virtual network port by MAE port and link end. See the > + * structure definition for more details > + */ > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LEN 8 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LEN 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LBN 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_WIDTH 32 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_OFST 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LEN 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LBN 32 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_OFST 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_LEN 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LEN 8 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_OFST 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LEN 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LBN 0 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_WIDTH 32 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_OFST 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LEN 4 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LBN 32 > +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_WIDTH 32 > + > /* MC_CMD_GET_PHY_CFG_OUT msgresponse */ > #define MC_CMD_GET_PHY_CFG_OUT_LEN 72 > /* flags */ > @@ -5026,6 +4401,9 @@ > #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_OFST 8 > #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN 21 > #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_WIDTH 1 > +#define MC_CMD_PHY_CAP_200000FDX_OFST 8 > +#define MC_CMD_PHY_CAP_200000FDX_LBN 22 > +#define MC_CMD_PHY_CAP_200000FDX_WIDTH 1 > /* ?? */ > #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12 > #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN 4 > @@ -5059,6 +4437,7 @@ > #define MC_CMD_MEDIA_DSFP 0x8 > #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48 > #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN 4 > +/* enum property: bitshift */ > /* enum: Native clause 22 */ > #define MC_CMD_MMD_CLAUSE22 0x0 > #define MC_CMD_MMD_CLAUSE45_PMAPMD 0x1 /* enum */ > @@ -5084,7 +4463,7 @@ > #define MC_CMD_START_BIST 0x25 > #undef MC_CMD_0x25_PRIVILEGE_CTG > > -#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN > +#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND > > /* MC_CMD_START_BIST_IN msgrequest */ > #define MC_CMD_START_BIST_IN_LEN 4 > @@ -5124,7 +4503,7 @@ > #define MC_CMD_POLL_BIST 0x26 > #undef MC_CMD_0x26_PRIVILEGE_CTG > > -#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN > +#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND > > /* MC_CMD_POLL_BIST_IN msgrequest */ > #define MC_CMD_POLL_BIST_IN_LEN 0 > @@ -5320,6 +4699,54 @@ > /* MC_CMD_GET_LOOPBACK_MODES_IN msgrequest */ > #define MC_CMD_GET_LOOPBACK_MODES_IN_LEN 0 > > +/* MC_CMD_GET_LOOPBACK_MODES_IN_V2 msgrequest */ > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_LEN 8 > +/* Target port to request loopback modes for. Uses MAE_LINK_ENDPOINT_SELECTOR > + * which identifies a real or virtual network port by MAE port and link end. > + * See the structure definition for more details > + */ > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LBN 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_OFST 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LBN 32 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_OFST 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LBN 0 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_OFST 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LBN 32 > +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_WIDTH 32 > + > /* MC_CMD_GET_LOOPBACK_MODES_OUT msgresponse */ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_LEN 40 > /* Supported loopbacks. */ > @@ -5333,6 +4760,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32 > +/* enum property: bitshift */ > /* enum: None. */ > #define MC_CMD_LOOPBACK_NONE 0x0 > /* enum: Data. */ > @@ -5422,6 +4850,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported loopbacks. */ > @@ -5435,6 +4864,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported loopbacks. */ > @@ -5448,6 +4878,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported loopbacks. */ > @@ -5461,6 +4892,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > > @@ -5479,6 +4911,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32 > +/* enum property: bitshift */ > /* enum: None. */ > /* MC_CMD_LOOPBACK_NONE 0x0 */ > /* enum: Data. */ > @@ -5568,6 +5001,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported loopbacks. */ > @@ -5581,6 +5015,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported loopbacks. */ > @@ -5594,6 +5029,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported loopbacks. */ > @@ -5607,6 +5043,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported 25G loopbacks. */ > @@ -5620,6 +5057,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported 50 loopbacks. */ > @@ -5633,6 +5071,7 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > /* Supported 100G loopbacks. */ > @@ -5646,40 +5085,1070 @@ > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480 > #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32 > +/* enum property: bitshift */ > /* Enum values, see field(s): */ > /* 100M */ > > -/* AN_TYPE structuredef: Auto-negotiation types defined in IEEE802.3 */ > -#define AN_TYPE_LEN 4 > -#define AN_TYPE_TYPE_OFST 0 > -#define AN_TYPE_TYPE_LEN 4 > -/* enum: None, AN disabled or not supported */ > -#define MC_CMD_AN_NONE 0x0 > -/* enum: Clause 28 - BASE-T */ > -#define MC_CMD_AN_CLAUSE28 0x1 > -/* enum: Clause 37 - BASE-X */ > -#define MC_CMD_AN_CLAUSE37 0x2 > -/* enum: Clause 73 - BASE-R startup protocol for backplane and copper cable > - * assemblies. Includes Clause 72/Clause 92 link-training. > +/* MC_CMD_GET_LOOPBACK_MODES_OUT_V3 msgresponse: Supported loopback modes for > + * newer NICs with 200G support > */ > -#define MC_CMD_AN_CLAUSE73 0x3 > -#define AN_TYPE_TYPE_LBN 0 > -#define AN_TYPE_TYPE_WIDTH 32 > - > -/* FEC_TYPE structuredef: Forward error correction types defined in IEEE802.3 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_LEN 72 > +/* Supported loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_OFST 0 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LBN 0 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_OFST 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LBN 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* enum: None. */ > +/* MC_CMD_LOOPBACK_NONE 0x0 */ > +/* enum: Data. */ > +/* MC_CMD_LOOPBACK_DATA 0x1 */ > +/* enum: GMAC. */ > +/* MC_CMD_LOOPBACK_GMAC 0x2 */ > +/* enum: XGMII. */ > +/* MC_CMD_LOOPBACK_XGMII 0x3 */ > +/* enum: XGXS. */ > +/* MC_CMD_LOOPBACK_XGXS 0x4 */ > +/* enum: XAUI. */ > +/* MC_CMD_LOOPBACK_XAUI 0x5 */ > +/* enum: GMII. */ > +/* MC_CMD_LOOPBACK_GMII 0x6 */ > +/* enum: SGMII. */ > +/* MC_CMD_LOOPBACK_SGMII 0x7 */ > +/* enum: XGBR. */ > +/* MC_CMD_LOOPBACK_XGBR 0x8 */ > +/* enum: XFI. */ > +/* MC_CMD_LOOPBACK_XFI 0x9 */ > +/* enum: XAUI Far. */ > +/* MC_CMD_LOOPBACK_XAUI_FAR 0xa */ > +/* enum: GMII Far. */ > +/* MC_CMD_LOOPBACK_GMII_FAR 0xb */ > +/* enum: SGMII Far. */ > +/* MC_CMD_LOOPBACK_SGMII_FAR 0xc */ > +/* enum: XFI Far. */ > +/* MC_CMD_LOOPBACK_XFI_FAR 0xd */ > +/* enum: GPhy. */ > +/* MC_CMD_LOOPBACK_GPHY 0xe */ > +/* enum: PhyXS. */ > +/* MC_CMD_LOOPBACK_PHYXS 0xf */ > +/* enum: PCS. */ > +/* MC_CMD_LOOPBACK_PCS 0x10 */ > +/* enum: PMA-PMD. */ > +/* MC_CMD_LOOPBACK_PMAPMD 0x11 */ > +/* enum: Cross-Port. */ > +/* MC_CMD_LOOPBACK_XPORT 0x12 */ > +/* enum: XGMII-Wireside. */ > +/* MC_CMD_LOOPBACK_XGMII_WS 0x13 */ > +/* enum: XAUI Wireside. */ > +/* MC_CMD_LOOPBACK_XAUI_WS 0x14 */ > +/* enum: XAUI Wireside Far. */ > +/* MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 */ > +/* enum: XAUI Wireside near. */ > +/* MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 */ > +/* enum: GMII Wireside. */ > +/* MC_CMD_LOOPBACK_GMII_WS 0x17 */ > +/* enum: XFI Wireside. */ > +/* MC_CMD_LOOPBACK_XFI_WS 0x18 */ > +/* enum: XFI Wireside Far. */ > +/* MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 */ > +/* enum: PhyXS Wireside. */ > +/* MC_CMD_LOOPBACK_PHYXS_WS 0x1a */ > +/* enum: PMA lanes MAC-Serdes. */ > +/* MC_CMD_LOOPBACK_PMA_INT 0x1b */ > +/* enum: KR Serdes Parallel (Encoder). */ > +/* MC_CMD_LOOPBACK_SD_NEAR 0x1c */ > +/* enum: KR Serdes Serial. */ > +/* MC_CMD_LOOPBACK_SD_FAR 0x1d */ > +/* enum: PMA lanes MAC-Serdes Wireside. */ > +/* MC_CMD_LOOPBACK_PMA_INT_WS 0x1e */ > +/* enum: KR Serdes Parallel Wireside (Full PCS). */ > +/* MC_CMD_LOOPBACK_SD_FEP2_WS 0x1f */ > +/* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */ > +/* MC_CMD_LOOPBACK_SD_FEP1_5_WS 0x20 */ > +/* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */ > +/* MC_CMD_LOOPBACK_SD_FEP_WS 0x21 */ > +/* enum: KR Serdes Serial Wireside. */ > +/* MC_CMD_LOOPBACK_SD_FES_WS 0x22 */ > +/* enum: Near side of AOE Siena side port */ > +/* MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 */ > +/* enum: Medford Wireside datapath loopback */ > +/* MC_CMD_LOOPBACK_DATA_WS 0x24 */ > +/* enum: Force link up without setting up any physical loopback (snapper use > + * only) > */ > -#define FEC_TYPE_LEN 4 > -#define FEC_TYPE_TYPE_OFST 0 > -#define FEC_TYPE_TYPE_LEN 4 > -/* enum: No FEC */ > -#define MC_CMD_FEC_NONE 0x0 > -/* enum: Clause 74 BASE-R FEC (a.k.a Firecode) */ > -#define MC_CMD_FEC_BASER 0x1 > -/* enum: Clause 91/Clause 108 Reed-Solomon FEC */ > +/* MC_CMD_LOOPBACK_FORCE_EXT_LINK 0x25 */ > +/* Supported loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_OFST 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_OFST 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LBN 64 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_OFST 12 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LBN 96 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > +/* Supported loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_OFST 16 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_OFST 16 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LBN 128 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_OFST 20 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LBN 160 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > +/* Supported loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_OFST 24 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_OFST 24 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LBN 192 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_OFST 28 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LBN 224 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > +/* Supported loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_OFST 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_OFST 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LBN 256 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_OFST 36 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LBN 288 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > +/* Supported 25G loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_OFST 40 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_OFST 40 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LBN 320 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_OFST 44 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LBN 352 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > +/* Supported 50 loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_OFST 48 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_OFST 48 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LBN 384 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_OFST 52 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LBN 416 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > +/* Supported 100G loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_OFST 56 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_OFST 56 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LBN 448 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_OFST 60 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LBN 480 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > +/* Supported 200G loopbacks. */ > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_OFST 64 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LEN 8 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_OFST 64 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LBN 512 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_WIDTH 32 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_OFST 68 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LEN 4 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LBN 544 > +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* 100M */ > + > +/* AN_TYPE structuredef: Auto-negotiation types defined in IEEE802.3 */ > +#define AN_TYPE_LEN 4 > +#define AN_TYPE_TYPE_OFST 0 > +#define AN_TYPE_TYPE_LEN 4 > +/* enum: None, AN disabled or not supported */ > +#define MC_CMD_AN_NONE 0x0 > +/* enum: Clause 28 - BASE-T */ > +#define MC_CMD_AN_CLAUSE28 0x1 > +/* enum: Clause 37 - BASE-X */ > +#define MC_CMD_AN_CLAUSE37 0x2 > +/* enum: Clause 73 - BASE-R startup protocol for backplane and copper cable > + * assemblies. Includes Clause 72/Clause 92 link-training. > + */ > +#define MC_CMD_AN_CLAUSE73 0x3 > +#define AN_TYPE_TYPE_LBN 0 > +#define AN_TYPE_TYPE_WIDTH 32 > + > +/* FEC_TYPE structuredef: Forward error correction types defined in IEEE802.3 > + */ > +#define FEC_TYPE_LEN 4 > +#define FEC_TYPE_TYPE_OFST 0 > +#define FEC_TYPE_TYPE_LEN 4 > +/* enum: No FEC */ > +#define MC_CMD_FEC_NONE 0x0 > +/* enum: IEEE 802.3, Clause 74 BASE-R FEC (a.k.a Firecode) */ > +#define MC_CMD_FEC_BASER 0x1 > +/* enum: IEEE 802.3, Clause 91/Clause 108 Reed-Solomon FEC */ > #define MC_CMD_FEC_RS 0x2 > +/* enum: IEEE 802.3, Clause 161, interleaved RS-FEC sublayer for 100GBASE-R > + * PHYs > + */ > +#define MC_CMD_FEC_IEEE_RS_INT 0x3 > +/* enum: Ethernet Consortium, Low Latency RS-FEC. RS(272, 258). Replaces FEC > + * specified in Clause 119 for 100/200G PHY. Replaces FEC specified in Clause > + * 134 for 50G PHY. > + */ > +#define MC_CMD_FEC_ETCS_RS_LL 0x4 > +/* enum: FEC mode selected automatically */ > +#define MC_CMD_FEC_AUTO 0x5 > #define FEC_TYPE_TYPE_LBN 0 > #define FEC_TYPE_TYPE_WIDTH 32 > > +/* MC_CMD_ETH_TECH structuredef: Ethernet technology as defined by IEEE802.3, > + * Ethernet Technology Consortium, proprietary technologies. The driver must > + * not use technologies labelled NONE and AUTO. > + */ > +#define MC_CMD_ETH_TECH_LEN 16 > +/* The enums in this field can be used either as bitwise indices into a tech > + * mask (e.g. see MC_CMD_ETH_AN_FIELDS/TECH_MASK for example) or as regular > + * enums (e.g. see MC_CMD_LINK_CTRL_IN/ADVERTISED_TECH_ABILITIES_MASK). This > + * structure must be updated to add new technologies when projects that need > + * them arise. An incomplete list of possible expansion in the future include: > + * 100GBASE_KP4, 800GBASE_CR8, 800GBASE_KR8, 800GBASE_DR8, 800GBASE_SR8 > + * 800GBASE_VR8 > + */ > +#define MC_CMD_ETH_TECH_TECH_OFST 0 > +#define MC_CMD_ETH_TECH_TECH_LEN 16 > +/* enum: 1000BASE-KX - 1000BASE-X PCS/PMA over an electrical backplane PMD. See > + * IEEE 802.3 Clause 70 > + */ > +#define MC_CMD_ETH_TECH_1000BASEKX 0x0 > +/* enum: 10GBASE-R - PCS/PMA over an electrical backplane PMD. Refer to IEEE > + * 802.3 Clause 72 > + */ > +#define MC_CMD_ETH_TECH_10GBASE_KR 0x1 > +/* enum: 40GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 > + * Clause 84. > + */ > +#define MC_CMD_ETH_TECH_40GBASE_KR4 0x2 > +/* enum: 40GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD. See > + * IEEE 802.3 Clause 85 > + */ > +#define MC_CMD_ETH_TECH_40GBASE_CR4 0x3 > +/* enum: 40GBASE-R PCS/PMA over 4 lane multimode fiber PMD as specified in > + * Clause 86 > + */ > +#define MC_CMD_ETH_TECH_40GBASE_SR4 0x4 > +/* enum: 40GBASE-R PCS/PMA over 4 WDM lane single mode fiber PMD with long > + * reach. See IEEE 802.3 Clause 87 > + */ > +#define MC_CMD_ETH_TECH_40GBASE_LR4 0x5 > +/* enum: 25GBASE-R PCS/PMA over shielded balanced copper cable PMD. See IEEE > + * 802.3 Clause 110 > + */ > +#define MC_CMD_ETH_TECH_25GBASE_CR 0x6 > +/* enum: 25GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 > + * Clause 111 > + */ > +#define MC_CMD_ETH_TECH_25GBASE_KR 0x7 > +/* enum: 25GBASE-R PCS/PMA over multimode fiber PMD. Refer to IEEE 802.3 Clause > + * 112 > + */ > +#define MC_CMD_ETH_TECH_25GBASE_SR 0x8 > +/* enum: An Ethernet Physical layer operating at 50 Gb/s on twin-axial copper > + * cable. Refer to Ethernet Technology Consortium 25/50G Ethernet Spec. > + */ > +#define MC_CMD_ETH_TECH_50GBASE_CR2 0x9 > +/* enum: An Ethernet Physical layer operating at 50 Gb/s on copper backplane. > + * Refer to Ethernet Technology Consortium 25/50G Ethernet Spec. > + */ > +#define MC_CMD_ETH_TECH_50GBASE_KR2 0xa > +/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 > + * Clause 93 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_KR4 0xb > +/* enum: 100GBASE-R PCS/PMA over 4 lane multimode fiber PMD. See IEEE 802.3 > + * Clause 95 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_SR4 0xc > +/* enum: 100GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD. See > + * IEEE 802.3 Clause 92 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_CR4 0xd > +/* enum: 100GBASE-R PCS/PMA over 4 WDM lane single mode fiber PMD, with > + * long/extended reach,. See IEEE 802.3 Clause 88 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_LR4_ER4 0xe > +/* enum: An Ethernet Physical layer operating at 50 Gb/s on short reach fiber. > + * Refer to Ethernet Technology Consortium 25/50G Ethernet Spec. > + */ > +#define MC_CMD_ETH_TECH_50GBASE_SR2 0xf > +/* enum: 1000BASEX PCS/PMA. See IEEE 802.3 Clause 36 over undefined PMD, duplex > + * mode unknown > + */ > +#define MC_CMD_ETH_TECH_1000BASEX 0x10 > +/* enum: Non-standardised. 10G direct attach */ > +#define MC_CMD_ETH_TECH_10GBASE_CR 0x11 > +/* enum: 10GBASE-SR fiber over 850nm optics. See IEEE 802.3 Clause 52 */ > +#define MC_CMD_ETH_TECH_10GBASE_SR 0x12 > +/* enum: 10GBASE-LR fiber over 1310nm optics. See IEEE 802.3 Clause 52 */ > +#define MC_CMD_ETH_TECH_10GBASE_LR 0x13 > +/* enum: 10GBASE-LRM fiber over 1310 nm optics. See IEEE 802.3 Clause 68 */ > +#define MC_CMD_ETH_TECH_10GBASE_LRM 0x14 > +/* enum: 10GBASE-ER fiber over 1550nm optics. See IEEE 802.3 Clause 52 */ > +#define MC_CMD_ETH_TECH_10GBASE_ER 0x15 > +/* enum: 50GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 > + * Clause 137 > + */ > +#define MC_CMD_ETH_TECH_50GBASE_KR 0x16 > +/* enum: 50GBASE-SR PCS/PMA over multimode fiber PMD as specified in Clause 138 > + */ > +#define MC_CMD_ETH_TECH_50GBASE_SR 0x17 > +/* enum: 50GBASE-CR PCS/PMA over shielded copper balanced cable PMD. See IEEE > + * 802.3 Clause 136 > + */ > +#define MC_CMD_ETH_TECH_50GBASE_CR 0x18 > +/* enum: 50GBASE-R PCS/PMA over single mode fiber PMD as specified in Clause > + * 139. > + */ > +#define MC_CMD_ETH_TECH_50GBASE_LR_ER_FR 0x19 > +/* enum: 100 Gb/s PHY using 100GBASE-R encoding over single-mode fiber with > + * reach up to at least 500 m (see IEEE 802.3 Clause 140) > + */ > +#define MC_CMD_ETH_TECH_50GBASE_DR 0x1a > +/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 > + * Clause 137 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_KR2 0x1b > +/* enum: 100GBASE-R PCS/PMA over 2 lane multimode fiber PMD. See IEEE 802.3 > + * Clause 138 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_SR2 0x1c > +/* enum: 100GBASE-R PCS/PMA over 2 lane shielded copper balanced cable PMD. See > + * IEEE 802.3 Clause 136 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_CR2 0x1d > +/* enum: Unknown source */ > +#define MC_CMD_ETH_TECH_100GBASE_LR2_ER2_FR2 0x1e > +/* enum: Unknown source */ > +#define MC_CMD_ETH_TECH_100GBASE_DR2 0x1f > +/* enum: 200GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 > + * Clause 137 > + */ > +#define MC_CMD_ETH_TECH_200GBASE_KR4 0x20 > +/* enum: 200GBASE-R PCS/PMA over 4 lane multimode fiber PMD. See IEEE 802.3 > + * Clause 138 > + */ > +#define MC_CMD_ETH_TECH_200GBASE_SR4 0x21 > +/* enum: 200GBASE-R PCS/PMA over 4 WDM lane single-mode fiber PMD as specified > + * in Clause 122 > + */ > +#define MC_CMD_ETH_TECH_200GBASE_LR4_ER4_FR4 0x22 > +/* enum: 200GBASE-R PCS/PMA over 4-lane single-mode fiber PMD. See IEEE 802.3 > + * Clause 121 > + */ > +#define MC_CMD_ETH_TECH_200GBASE_DR4 0x23 > +/* enum: 200GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD as > + * specified in Clause 136 > + */ > +#define MC_CMD_ETH_TECH_200GBASE_CR4 0x24 > +/* enum: Ethernet Technology Consortium 400G AN Spec. 400GBASE-KR8 PMD uses > + * 802.3 Clause 137, but the number PMD lanes is 8. > + */ > +#define MC_CMD_ETH_TECH_400GBASE_KR8 0x25 > +/* enum: 400GBASE-R PCS/PMA over 8-lane multimode fiber PMD. See IEEE 802.3 > + * Clause 138 > + */ > +#define MC_CMD_ETH_TECH_400GBASE_SR8 0x26 > +/* enum: 400GBASE-R PCS/PMA over 8 WDM lane single-mode fiber PMD. See IEEE > + * 802.3 Clause 122 > + */ > +#define MC_CMD_ETH_TECH_400GBASE_LR8_ER8_FR8 0x27 > +/* enum: Unknown source */ > +#define MC_CMD_ETH_TECH_400GBASE_DR8 0x28 > +/* enum: Ethernet Technology Consortium 400G AN Spec. 400GBASE-CR8 PMD uses > + * IEEE 802.3 Clause 136, but the number PMD lanes is 8. > + */ > +#define MC_CMD_ETH_TECH_400GBASE_CR8 0x29 > +/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3ck > + * Clause 163. > + */ > +#define MC_CMD_ETH_TECH_100GBASE_KR 0x2a > +/* enum: IEEE 802.3ck. 100G PHY with PMD as specified in Clause 167 over short > + * reach fiber > + */ > +#define MC_CMD_ETH_TECH_100GBASE_SR 0x2b > +/* enum: 100G PMD together with single-mode fiber medium. See IEEE 802.3 Clause > + * 140 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_LR_ER_FR 0x2c > +/* enum: 100GBASE-R PCS/PMA over shielded balanced copper cable PMD. See IEEE > + * 802.3 in Clause 162 IEEE 802.3ck. > + */ > +#define MC_CMD_ETH_TECH_100GBASE_CR 0x2d > +/* enum: 100G PMD together with single-mode fiber medium. See IEEE 802.3 Clause > + * 140 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_DR 0x2e > +/* enum: 200GBASE-R PCS/PMA over an electrical backplane PMD as specified in > + * Clause 163 IEEE 802.3ck > + */ > +#define MC_CMD_ETH_TECH_200GBASE_KR2 0x2f > +/* enum: 200G PHY with PMD as specified in Clause 167 over short reach fiber > + * IEEE 802.3ck > + */ > +#define MC_CMD_ETH_TECH_200GBASE_SR2 0x30 > +/* enum: Unknown source */ > +#define MC_CMD_ETH_TECH_200GBASE_LR2_ER2_FR2 0x31 > +/* enum: Unknown source */ > +#define MC_CMD_ETH_TECH_200GBASE_DR2 0x32 > +/* enum: 200GBASE-R PCS/PMA over 2 lane shielded balanced copper cable PMD as > + * specified in Clause 162 IEEE 802.3ck. > + */ > +#define MC_CMD_ETH_TECH_200GBASE_CR2 0x33 > +/* enum: 400GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 > + * Clause 163 IEEE 802.3ck. > + */ > +#define MC_CMD_ETH_TECH_400GBASE_KR4 0x34 > +/* enum: 400G PHY with PMD over short reach fiber. See Clause 167 of IEEE > + * 802.3ck. > + */ > +#define MC_CMD_ETH_TECH_400GBASE_SR4 0x35 > +/* enum: 400GBASE-R PCS/PMA over 4 WDM lane single-mode fiber PMD. See IEEE > + * 802.3 Clause 151 > + */ > +#define MC_CMD_ETH_TECH_400GBASE_LR4_ER4_FR4 0x36 > +/* enum: 400GBASE-R PCS/PMA over 4-lane single-mode fiber PMD as specified in > + * Clause 124 > + */ > +#define MC_CMD_ETH_TECH_400GBASE_DR4 0x37 > +/* enum: 400GBASE-R PCS/PMA over 4 lane shielded balanced copper cable PMD as > + * specified in Clause 162 of IEEE 802.3ck. > + */ > +#define MC_CMD_ETH_TECH_400GBASE_CR4 0x38 > +/* enum: Automatic tech mode. The driver must not use this. */ > +#define MC_CMD_ETH_TECH_AUTO 0x39 > +/* enum: See IEEE 802.3cc-2017 Clause 114 */ > +#define MC_CMD_ETH_TECH_25GBASE_LR_ER 0x3a > +/* enum: Up to 7 m over twinaxial copper cable assembly (10 lanes, 10 Gbit/s > + * each) See IEEE 802.3ba-2010 Clause 85 > + */ > +#define MC_CMD_ETH_TECH_100GBASE_CR10 0x3b > +/* enum: Invalid tech mode. The driver must not use this. */ > +#define MC_CMD_ETH_TECH_NONE 0x7f > +#define MC_CMD_ETH_TECH_TECH_LBN 0 > +#define MC_CMD_ETH_TECH_TECH_WIDTH 128 > + > +/* MC_CMD_LINK_STATUS_FLAGS structuredef */ > +#define MC_CMD_LINK_STATUS_FLAGS_LEN 8 > +/* Flags used to report the current configuration/state of the link. */ > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_OFST 0 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LEN 8 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_OFST 0 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_LEN 4 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_LBN 0 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_WIDTH 32 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_OFST 4 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_LEN 4 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_LBN 32 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* enum: Whether we have overall link up */ > +#define MC_CMD_LINK_STATUS_FLAGS_LINK_UP 0x0 > +/* enum: If set, the PHY has no external RX link synchronisation */ > +#define MC_CMD_LINK_STATUS_FLAGS_NO_PHY_LINK 0x1 > +/* enum: If set, PMD/MDI is not connected (e.g. cable disconnected, module cage > + * empty) > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMD_MDI_DISCONNECTED 0x2 > +/* enum: Set on error while decoding module data (e.g. module EEPROM does not > + * contain valid values, has checksum errors, etc.) > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMD_BAD 0x3 > +/* enum: Set when module unsupported (e.g. unsupported link rate or link > + * technology) > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMD_UNSUPPORTED 0x4 > +/* enum: Set on error while communicating with the module (e.g. I2C errors > + * while reading EEPROM) > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMD_COMMS_FAULT 0x5 > +/* enum: Set on module overcurrent/overvoltage condition */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMD_POWER_FAULT 0x6 > +/* enum: Set on module overtemperature condition */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMD_THERMAL_FAULT 0x7 > +/* enum: If set, the module is indicating Loss of Signal */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMD_LOS 0x8 > +/* enum: If set, PMA is indicating loss of CDR lock (clock sync) */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMA_NO_CDR_LOCK 0x9 > +/* enum: If set, PMA is indicating loss of analog signal */ > +#define MC_CMD_LINK_STATUS_FLAGS_PMA_LOS 0xa > +/* enum: If set, PCS is indicating loss of block lock */ > +#define MC_CMD_LINK_STATUS_FLAGS_PCS_NO_BLOCK_LOCK 0xb > +/* enum: If set, PCS is indicating loss of alignment marker lock on one or more > + * lanes > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_PCS_NO_AM_LOCK 0xc > +/* enum: If set, PCS is indicating loss of overall alignment lock */ > +#define MC_CMD_LINK_STATUS_FLAGS_PCS_NO_ALIGN_LOCK 0xd > +/* enum: If set, PCS is indicating high bit error rate condition. */ > +#define MC_CMD_LINK_STATUS_FLAGS_PCS_HI_BER 0xe > +/* enum: If set, FEC is indicating loss of FEC lock */ > +#define MC_CMD_LINK_STATUS_FLAGS_FEC_NO_LOCK 0xf > +/* enum: If set, indicates that the number of symbol errors in a 8192-codeword > + * window has exceeded the threshold K (417). > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_FEC_HI_SER 0x10 > +/* enum: If set, the receiver has detected the local FEC has degraded. */ > +#define MC_CMD_LINK_STATUS_FLAGS_FEC_LOCAL_DEGRADED 0x11 > +/* enum: If set, the receiver has detected the remote FEC has degraded. */ > +#define MC_CMD_LINK_STATUS_FLAGS_FEC_RM_DEGRADED 0x12 > +/* enum: If set, the number of symbol errors is over an internal threshold. */ > +#define MC_CMD_LINK_STATUS_FLAGS_FEC_DEGRADED_SER 0x13 > +/* enum: If set, autonegotiation has detected an auto-negotiation capable link > + * partner > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_AN_ABLE 0x14 > +/* enum: If set, autonegotiation base page exchange has failed */ > +#define MC_CMD_LINK_STATUS_FLAGS_AN_BP_FAILED 0x15 > +/* enum: If set, autonegotiation next page exchange has failed */ > +#define MC_CMD_LINK_STATUS_FLAGS_AN_NP_FAILED 0x16 > +/* enum: If set, autonegotiation has failed to negotiate a common set of > + * capabilities > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_AN_NO_HCD 0x17 > +/* enum: If set, local end link training has failed to establish link training > + * frame lock on one or more lanes > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_LT_NO_LOCAL_FRAME_LOCK 0x18 > +/* enum: If set, remote end link training has failed to establish link training > + * frame lock on one or more lanes > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_LT_NO_RM_FRAME_LOCK 0x19 > +/* enum: If set, remote end has failed to assert Receiver Ready (link training > + * success) within the designated timeout > + */ > +#define MC_CMD_LINK_STATUS_FLAGS_LT_NO_RX_READY 0x1a > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LBN 0 > +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_WIDTH 64 > + > +/* MC_CMD_PAUSE_MODE structuredef */ > +#define MC_CMD_PAUSE_MODE_LEN 1 > +#define MC_CMD_PAUSE_MODE_TYPE_OFST 0 > +#define MC_CMD_PAUSE_MODE_TYPE_LEN 1 > +/* enum: See IEEE 802.3 Clause 73.6.6 */ > +#define MC_CMD_PAUSE_MODE_AN_PAUSE 0x0 > +/* enum: See IEEE 802.3 Clause 73.6.6 */ > +#define MC_CMD_PAUSE_MODE_AN_ASYM_DIR 0x1 > +#define MC_CMD_PAUSE_MODE_TYPE_LBN 0 > +#define MC_CMD_PAUSE_MODE_TYPE_WIDTH 8 > + > +/* MC_CMD_ETH_AN_FIELDS structuredef: Fields used for IEEE 802.3 Clause 73 > + * Auto-Negotiation. Warning - This is fixed size and cannot be extended. This > + * structure is used to define autonegotiable abilities (advertised, link > + * partner and supported abilities). > + */ > +#define MC_CMD_ETH_AN_FIELDS_LEN 25 > +/* Mask of Ethernet technologies. The bit indices in this mask are taken from > + * the TECH field in the MC_CMD_ETH_TECH structure. > + */ > +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_OFST 0 > +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_LEN 16 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_ETH_TECH/TECH */ > +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_LBN 0 > +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_WIDTH 128 > +/* Mask of supported FEC modes */ > +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_OFST 16 > +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* FEC_TYPE/TYPE */ > +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_LBN 128 > +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_WIDTH 32 > +/* Mask of requested FEC modes */ > +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_OFST 20 > +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* FEC_TYPE/TYPE */ > +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_LBN 160 > +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_WIDTH 32 > +/* Bitmask of negotiated pause modes */ > +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_OFST 24 > +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_LEN 1 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_PAUSE_MODE/TYPE */ > +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_LBN 192 > +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_WIDTH 8 > + > +/* MC_CMD_LOOPBACK_V2 structuredef: Loopback modes for use with the new > + * MC_CMD_LINK_CTRL and MC_CMD_LINK_STATE. These loopback modes are not > + * supported in other getlink/setlink commands. > + */ > +#define MC_CMD_LOOPBACK_V2_LEN 4 > +#define MC_CMD_LOOPBACK_V2_MODE_OFST 0 > +#define MC_CMD_LOOPBACK_V2_MODE_LEN 4 > +/* enum: No loopback */ > +#define MC_CMD_LOOPBACK_V2_NONE 0x0 > +/* enum: Let firmware choose a supported loopback mode */ > +#define MC_CMD_LOOPBACK_V2_AUTO 0x1 > +/* enum: Loopback after the MAC */ > +#define MC_CMD_LOOPBACK_V2_POST_MAC 0x2 > +/* enum: Loopback after the PCS */ > +#define MC_CMD_LOOPBACK_V2_POST_PCS 0x3 > +/* enum: Loopback after the PMA */ > +#define MC_CMD_LOOPBACK_V2_POST_PMA 0x4 > +/* enum: Loopback after the MDI Wireside */ > +#define MC_CMD_LOOPBACK_V2_POST_MDI_WS 0x5 > +/* enum: Loopback after the PMA Wireside */ > +#define MC_CMD_LOOPBACK_V2_POST_PMA_WS 0x6 > +/* enum: Loopback after the PCS Wireside */ > +#define MC_CMD_LOOPBACK_V2_POST_PCS_WS 0x7 > +/* enum: Loopback after the MAC Wireside */ > +#define MC_CMD_LOOPBACK_V2_POST_MAC_WS 0x8 > +/* enum: Loopback after the MAC FIFOs (before the MAC) */ > +#define MC_CMD_LOOPBACK_V2_PRE_MAC 0x9 > +#define MC_CMD_LOOPBACK_V2_MODE_LBN 0 > +#define MC_CMD_LOOPBACK_V2_MODE_WIDTH 32 > + > +/* MC_CMD_FCNTL structuredef */ > +#define MC_CMD_FCNTL_LEN 4 > +#define MC_CMD_FCNTL_MASK_OFST 0 > +#define MC_CMD_FCNTL_MASK_LEN 4 > +/* enum: Flow control is off. */ > +#define MC_CMD_FCNTL_OFF 0x0 > +/* enum: Respond to flow control. */ > +#define MC_CMD_FCNTL_RESPOND 0x1 > +/* enum: Respond to and Issue flow control. */ > +#define MC_CMD_FCNTL_BIDIR 0x2 > +/* enum: Auto negotiate flow control. */ > +#define MC_CMD_FCNTL_AUTO 0x3 > +/* enum: Priority flow control. This is only supported on KSB. */ > +#define MC_CMD_FCNTL_QBB 0x4 > +/* enum: Issue flow control. */ > +#define MC_CMD_FCNTL_GENERATE 0x5 > +#define MC_CMD_FCNTL_MASK_LBN 0 > +#define MC_CMD_FCNTL_MASK_WIDTH 32 > + > +/* MC_CMD_LINK_FLAGS structuredef */ > +#define MC_CMD_LINK_FLAGS_LEN 4 > +/* The enums defined in this field are used as indices into the > + * MC_CMD_LINK_FLAGS bitmask. > + */ > +#define MC_CMD_LINK_FLAGS_MASK_OFST 0 > +#define MC_CMD_LINK_FLAGS_MASK_LEN 4 > +/* enum property: bitshift */ > +/* enum: Enable auto-negotiation. If AN is enabled, link technology and FEC > + * mode are determined by advertised capabilities and requested FEC modes, > + * combined with link partner capabilities. If AN is disabled, link technology > + * is forced to LINK_TECHNOLOGY and FEC mode is forced to FEC_MODE. Not valid > + * if loopback is enabled > + */ > +#define MC_CMD_LINK_FLAGS_AUTONEG_EN 0x0 > +/* enum: Enable parallel detect. In addition to AN, try to sense partner forced > + * speed/FEC mode (when partner AN disabled). Only valid if AN is enabled. > + */ > +#define MC_CMD_LINK_FLAGS_PARALLEL_DETECT_EN 0x1 > +/* enum: Force link down, in electrical idle. */ > +#define MC_CMD_LINK_FLAGS_LINK_DISABLE 0x2 > +/* enum: Ignore the sequence number and always apply. */ > +#define MC_CMD_LINK_FLAGS_IGNORE_MODULE_SEQ 0x3 > +#define MC_CMD_LINK_FLAGS_MASK_LBN 0 > +#define MC_CMD_LINK_FLAGS_MASK_WIDTH 32 > + > + > +/***********************************/ > +/* MC_CMD_LINK_CTRL > + * Write the unified MAC/PHY link configuration. Locks required: None. Return > + * code: 0, EINVAL, ETIME, EAGAIN > + */ > +#define MC_CMD_LINK_CTRL 0x6b > +#undef MC_CMD_0x6b_PRIVILEGE_CTG > + > +#define MC_CMD_0x6b_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_LINK_CTRL_IN msgrequest */ > +#define MC_CMD_LINK_CTRL_IN_LEN 40 > +/* Handle to the port to set link state for. */ > +#define MC_CMD_LINK_CTRL_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_LINK_CTRL_IN_PORT_HANDLE_LEN 4 > +/* Control flags */ > +#define MC_CMD_LINK_CTRL_IN_CONTROL_FLAGS_OFST 4 > +#define MC_CMD_LINK_CTRL_IN_CONTROL_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LINK_FLAGS/MASK */ > +/* Reserved for future expansion, and included to provide padding for alignment > + * purposes. > + */ > +#define MC_CMD_LINK_CTRL_IN_RESERVED_OFST 8 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_LEN 8 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_OFST 8 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_LEN 4 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_LBN 64 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_WIDTH 32 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_OFST 12 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_LEN 4 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_LBN 96 > +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_WIDTH 32 > +/* Technology abilities to advertise during auto-negotiation */ > +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_TECH_ABILITIES_MASK_OFST 16 > +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_TECH_ABILITIES_MASK_LEN 16 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_ETH_TECH/TECH */ > +/* Pause abilities to advertise during auto-negotiation. Valid when auto- > + * negotation is enabled and MC_CMD_SET_MAC_IN/FCTL is set to > + * MC_CMD_FCNTL_AUTO. If auto-negotiation is disabled the driver must > + * explicitly configure pause mode with MC_CMD_SET_MAC. > + */ > +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_PAUSE_ABILITIES_MASK_OFST 32 > +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_PAUSE_ABILITIES_MASK_LEN 1 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_PAUSE_MODE/TYPE */ > +/* When auto-negotiation is enabled, this is the FEC mode to request. Note that > + * a weaker FEC mode may get negotiated, depending on what the link partner > + * supports. The driver should subsequently use MC_CMD_GET_LINK to check the > + * actual negotiated FEC mode. When auto-negotiation is disabled, this is the > + * forced FEC mode. > + */ > +#define MC_CMD_LINK_CTRL_IN_FEC_MODE_OFST 33 > +#define MC_CMD_LINK_CTRL_IN_FEC_MODE_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* FEC_TYPE/TYPE */ > +/* This is only to be used when auto-negotiation is disabled (forced speed or > + * loopback mode). If the specified value does not align with the values > + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. > + */ > +#define MC_CMD_LINK_CTRL_IN_LINK_TECHNOLOGY_OFST 36 > +#define MC_CMD_LINK_CTRL_IN_LINK_TECHNOLOGY_LEN 2 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_ETH_TECH/TECH */ > +/* The sequence number of the last MODULECHANGE event. If this doesn't match, > + * fail with EAGAIN. > + */ > +#define MC_CMD_LINK_CTRL_IN_MODULE_SEQ_OFST 38 > +#define MC_CMD_LINK_CTRL_IN_MODULE_SEQ_LEN 1 > +/* Loopback Mode. Only valid when auto-negotiation is disabled. */ > +#define MC_CMD_LINK_CTRL_IN_LOOPBACK_OFST 39 > +#define MC_CMD_LINK_CTRL_IN_LOOPBACK_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LOOPBACK_V2/MODE */ > + > +/* MC_CMD_LINK_CTRL_OUT msgresponse */ > +#define MC_CMD_LINK_CTRL_OUT_LEN 0 > + > + > +/***********************************/ > +/* MC_CMD_LINK_STATE > + */ > +#define MC_CMD_LINK_STATE 0x6c > +#undef MC_CMD_0x6c_PRIVILEGE_CTG > + > +#define MC_CMD_0x6c_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_LINK_STATE_IN msgrequest */ > +#define MC_CMD_LINK_STATE_IN_LEN 4 > +/* Handle to the port to get link state for. */ > +#define MC_CMD_LINK_STATE_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_LINK_STATE_IN_PORT_HANDLE_LEN 4 > + > +/* MC_CMD_LINK_STATE_OUT msgresponse */ > +#define MC_CMD_LINK_STATE_OUT_LEN 114 > +/* Flags used to report the current configuration/state of the link. */ > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_OFST 0 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LEN 8 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_OFST 0 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_LBN 0 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_WIDTH 32 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_OFST 4 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_LBN 32 > +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_WIDTH 32 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */ > +/* Configured technology. If the specified value does not align with the values > + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. > + */ > +#define MC_CMD_LINK_STATE_OUT_LINK_TECHNOLOGY_OFST 8 > +#define MC_CMD_LINK_STATE_OUT_LINK_TECHNOLOGY_LEN 2 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_ETH_TECH/TECH */ > +/* Configured FEC mode */ > +#define MC_CMD_LINK_STATE_OUT_FEC_MODE_OFST 10 > +#define MC_CMD_LINK_STATE_OUT_FEC_MODE_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* FEC_TYPE/TYPE */ > +/* Bitmask of auto-negotiated pause modes */ > +#define MC_CMD_LINK_STATE_OUT_PAUSE_MASK_OFST 11 > +#define MC_CMD_LINK_STATE_OUT_PAUSE_MASK_LEN 1 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_PAUSE_MODE/TYPE */ > +/* Configured loopback mode */ > +#define MC_CMD_LINK_STATE_OUT_LOOPBACK_OFST 12 > +#define MC_CMD_LINK_STATE_OUT_LOOPBACK_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LOOPBACK_V2/MODE */ > +/* Abilities requested by the driver to advertise during auto-negotiation */ > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_OFST 16 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_LEN 32 > +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_TECH_MASK_OFST 16 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_TECH_MASK_LEN 16 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_MASK_OFST 32 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_MASK_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_REQ_OFST 36 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_REQ_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_PAUSE_MASK_OFST 40 > +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_PAUSE_MASK_LEN 1 > +/* Abilities advertised by the link partner during auto-negotiation */ > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_OFST 48 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_LEN 32 > +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_TECH_MASK_OFST 48 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_TECH_MASK_LEN 16 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_MASK_OFST 64 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_MASK_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_REQ_OFST 68 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_REQ_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_PAUSE_MASK_OFST 72 > +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_PAUSE_MASK_LEN 1 > +/* Abilities supported by the local device (including cable abilities) For > + * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO > + */ > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_OFST 80 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_LEN 28 > +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_TECH_MASK_OFST 80 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_TECH_MASK_LEN 16 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_MASK_OFST 96 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_MASK_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_REQ_OFST 100 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_REQ_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_PAUSE_MASK_OFST 104 > +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_PAUSE_MASK_LEN 1 > +/* Control flags */ > +#define MC_CMD_LINK_STATE_OUT_CONTROL_FLAGS_OFST 108 > +#define MC_CMD_LINK_STATE_OUT_CONTROL_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LINK_FLAGS/MASK */ > +/* Sequence number to synchronize link change events */ > +#define MC_CMD_LINK_STATE_OUT_PORT_LINKCHANGE_SEQ_NUM_OFST 112 > +#define MC_CMD_LINK_STATE_OUT_PORT_LINKCHANGE_SEQ_NUM_LEN 1 > +/* Sequence number to synchronize module change events */ > +#define MC_CMD_LINK_STATE_OUT_PORT_MODULECHANGE_SEQ_NUM_OFST 113 > +#define MC_CMD_LINK_STATE_OUT_PORT_MODULECHANGE_SEQ_NUM_LEN 1 > + > +/* MC_CMD_LINK_STATE_OUT_V2 msgresponse: Updated LINK_STATE_OUT with > + * LOCAL_AN_SUPPORT > + */ > +#define MC_CMD_LINK_STATE_OUT_V2_LEN 120 > +/* Flags used to report the current configuration/state of the link. */ > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_OFST 0 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LEN 8 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_OFST 0 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_LBN 0 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_WIDTH 32 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_OFST 4 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_LBN 32 > +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_WIDTH 32 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */ > +/* Configured technology. If the specified value does not align with the values > + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. > + */ > +#define MC_CMD_LINK_STATE_OUT_V2_LINK_TECHNOLOGY_OFST 8 > +#define MC_CMD_LINK_STATE_OUT_V2_LINK_TECHNOLOGY_LEN 2 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_ETH_TECH/TECH */ > +/* Configured FEC mode */ > +#define MC_CMD_LINK_STATE_OUT_V2_FEC_MODE_OFST 10 > +#define MC_CMD_LINK_STATE_OUT_V2_FEC_MODE_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* FEC_TYPE/TYPE */ > +/* Bitmask of auto-negotiated pause modes */ > +#define MC_CMD_LINK_STATE_OUT_V2_PAUSE_MASK_OFST 11 > +#define MC_CMD_LINK_STATE_OUT_V2_PAUSE_MASK_LEN 1 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_PAUSE_MODE/TYPE */ > +/* Configured loopback mode */ > +#define MC_CMD_LINK_STATE_OUT_V2_LOOPBACK_OFST 12 > +#define MC_CMD_LINK_STATE_OUT_V2_LOOPBACK_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LOOPBACK_V2/MODE */ > +/* Abilities requested by the driver to advertise during auto-negotiation */ > +#define MC_CMD_LINK_STATE_OUT_V2_ADVERTISED_ABILITIES_OFST 16 > +#define MC_CMD_LINK_STATE_OUT_V2_ADVERTISED_ABILITIES_LEN 32 > +/* Abilities advertised by the link partner during auto-negotiation */ > +#define MC_CMD_LINK_STATE_OUT_V2_LINK_PARTNER_ABILITIES_OFST 48 > +#define MC_CMD_LINK_STATE_OUT_V2_LINK_PARTNER_ABILITIES_LEN 32 > +/* Abilities supported by the local device (including cable abilities) For > + * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO > + */ > +#define MC_CMD_LINK_STATE_OUT_V2_SUPPORTED_ABILITIES_OFST 80 > +#define MC_CMD_LINK_STATE_OUT_V2_SUPPORTED_ABILITIES_LEN 28 > +/* Control flags */ > +#define MC_CMD_LINK_STATE_OUT_V2_CONTROL_FLAGS_OFST 108 > +#define MC_CMD_LINK_STATE_OUT_V2_CONTROL_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LINK_FLAGS/MASK */ > +/* Sequence number to synchronize link change events */ > +#define MC_CMD_LINK_STATE_OUT_V2_PORT_LINKCHANGE_SEQ_NUM_OFST 112 > +#define MC_CMD_LINK_STATE_OUT_V2_PORT_LINKCHANGE_SEQ_NUM_LEN 1 > +/* Sequence number to synchronize module change events */ > +#define MC_CMD_LINK_STATE_OUT_V2_PORT_MODULECHANGE_SEQ_NUM_OFST 113 > +#define MC_CMD_LINK_STATE_OUT_V2_PORT_MODULECHANGE_SEQ_NUM_LEN 1 > +/* Reports the auto-negotiation supported by the local device. This depends on > + * the port and module properties. > + */ > +#define MC_CMD_LINK_STATE_OUT_V2_LOCAL_AN_SUPPORT_OFST 116 > +#define MC_CMD_LINK_STATE_OUT_V2_LOCAL_AN_SUPPORT_LEN 4 > +/* Enum values, see field(s): */ > +/* AN_TYPE/TYPE */ > + > +/* MC_CMD_LINK_STATE_OUT_V3 msgresponse: Updated LINK_STATE_OUT_V2 for explicit > + * reporting of the link speed and duplex mode. > + */ > +#define MC_CMD_LINK_STATE_OUT_V3_LEN 128 > +/* Flags used to report the current configuration/state of the link. */ > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_OFST 0 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LEN 8 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_OFST 0 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_LBN 0 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_WIDTH 32 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_OFST 4 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_LBN 32 > +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_WIDTH 32 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */ > +/* Configured technology. If the specified value does not align with the values > + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. > + */ > +#define MC_CMD_LINK_STATE_OUT_V3_LINK_TECHNOLOGY_OFST 8 > +#define MC_CMD_LINK_STATE_OUT_V3_LINK_TECHNOLOGY_LEN 2 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_ETH_TECH/TECH */ > +/* Configured FEC mode */ > +#define MC_CMD_LINK_STATE_OUT_V3_FEC_MODE_OFST 10 > +#define MC_CMD_LINK_STATE_OUT_V3_FEC_MODE_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* FEC_TYPE/TYPE */ > +/* Bitmask of auto-negotiated pause modes */ > +#define MC_CMD_LINK_STATE_OUT_V3_PAUSE_MASK_OFST 11 > +#define MC_CMD_LINK_STATE_OUT_V3_PAUSE_MASK_LEN 1 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_PAUSE_MODE/TYPE */ > +/* Configured loopback mode */ > +#define MC_CMD_LINK_STATE_OUT_V3_LOOPBACK_OFST 12 > +#define MC_CMD_LINK_STATE_OUT_V3_LOOPBACK_LEN 1 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LOOPBACK_V2/MODE */ > +/* Abilities requested by the driver to advertise during auto-negotiation */ > +#define MC_CMD_LINK_STATE_OUT_V3_ADVERTISED_ABILITIES_OFST 16 > +#define MC_CMD_LINK_STATE_OUT_V3_ADVERTISED_ABILITIES_LEN 32 > +/* Abilities advertised by the link partner during auto-negotiation */ > +#define MC_CMD_LINK_STATE_OUT_V3_LINK_PARTNER_ABILITIES_OFST 48 > +#define MC_CMD_LINK_STATE_OUT_V3_LINK_PARTNER_ABILITIES_LEN 32 > +/* Abilities supported by the local device (including cable abilities) For > + * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO > + */ > +#define MC_CMD_LINK_STATE_OUT_V3_SUPPORTED_ABILITIES_OFST 80 > +#define MC_CMD_LINK_STATE_OUT_V3_SUPPORTED_ABILITIES_LEN 28 > +/* Control flags */ > +#define MC_CMD_LINK_STATE_OUT_V3_CONTROL_FLAGS_OFST 108 > +#define MC_CMD_LINK_STATE_OUT_V3_CONTROL_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LINK_FLAGS/MASK */ > +/* Sequence number to synchronize link change events */ > +#define MC_CMD_LINK_STATE_OUT_V3_PORT_LINKCHANGE_SEQ_NUM_OFST 112 > +#define MC_CMD_LINK_STATE_OUT_V3_PORT_LINKCHANGE_SEQ_NUM_LEN 1 > +/* Sequence number to synchronize module change events */ > +#define MC_CMD_LINK_STATE_OUT_V3_PORT_MODULECHANGE_SEQ_NUM_OFST 113 > +#define MC_CMD_LINK_STATE_OUT_V3_PORT_MODULECHANGE_SEQ_NUM_LEN 1 > +/* Reports the auto-negotiation supported by the local device. This depends on > + * the port and module properties. > + */ > +#define MC_CMD_LINK_STATE_OUT_V3_LOCAL_AN_SUPPORT_OFST 116 > +#define MC_CMD_LINK_STATE_OUT_V3_LOCAL_AN_SUPPORT_LEN 4 > +/* Enum values, see field(s): */ > +/* AN_TYPE/TYPE */ > +/* Autonegotiated speed in mbit/s. The link may still be down even if this > + * reads non-zero. LINK_SPEED field is intended to be used by drivers without > + * the most up-to-date MCDI definitions, unable to deduce the link speed from > + * the reported LINK_TECHNOLOGY field. > + */ > +#define MC_CMD_LINK_STATE_OUT_V3_LINK_SPEED_OFST 120 > +#define MC_CMD_LINK_STATE_OUT_V3_LINK_SPEED_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_V3_FLAGS_OFST 124 > +#define MC_CMD_LINK_STATE_OUT_V3_FLAGS_LEN 4 > +#define MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_OFST 124 > +#define MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_LBN 0 > +#define MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_WIDTH 1 > + > > /***********************************/ > /* MC_CMD_GET_LINK > @@ -5694,6 +6163,54 @@ > /* MC_CMD_GET_LINK_IN msgrequest */ > #define MC_CMD_GET_LINK_IN_LEN 0 > > +/* MC_CMD_GET_LINK_IN_V2 msgrequest */ > +#define MC_CMD_GET_LINK_IN_V2_LEN 8 > +/* Target port to request link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which > + * identifies a real or virtual network port by MAE port and link end. See the > + * structure definition for more details. > + */ > +#define MC_CMD_GET_LINK_IN_V2_TARGET_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_LEN 8 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_LEN 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_LBN 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_WIDTH 32 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_OFST 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_LEN 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_LBN 32 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_OFST 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_LEN 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LEN 8 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_OFST 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LEN 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LBN 0 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_WIDTH 32 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_OFST 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LEN 4 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LBN 32 > +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_WIDTH 32 > + > /* MC_CMD_GET_LINK_OUT msgresponse */ > #define MC_CMD_GET_LINK_OUT_LEN 28 > /* Near-side advertised capabilities. Refer to > @@ -5745,6 +6262,7 @@ > /* This returns the negotiated flow control value. */ > #define MC_CMD_GET_LINK_OUT_FCNTL_OFST 20 > #define MC_CMD_GET_LINK_OUT_FCNTL_LEN 4 > +/* enum property: value */ > /* Enum values, see field(s): */ > /* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ > #define MC_CMD_GET_LINK_OUT_MAC_FAULT_OFST 24 > @@ -5813,6 +6331,7 @@ > /* This returns the negotiated flow control value. */ > #define MC_CMD_GET_LINK_OUT_V2_FCNTL_OFST 20 > #define MC_CMD_GET_LINK_OUT_V2_FCNTL_LEN 4 > +/* enum property: value */ > /* Enum values, see field(s): */ > /* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ > #define MC_CMD_GET_LINK_OUT_V2_MAC_FAULT_OFST 24 > @@ -5969,6 +6488,95 @@ > #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_LBN 7 > #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH 1 > > +/* MC_CMD_SET_LINK_IN_V3 msgrequest */ > +#define MC_CMD_SET_LINK_IN_V3_LEN 28 > +/* Near-side advertised capabilities. Refer to > + * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. > + */ > +#define MC_CMD_SET_LINK_IN_V3_CAP_OFST 0 > +#define MC_CMD_SET_LINK_IN_V3_CAP_LEN 4 > +/* Flags */ > +#define MC_CMD_SET_LINK_IN_V3_FLAGS_OFST 4 > +#define MC_CMD_SET_LINK_IN_V3_FLAGS_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_OFST 4 > +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_LBN 0 > +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_WIDTH 1 > +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_OFST 4 > +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_LBN 1 > +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_WIDTH 1 > +#define MC_CMD_SET_LINK_IN_V3_TXDIS_OFST 4 > +#define MC_CMD_SET_LINK_IN_V3_TXDIS_LBN 2 > +#define MC_CMD_SET_LINK_IN_V3_TXDIS_WIDTH 1 > +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_OFST 4 > +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_LBN 3 > +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_WIDTH 1 > +/* Loopback mode. */ > +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_OFST 8 > +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_LEN 4 > +/* Enum values, see field(s): */ > +/* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ > +/* A loopback speed of "0" is supported, and means (choose any available > + * speed). > + */ > +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_OFST 12 > +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_OFST 16 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_LEN 1 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_OFST 16 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_LBN 0 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_WIDTH 7 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_OFST 16 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_LBN 7 > +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_WIDTH 1 > +/* Padding */ > +#define MC_CMD_SET_LINK_IN_V3_RESERVED_OFST 17 > +#define MC_CMD_SET_LINK_IN_V3_RESERVED_LEN 3 > +/* Target port to set link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which > + * identifies a real or virtual network port by MAE port and link end. See the > + * structure definition for more details > + */ > +#define MC_CMD_SET_LINK_IN_V3_TARGET_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_LEN 8 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_LBN 160 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_WIDTH 32 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_OFST 24 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_LBN 192 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_OFST 23 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_LEN 1 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_OFST 24 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LEN 8 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_OFST 20 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LBN 160 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_WIDTH 32 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_OFST 24 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LEN 4 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LBN 192 > +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_WIDTH 32 > + > /* MC_CMD_SET_LINK_OUT msgresponse */ > #define MC_CMD_SET_LINK_OUT_LEN 0 > > @@ -6034,17 +6642,17 @@ > #define MC_CMD_SET_MAC_IN_FCNTL_OFST 20 > #define MC_CMD_SET_MAC_IN_FCNTL_LEN 4 > /* enum: Flow control is off. */ > -#define MC_CMD_FCNTL_OFF 0x0 > +/* MC_CMD_FCNTL_OFF 0x0 */ > /* enum: Respond to flow control. */ > -#define MC_CMD_FCNTL_RESPOND 0x1 > +/* MC_CMD_FCNTL_RESPOND 0x1 */ > /* enum: Respond to and Issue flow control. */ > -#define MC_CMD_FCNTL_BIDIR 0x2 > -/* enum: Auto neg flow control. */ > -#define MC_CMD_FCNTL_AUTO 0x3 > -/* enum: Priority flow control (eftest builds only). */ > -#define MC_CMD_FCNTL_QBB 0x4 > +/* MC_CMD_FCNTL_BIDIR 0x2 */ > +/* enum: Auto negotiate flow control. */ > +/* MC_CMD_FCNTL_AUTO 0x3 */ > +/* enum: Priority flow control. This is only supported on KSB. */ > +/* MC_CMD_FCNTL_QBB 0x4 */ > /* enum: Issue flow control. */ > -#define MC_CMD_FCNTL_GENERATE 0x5 > +/* MC_CMD_FCNTL_GENERATE 0x5 */ > #define MC_CMD_SET_MAC_IN_FLAGS_OFST 24 > #define MC_CMD_SET_MAC_IN_FLAGS_LEN 4 > #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_OFST 24 > @@ -6086,9 +6694,9 @@ > /* MC_CMD_FCNTL_RESPOND 0x1 */ > /* enum: Respond to and Issue flow control. */ > /* MC_CMD_FCNTL_BIDIR 0x2 */ > -/* enum: Auto neg flow control. */ > +/* enum: Auto negotiate flow control. */ > /* MC_CMD_FCNTL_AUTO 0x3 */ > -/* enum: Priority flow control (eftest builds only). */ > +/* enum: Priority flow control. This is only supported on KSB. */ > /* MC_CMD_FCNTL_QBB 0x4 */ > /* enum: Issue flow control. */ > /* MC_CMD_FCNTL_GENERATE 0x5 */ > @@ -6155,9 +6763,9 @@ > /* MC_CMD_FCNTL_RESPOND 0x1 */ > /* enum: Respond to and Issue flow control. */ > /* MC_CMD_FCNTL_BIDIR 0x2 */ > -/* enum: Auto neg flow control. */ > +/* enum: Auto negotiate flow control. */ > /* MC_CMD_FCNTL_AUTO 0x3 */ > -/* enum: Priority flow control (eftest builds only). */ > +/* enum: Priority flow control. This is only supported on KSB. */ > /* MC_CMD_FCNTL_QBB 0x4 */ > /* enum: Issue flow control. */ > /* MC_CMD_FCNTL_GENERATE 0x5 */ > @@ -6188,19 +6796,9 @@ > #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28 > #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4 > #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1 > -/* Identifies the MAC to update by the specifying the end of a logical MAE > - * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the > - * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible > - * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all > - * circumstances. 1. Some will always work (e.g. a VF can always address its > - * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not > - * meaningful and will always fail with EINVAL (e.g. attempting to address the > - * VNIC end of a link to a physical port), 3. Some are meaningful but require > - * the MCDI client to have the required permission and fail with EPERM > - * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer), > - * and 4. Some could be implementation-specific and fail with ENOTSUP if not > - * available (no examples exist right now). See SF-123581-TC section 4.3 for > - * more details. > +/* Target port to set mac state for. Uses MAE_LINK_ENDPOINT_SELECTOR which > + * identifies a real or virtual network port by MAE port and link end. See the > + * structure definition for more details > */ > #define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32 > #define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8 > @@ -6212,6 +6810,7 @@ > #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4 > #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288 > #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32 > #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4 > #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32 > @@ -6405,6 +7004,98 @@ > #define MC_CMD_MAC_STATS_IN_PORT_ID_OFST 16 > #define MC_CMD_MAC_STATS_IN_PORT_ID_LEN 4 > > +/* MC_CMD_MAC_STATS_V2_IN msgrequest */ > +#define MC_CMD_MAC_STATS_V2_IN_LEN 28 > +/* ??? */ > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_OFST 0 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LEN 8 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_OFST 0 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LBN 0 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_WIDTH 32 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_OFST 4 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LBN 32 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_WIDTH 32 > +#define MC_CMD_MAC_STATS_V2_IN_CMD_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_CMD_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_LBN 0 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_WIDTH 1 > +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_LBN 1 > +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_WIDTH 1 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_LBN 2 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_WIDTH 1 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_LBN 3 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_WIDTH 1 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_LBN 4 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_WIDTH 1 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_LBN 5 > +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_WIDTH 1 > +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_OFST 8 > +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_LBN 16 > +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_WIDTH 16 > +/* DMA length. Should be set to MAC_STATS_NUM_STATS * sizeof(uint64_t), as > + * returned by MC_CMD_GET_CAPABILITIES_V4_OUT. For legacy firmware not > + * supporting MC_CMD_GET_CAPABILITIES_V4_OUT, DMA_LEN should be set to > + * MC_CMD_MAC_NSTATS * sizeof(uint64_t) > + */ > +#define MC_CMD_MAC_STATS_V2_IN_DMA_LEN_OFST 12 > +#define MC_CMD_MAC_STATS_V2_IN_DMA_LEN_LEN 4 > +/* port id so vadapter stats can be provided */ > +#define MC_CMD_MAC_STATS_V2_IN_PORT_ID_OFST 16 > +#define MC_CMD_MAC_STATS_V2_IN_PORT_ID_LEN 4 > +/* Target port to request statistics for. Uses MAE_LINK_ENDPOINT_SELECTOR which > + * identifies a real or virtual network port by MAE port and link end. See the > + * structure definition for more details > + */ > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LEN 8 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LBN 160 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_WIDTH 32 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_OFST 24 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LBN 192 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 23 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_OFST 24 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LEN 8 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_OFST 20 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LBN 160 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_WIDTH 32 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_OFST 24 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LEN 4 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LBN 192 > +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_WIDTH 32 > + > /* MC_CMD_MAC_STATS_OUT_DMA msgresponse */ > #define MC_CMD_MAC_STATS_OUT_DMA_LEN 0 > > @@ -6421,6 +7112,7 @@ > #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32 > #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 > #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS > +/* enum property: index */ > #define MC_CMD_MAC_GENERATION_START 0x0 /* enum */ > #define MC_CMD_MAC_DMABUF_START 0x1 /* enum */ > #define MC_CMD_MAC_TX_PKTS 0x1 /* enum */ > @@ -6583,6 +7275,7 @@ > #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32 > #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 > #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2 > +/* enum property: index */ > /* enum: Start of FEC stats buffer space, Medford2 and up */ > #define MC_CMD_MAC_FEC_DMABUF_START 0x61 > /* enum: Number of uncorrected FEC codewords on link (RS-FEC only for Medford2) > @@ -6622,6 +7315,7 @@ > #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32 > #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 > #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3 > +/* enum property: index */ > /* enum: Start of CTPIO stats buffer space, Medford2 and up */ > #define MC_CMD_MAC_CTPIO_DMABUF_START 0x68 > /* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the > @@ -6702,6 +7396,7 @@ > #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32 > #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 > #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4 > +/* enum property: index */ > /* enum: Start of V4 stats buffer space */ > #define MC_CMD_MAC_V4_DMABUF_START 0x79 > /* enum: RXDP counter: Number of packets truncated because scattering was > @@ -6723,112 +7418,35 @@ > /* Other enum values, see field(s): */ > /* MC_CMD_MAC_STATS_V3_OUT_NO_DMA/STATISTICS */ > > - > -/***********************************/ > -/* MC_CMD_SRIOV > - * to be documented > - */ > -#define MC_CMD_SRIOV 0x30 > - > -/* MC_CMD_SRIOV_IN msgrequest */ > -#define MC_CMD_SRIOV_IN_LEN 12 > -#define MC_CMD_SRIOV_IN_ENABLE_OFST 0 > -#define MC_CMD_SRIOV_IN_ENABLE_LEN 4 > -#define MC_CMD_SRIOV_IN_VI_BASE_OFST 4 > -#define MC_CMD_SRIOV_IN_VI_BASE_LEN 4 > -#define MC_CMD_SRIOV_IN_VF_COUNT_OFST 8 > -#define MC_CMD_SRIOV_IN_VF_COUNT_LEN 4 > - > -/* MC_CMD_SRIOV_OUT msgresponse */ > -#define MC_CMD_SRIOV_OUT_LEN 8 > -#define MC_CMD_SRIOV_OUT_VI_SCALE_OFST 0 > -#define MC_CMD_SRIOV_OUT_VI_SCALE_LEN 4 > -#define MC_CMD_SRIOV_OUT_VF_TOTAL_OFST 4 > -#define MC_CMD_SRIOV_OUT_VF_TOTAL_LEN 4 > - > -/* MC_CMD_MEMCPY_RECORD_TYPEDEF structuredef */ > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LEN 32 > -/* this is only used for the first record */ > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_OFST 0 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LBN 0 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_WIDTH 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_OFST 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LBN 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_WIDTH 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_RID_INLINE 0x100 /* enum */ > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LBN 128 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_WIDTH 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LEN 4 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LBN 224 > -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_MEMCPY > - * DMA write data into (Rid,Addr), either by dma reading (Rid,Addr), or by data > - * embedded directly in the command. > - * > - * A common pattern is for a client to use generation counts to signal a dma > - * update of a datastructure. To facilitate this, this MCDI operation can > - * contain multiple requests which are executed in strict order. Requests take > - * the form of duplicating the entire MCDI request continuously (including the > - * requests record, which is ignored in all but the first structure) > - * > - * The source data can either come from a DMA from the host, or it can be > - * embedded within the request directly, thereby eliminating a DMA read. To > - * indicate this, the client sets FROM_RID=%RID_INLINE, ADDR_HI=0, and > - * ADDR_LO=offset, and inserts the data at %offset from the start of the > - * payload. It's the callers responsibility to ensure that the embedded data > - * doesn't overlap the records. > - * > - * Returns: 0, EINVAL (invalid RID) > - */ > -#define MC_CMD_MEMCPY 0x31 > - > -/* MC_CMD_MEMCPY_IN msgrequest */ > -#define MC_CMD_MEMCPY_IN_LENMIN 32 > -#define MC_CMD_MEMCPY_IN_LENMAX 224 > -#define MC_CMD_MEMCPY_IN_LENMAX_MCDI2 992 > -#define MC_CMD_MEMCPY_IN_LEN(num) (0+32*(num)) > -#define MC_CMD_MEMCPY_IN_RECORD_NUM(len) (((len)-0)/32) > -/* see MC_CMD_MEMCPY_RECORD_TYPEDEF */ > -#define MC_CMD_MEMCPY_IN_RECORD_OFST 0 > -#define MC_CMD_MEMCPY_IN_RECORD_LEN 32 > -#define MC_CMD_MEMCPY_IN_RECORD_MINNUM 1 > -#define MC_CMD_MEMCPY_IN_RECORD_MAXNUM 7 > -#define MC_CMD_MEMCPY_IN_RECORD_MAXNUM_MCDI2 31 > - > -/* MC_CMD_MEMCPY_OUT msgresponse */ > -#define MC_CMD_MEMCPY_OUT_LEN 0 > +/* MC_CMD_MAC_STATS_V5_OUT_DMA msgresponse */ > +#define MC_CMD_MAC_STATS_V5_OUT_DMA_LEN 0 > + > +/* MC_CMD_MAC_STATS_V5_OUT_NO_DMA msgresponse */ > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_LEN (((MC_CMD_MAC_NSTATS_V5*64))>>3) > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_OFST 0 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LEN 8 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_OFST 0 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_LEN 4 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_LBN 0 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_WIDTH 32 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_OFST 4 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_LEN 4 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_LBN 32 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 > +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V5 > +/* enum property: index */ > +/* enum: Start of V5 stats buffer space */ > +#define MC_CMD_MAC_V5_DMABUF_START 0x7c > +/* enum: Link toggle counter: Number of times the link has toggled between > + * up/down and down/up > + */ > +#define MC_CMD_MAC_LINK_TOGGLES 0x7c > +/* enum: This includes the space at offset 125 which is the final > + * GENERATION_END in a MAC_STATS_V5 response and otherwise unused. > + */ > +#define MC_CMD_MAC_NSTATS_V5 0x7e > +/* Other enum values, see field(s): */ > +/* MC_CMD_MAC_STATS_V4_OUT_NO_DMA/STATISTICS */ > > > /***********************************/ > @@ -6984,6 +7602,7 @@ > #define MC_CMD_WOL_FILTER_RESET_IN_LEN 4 > #define MC_CMD_WOL_FILTER_RESET_IN_MASK_OFST 0 > #define MC_CMD_WOL_FILTER_RESET_IN_MASK_LEN 4 > +/* enum property: bitmask */ > #define MC_CMD_WOL_FILTER_RESET_IN_WAKE_FILTERS 0x1 /* enum */ > #define MC_CMD_WOL_FILTER_RESET_IN_LIGHTSOUT_OFFLOADS 0x2 /* enum */ > > @@ -6991,23 +7610,6 @@ > #define MC_CMD_WOL_FILTER_RESET_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_SET_MCAST_HASH > - * Set the MCAST hash value without otherwise reconfiguring the MAC > - */ > -#define MC_CMD_SET_MCAST_HASH 0x35 > - > -/* MC_CMD_SET_MCAST_HASH_IN msgrequest */ > -#define MC_CMD_SET_MCAST_HASH_IN_LEN 32 > -#define MC_CMD_SET_MCAST_HASH_IN_HASH0_OFST 0 > -#define MC_CMD_SET_MCAST_HASH_IN_HASH0_LEN 16 > -#define MC_CMD_SET_MCAST_HASH_IN_HASH1_OFST 16 > -#define MC_CMD_SET_MCAST_HASH_IN_HASH1_LEN 16 > - > -/* MC_CMD_SET_MCAST_HASH_OUT msgresponse */ > -#define MC_CMD_SET_MCAST_HASH_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_NVRAM_TYPES > * Return bitfield indicating available types of virtual NVRAM partitions. > @@ -7026,6 +7628,7 @@ > /* Bit mask of supported types. */ > #define MC_CMD_NVRAM_TYPES_OUT_TYPES_OFST 0 > #define MC_CMD_NVRAM_TYPES_OUT_TYPES_LEN 4 > +/* enum property: bitshift */ > /* enum: Disabled callisto. */ > #define MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0x0 > /* enum: MC firmware. */ > @@ -7522,7 +8125,7 @@ > #define MC_CMD_REBOOT 0x3d > #undef MC_CMD_0x3d_PRIVILEGE_CTG > > -#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN > +#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND > > /* MC_CMD_REBOOT_IN msgrequest */ > #define MC_CMD_REBOOT_IN_LEN 4 > @@ -7534,65 +8137,6 @@ > #define MC_CMD_REBOOT_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_SCHEDINFO > - * Request scheduler info. Locks required: NONE. Returns: An array of > - * (timeslice,maximum overrun), one for each thread, in ascending order of > - * thread address. > - */ > -#define MC_CMD_SCHEDINFO 0x3e > -#undef MC_CMD_0x3e_PRIVILEGE_CTG > - > -#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SCHEDINFO_IN msgrequest */ > -#define MC_CMD_SCHEDINFO_IN_LEN 0 > - > -/* MC_CMD_SCHEDINFO_OUT msgresponse */ > -#define MC_CMD_SCHEDINFO_OUT_LENMIN 4 > -#define MC_CMD_SCHEDINFO_OUT_LENMAX 252 > -#define MC_CMD_SCHEDINFO_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_SCHEDINFO_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_SCHEDINFO_OUT_DATA_NUM(len) (((len)-0)/4) > -#define MC_CMD_SCHEDINFO_OUT_DATA_OFST 0 > -#define MC_CMD_SCHEDINFO_OUT_DATA_LEN 4 > -#define MC_CMD_SCHEDINFO_OUT_DATA_MINNUM 1 > -#define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM 63 > -#define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM_MCDI2 255 > - > - > -/***********************************/ > -/* MC_CMD_REBOOT_MODE > - * Set the mode for the next MC reboot. Locks required: NONE. Sets the reboot > - * mode to the specified value. Returns the old mode. > - */ > -#define MC_CMD_REBOOT_MODE 0x3f > -#undef MC_CMD_0x3f_PRIVILEGE_CTG > - > -#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_REBOOT_MODE_IN msgrequest */ > -#define MC_CMD_REBOOT_MODE_IN_LEN 4 > -#define MC_CMD_REBOOT_MODE_IN_VALUE_OFST 0 > -#define MC_CMD_REBOOT_MODE_IN_VALUE_LEN 4 > -/* enum: Normal. */ > -#define MC_CMD_REBOOT_MODE_NORMAL 0x0 > -/* enum: Power-on Reset. */ > -#define MC_CMD_REBOOT_MODE_POR 0x2 > -/* enum: Snapper. */ > -#define MC_CMD_REBOOT_MODE_SNAPPER 0x3 > -/* enum: snapper fake POR */ > -#define MC_CMD_REBOOT_MODE_SNAPPER_POR 0x4 > -#define MC_CMD_REBOOT_MODE_IN_FAKE_OFST 0 > -#define MC_CMD_REBOOT_MODE_IN_FAKE_LBN 7 > -#define MC_CMD_REBOOT_MODE_IN_FAKE_WIDTH 1 > - > -/* MC_CMD_REBOOT_MODE_OUT msgresponse */ > -#define MC_CMD_REBOOT_MODE_OUT_LEN 4 > -#define MC_CMD_REBOOT_MODE_OUT_VALUE_OFST 0 > -#define MC_CMD_REBOOT_MODE_OUT_VALUE_LEN 4 > - > - > /***********************************/ > /* MC_CMD_SENSOR_INFO > * Returns information about every available sensor. > @@ -8061,6 +8605,54 @@ > /* MC_CMD_GET_PHY_STATE_IN msgrequest */ > #define MC_CMD_GET_PHY_STATE_IN_LEN 0 > > +/* MC_CMD_GET_PHY_STATE_IN_V2 msgrequest */ > +#define MC_CMD_GET_PHY_STATE_IN_V2_LEN 8 > +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which > + * identifies a real or virtual network port by MAE port and link end. See the > + * structure definition for more details. > + */ > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LEN 8 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LEN 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LBN 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_WIDTH 32 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_OFST 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LEN 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LBN 32 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_OFST 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_LEN 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LEN 8 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_OFST 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LEN 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LBN 0 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_WIDTH 32 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_OFST 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LEN 4 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LBN 32 > +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_WIDTH 32 > + > /* MC_CMD_GET_PHY_STATE_OUT msgresponse */ > #define MC_CMD_GET_PHY_STATE_OUT_LEN 4 > #define MC_CMD_GET_PHY_STATE_OUT_STATE_OFST 0 > @@ -8071,22 +8663,6 @@ > #define MC_CMD_PHY_STATE_ZOMBIE 0x2 > > > -/***********************************/ > -/* MC_CMD_SETUP_8021QBB > - * 802.1Qbb control. 8 Tx queues that map to priorities 0 - 7. Use all 1s to > - * disable 802.Qbb for a given priority. > - */ > -#define MC_CMD_SETUP_8021QBB 0x44 > - > -/* MC_CMD_SETUP_8021QBB_IN msgrequest */ > -#define MC_CMD_SETUP_8021QBB_IN_LEN 32 > -#define MC_CMD_SETUP_8021QBB_IN_TXQS_OFST 0 > -#define MC_CMD_SETUP_8021QBB_IN_TXQS_LEN 32 > - > -/* MC_CMD_SETUP_8021QBB_OUT msgresponse */ > -#define MC_CMD_SETUP_8021QBB_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_WOL_FILTER_GET > * Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS > @@ -8105,133 +8681,6 @@ > #define MC_CMD_WOL_FILTER_GET_OUT_FILTER_ID_LEN 4 > > > -/***********************************/ > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD > - * Add a protocol offload to NIC for lights-out state. Locks required: None. > - * Returns: 0, ENOSYS > - */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46 > -#undef MC_CMD_0x46_PRIVILEGE_CTG > - > -#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK > - > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN msgrequest */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMIN 8 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX 252 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) (4+4*(num)) > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_NUM(len) (((len)-4)/4) > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 > -#define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_ARP 0x1 /* enum */ > -#define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_NS 0x2 /* enum */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_OFST 4 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_LEN 4 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MINNUM 1 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM 62 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM_MCDI2 254 > - > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP msgrequest */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_LEN 14 > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */ > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_OFST 4 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_LEN 6 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_OFST 10 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_LEN 4 > - > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS msgrequest */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_LEN 42 > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */ > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_OFST 4 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_LEN 6 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_OFST 10 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_LEN 16 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_OFST 26 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_LEN 16 > - > -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT msgresponse */ > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN 4 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_OFST 0 > -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD > - * Remove a protocol offload from NIC for lights-out state. Locks required: > - * None. Returns: 0, ENOSYS > - */ > -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47 > -#undef MC_CMD_0x47_PRIVILEGE_CTG > - > -#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK > - > -/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN msgrequest */ > -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN 8 > -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 > -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 > -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_OFST 4 > -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_LEN 4 > - > -/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT msgresponse */ > -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_MAC_RESET_RESTORE > - * Restore MAC after block reset. Locks required: None. Returns: 0. > - */ > -#define MC_CMD_MAC_RESET_RESTORE 0x48 > - > -/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */ > -#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0 > - > -/* MC_CMD_MAC_RESET_RESTORE_OUT msgresponse */ > -#define MC_CMD_MAC_RESET_RESTORE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_TESTASSERT > - * Deliberately trigger an assert-detonation in the firmware for testing > - * purposes (i.e. to allow tests that the driver copes gracefully). Locks > - * required: None Returns: 0 > - */ > -#define MC_CMD_TESTASSERT 0x49 > -#undef MC_CMD_0x49_PRIVILEGE_CTG > - > -#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_TESTASSERT_IN msgrequest */ > -#define MC_CMD_TESTASSERT_IN_LEN 0 > - > -/* MC_CMD_TESTASSERT_OUT msgresponse */ > -#define MC_CMD_TESTASSERT_OUT_LEN 0 > - > -/* MC_CMD_TESTASSERT_V2_IN msgrequest */ > -#define MC_CMD_TESTASSERT_V2_IN_LEN 4 > -/* How to provoke the assertion */ > -#define MC_CMD_TESTASSERT_V2_IN_TYPE_OFST 0 > -#define MC_CMD_TESTASSERT_V2_IN_TYPE_LEN 4 > -/* enum: Assert using the FAIL_ASSERTION_WITH_USEFUL_VALUES macro. Unless > - * you're testing firmware, this is what you want. > - */ > -#define MC_CMD_TESTASSERT_V2_IN_FAIL_ASSERTION_WITH_USEFUL_VALUES 0x0 > -/* enum: Assert using assert(0); */ > -#define MC_CMD_TESTASSERT_V2_IN_ASSERT_FALSE 0x1 > -/* enum: Deliberately trigger a watchdog */ > -#define MC_CMD_TESTASSERT_V2_IN_WATCHDOG 0x2 > -/* enum: Deliberately trigger a trap by loading from an invalid address */ > -#define MC_CMD_TESTASSERT_V2_IN_LOAD_TRAP 0x3 > -/* enum: Deliberately trigger a trap by storing to an invalid address */ > -#define MC_CMD_TESTASSERT_V2_IN_STORE_TRAP 0x4 > -/* enum: Jump to an invalid address */ > -#define MC_CMD_TESTASSERT_V2_IN_JUMP_TRAP 0x5 > - > -/* MC_CMD_TESTASSERT_V2_OUT msgresponse */ > -#define MC_CMD_TESTASSERT_V2_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_WORKAROUND > * Enable/Disable a given workaround. The mcfw will return EINVAL if it doesn't > @@ -8324,6 +8773,62 @@ > #define MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_LBN 16 > #define MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_WIDTH 16 > > +/* MC_CMD_GET_PHY_MEDIA_INFO_IN_V2 msgrequest */ > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_LEN 12 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_OFST 0 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_OFST 0 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_LBN 0 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_WIDTH 16 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_OFST 0 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_LBN 16 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_WIDTH 16 > +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which > + * identifies a real or virtual network port by MAE port and link end. See the > + * structure definition for more details > + */ > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LEN 8 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LBN 32 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_WIDTH 32 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_OFST 8 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LBN 64 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_WIDTH 32 > +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 7 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 32 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 52 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 48 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 6 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_OFST 8 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LEN 8 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_OFST 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LBN 32 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_WIDTH 32 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_OFST 8 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LEN 4 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LBN 64 > +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_WIDTH 32 > + > /* MC_CMD_GET_PHY_MEDIA_INFO_OUT msgresponse */ > #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN 5 > #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252 > @@ -8348,7 +8853,7 @@ > #define MC_CMD_NVRAM_TEST 0x4c > #undef MC_CMD_0x4c_PRIVILEGE_CTG > > -#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN > +#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND > > /* MC_CMD_NVRAM_TEST_IN msgrequest */ > #define MC_CMD_NVRAM_TEST_IN_LEN 4 > @@ -8369,103 +8874,6 @@ > #define MC_CMD_NVRAM_TEST_NOTSUPP 0x2 > > > -/***********************************/ > -/* MC_CMD_MRSFP_TWEAK > - * Read status and/or set parameters for the 'mrsfp' driver in mr_rusty builds. > - * I2C I/O expander bits are always read; if equaliser parameters are supplied, > - * they are configured first. Locks required: None. Return code: 0, EINVAL. > - */ > -#define MC_CMD_MRSFP_TWEAK 0x4d > - > -/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */ > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16 > -/* 0-6 low->high de-emph. */ > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_OFST 0 > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_LEN 4 > -/* 0-8 low->high ref.V */ > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_OFST 4 > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_LEN 4 > -/* 0-8 0-8 low->high boost */ > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_OFST 8 > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_LEN 4 > -/* 0-8 low->high ref.V */ > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_OFST 12 > -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_LEN 4 > - > -/* MC_CMD_MRSFP_TWEAK_IN_READ_ONLY msgrequest */ > -#define MC_CMD_MRSFP_TWEAK_IN_READ_ONLY_LEN 0 > - > -/* MC_CMD_MRSFP_TWEAK_OUT msgresponse */ > -#define MC_CMD_MRSFP_TWEAK_OUT_LEN 12 > -/* input bits */ > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_OFST 0 > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_LEN 4 > -/* output bits */ > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST 4 > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_LEN 4 > -/* direction */ > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OFST 8 > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_LEN 4 > -/* enum: Out. */ > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OUT 0x0 > -/* enum: In. */ > -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_IN 0x1 > - > - > -/***********************************/ > -/* MC_CMD_SENSOR_SET_LIMS > - * Adjusts the sensor limits. This is a warranty-voiding operation. Returns: > - * ENOENT if the sensor specified does not exist, EINVAL if the limits are out > - * of range. > - */ > -#define MC_CMD_SENSOR_SET_LIMS 0x4e > -#undef MC_CMD_0x4e_PRIVILEGE_CTG > - > -#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_SENSOR_SET_LIMS_IN msgrequest */ > -#define MC_CMD_SENSOR_SET_LIMS_IN_LEN 20 > -#define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_OFST 0 > -#define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ > -/* interpretation is is sensor-specific. */ > -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4 > -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN 4 > -/* interpretation is is sensor-specific. */ > -#define MC_CMD_SENSOR_SET_LIMS_IN_HI0_OFST 8 > -#define MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN 4 > -/* interpretation is is sensor-specific. */ > -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_OFST 12 > -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN 4 > -/* interpretation is is sensor-specific. */ > -#define MC_CMD_SENSOR_SET_LIMS_IN_HI1_OFST 16 > -#define MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN 4 > - > -/* MC_CMD_SENSOR_SET_LIMS_OUT msgresponse */ > -#define MC_CMD_SENSOR_SET_LIMS_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_GET_RESOURCE_LIMITS > - */ > -#define MC_CMD_GET_RESOURCE_LIMITS 0x4f > - > -/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */ > -#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0 > - > -/* MC_CMD_GET_RESOURCE_LIMITS_OUT msgresponse */ > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN 16 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_OFST 0 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_LEN 4 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_OFST 4 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_LEN 4 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_OFST 8 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_LEN 4 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_OFST 12 > -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_LEN 4 > - > - > /***********************************/ > /* MC_CMD_NVRAM_PARTITIONS > * Reads the list of available virtual NVRAM partition types. Locks required: > @@ -8582,806 +8990,6 @@ > #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_OFST 12 > #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_LEN 4 > > - > -/***********************************/ > -/* MC_CMD_CLP > - * Perform a CLP related operation, see SF-110495-PS for details of CLP > - * processing. This command has been extended to accomodate the requirements of > - * different manufacturers which are to be found in SF-119187-TC, SF-119186-TC, > - * SF-120509-TC and SF-117282-PS. > - */ > -#define MC_CMD_CLP 0x56 > -#undef MC_CMD_0x56_PRIVILEGE_CTG > - > -#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_CLP_IN msgrequest */ > -#define MC_CMD_CLP_IN_LEN 4 > -/* Sub operation */ > -#define MC_CMD_CLP_IN_OP_OFST 0 > -#define MC_CMD_CLP_IN_OP_LEN 4 > -/* enum: Return to factory default settings */ > -#define MC_CMD_CLP_OP_DEFAULT 0x1 > -/* enum: Set MAC address */ > -#define MC_CMD_CLP_OP_SET_MAC 0x2 > -/* enum: Get MAC address */ > -#define MC_CMD_CLP_OP_GET_MAC 0x3 > -/* enum: Set UEFI/GPXE boot mode */ > -#define MC_CMD_CLP_OP_SET_BOOT 0x4 > -/* enum: Get UEFI/GPXE boot mode */ > -#define MC_CMD_CLP_OP_GET_BOOT 0x5 > - > -/* MC_CMD_CLP_OUT msgresponse */ > -#define MC_CMD_CLP_OUT_LEN 0 > - > -/* MC_CMD_CLP_IN_DEFAULT msgrequest */ > -#define MC_CMD_CLP_IN_DEFAULT_LEN 4 > -/* MC_CMD_CLP_IN_OP_OFST 0 */ > -/* MC_CMD_CLP_IN_OP_LEN 4 */ > - > -/* MC_CMD_CLP_OUT_DEFAULT msgresponse */ > -#define MC_CMD_CLP_OUT_DEFAULT_LEN 0 > - > -/* MC_CMD_CLP_IN_SET_MAC msgrequest */ > -#define MC_CMD_CLP_IN_SET_MAC_LEN 12 > -/* MC_CMD_CLP_IN_OP_OFST 0 */ > -/* MC_CMD_CLP_IN_OP_LEN 4 */ > -/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00 > - * restores the permanent (factory-programmed) MAC address associated with the > - * port. A non-zero MAC address persists until a PCIe reset or a power cycle. > - */ > -#define MC_CMD_CLP_IN_SET_MAC_ADDR_OFST 4 > -#define MC_CMD_CLP_IN_SET_MAC_ADDR_LEN 6 > -/* Padding */ > -#define MC_CMD_CLP_IN_SET_MAC_RESERVED_OFST 10 > -#define MC_CMD_CLP_IN_SET_MAC_RESERVED_LEN 2 > - > -/* MC_CMD_CLP_OUT_SET_MAC msgresponse */ > -#define MC_CMD_CLP_OUT_SET_MAC_LEN 0 > - > -/* MC_CMD_CLP_IN_SET_MAC_V2 msgrequest */ > -#define MC_CMD_CLP_IN_SET_MAC_V2_LEN 16 > -/* MC_CMD_CLP_IN_OP_OFST 0 */ > -/* MC_CMD_CLP_IN_OP_LEN 4 */ > -/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00 > - * restores the permanent (factory-programmed) MAC address associated with the > - * port. A non-zero MAC address persists until a PCIe reset or a power cycle. > - */ > -#define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_OFST 4 > -#define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_LEN 6 > -/* Padding */ > -#define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_OFST 10 > -#define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_LEN 2 > -#define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_OFST 12 > -#define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_LEN 4 > -#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_OFST 12 > -#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_LBN 0 > -#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_WIDTH 1 > - > -/* MC_CMD_CLP_IN_GET_MAC msgrequest */ > -#define MC_CMD_CLP_IN_GET_MAC_LEN 4 > -/* MC_CMD_CLP_IN_OP_OFST 0 */ > -/* MC_CMD_CLP_IN_OP_LEN 4 */ > - > -/* MC_CMD_CLP_IN_GET_MAC_V2 msgrequest */ > -#define MC_CMD_CLP_IN_GET_MAC_V2_LEN 8 > -/* MC_CMD_CLP_IN_OP_OFST 0 */ > -/* MC_CMD_CLP_IN_OP_LEN 4 */ > -#define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_OFST 4 > -#define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_LEN 4 > -#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_OFST 4 > -#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_LBN 0 > -#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_WIDTH 1 > - > -/* MC_CMD_CLP_OUT_GET_MAC msgresponse */ > -#define MC_CMD_CLP_OUT_GET_MAC_LEN 8 > -/* MAC address assigned to port */ > -#define MC_CMD_CLP_OUT_GET_MAC_ADDR_OFST 0 > -#define MC_CMD_CLP_OUT_GET_MAC_ADDR_LEN 6 > -/* Padding */ > -#define MC_CMD_CLP_OUT_GET_MAC_RESERVED_OFST 6 > -#define MC_CMD_CLP_OUT_GET_MAC_RESERVED_LEN 2 > - > -/* MC_CMD_CLP_IN_SET_BOOT msgrequest */ > -#define MC_CMD_CLP_IN_SET_BOOT_LEN 5 > -/* MC_CMD_CLP_IN_OP_OFST 0 */ > -/* MC_CMD_CLP_IN_OP_LEN 4 */ > -/* Boot flag */ > -#define MC_CMD_CLP_IN_SET_BOOT_FLAG_OFST 4 > -#define MC_CMD_CLP_IN_SET_BOOT_FLAG_LEN 1 > - > -/* MC_CMD_CLP_OUT_SET_BOOT msgresponse */ > -#define MC_CMD_CLP_OUT_SET_BOOT_LEN 0 > - > -/* MC_CMD_CLP_IN_GET_BOOT msgrequest */ > -#define MC_CMD_CLP_IN_GET_BOOT_LEN 4 > -/* MC_CMD_CLP_IN_OP_OFST 0 */ > -/* MC_CMD_CLP_IN_OP_LEN 4 */ > - > -/* MC_CMD_CLP_OUT_GET_BOOT msgresponse */ > -#define MC_CMD_CLP_OUT_GET_BOOT_LEN 4 > -/* Boot flag */ > -#define MC_CMD_CLP_OUT_GET_BOOT_FLAG_OFST 0 > -#define MC_CMD_CLP_OUT_GET_BOOT_FLAG_LEN 1 > -/* Padding */ > -#define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_OFST 1 > -#define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_LEN 3 > - > - > -/***********************************/ > -/* MC_CMD_MUM > - * Perform a MUM operation > - */ > -#define MC_CMD_MUM 0x57 > -#undef MC_CMD_0x57_PRIVILEGE_CTG > - > -#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_MUM_IN msgrequest */ > -#define MC_CMD_MUM_IN_LEN 4 > -#define MC_CMD_MUM_IN_OP_HDR_OFST 0 > -#define MC_CMD_MUM_IN_OP_HDR_LEN 4 > -#define MC_CMD_MUM_IN_OP_OFST 0 > -#define MC_CMD_MUM_IN_OP_LBN 0 > -#define MC_CMD_MUM_IN_OP_WIDTH 8 > -/* enum: NULL MCDI command to MUM */ > -#define MC_CMD_MUM_OP_NULL 0x1 > -/* enum: Get MUM version */ > -#define MC_CMD_MUM_OP_GET_VERSION 0x2 > -/* enum: Issue raw I2C command to MUM */ > -#define MC_CMD_MUM_OP_RAW_CMD 0x3 > -/* enum: Read from registers on devices connected to MUM. */ > -#define MC_CMD_MUM_OP_READ 0x4 > -/* enum: Write to registers on devices connected to MUM. */ > -#define MC_CMD_MUM_OP_WRITE 0x5 > -/* enum: Control UART logging. */ > -#define MC_CMD_MUM_OP_LOG 0x6 > -/* enum: Operations on MUM GPIO lines */ > -#define MC_CMD_MUM_OP_GPIO 0x7 > -/* enum: Get sensor readings from MUM */ > -#define MC_CMD_MUM_OP_READ_SENSORS 0x8 > -/* enum: Initiate clock programming on the MUM */ > -#define MC_CMD_MUM_OP_PROGRAM_CLOCKS 0x9 > -/* enum: Initiate FPGA load from flash on the MUM */ > -#define MC_CMD_MUM_OP_FPGA_LOAD 0xa > -/* enum: Request sensor reading from MUM ADC resulting from earlier request via > - * MUM ATB > - */ > -#define MC_CMD_MUM_OP_READ_ATB_SENSOR 0xb > -/* enum: Send commands relating to the QSFP ports via the MUM for PHY > - * operations > - */ > -#define MC_CMD_MUM_OP_QSFP 0xc > -/* enum: Request discrete and SODIMM DDR info (type, size, speed grade, voltage > - * level) from MUM > - */ > -#define MC_CMD_MUM_OP_READ_DDR_INFO 0xd > - > -/* MC_CMD_MUM_IN_NULL msgrequest */ > -#define MC_CMD_MUM_IN_NULL_LEN 4 > -/* MUM cmd header */ > -#define MC_CMD_MUM_IN_CMD_OFST 0 > -#define MC_CMD_MUM_IN_CMD_LEN 4 > - > -/* MC_CMD_MUM_IN_GET_VERSION msgrequest */ > -#define MC_CMD_MUM_IN_GET_VERSION_LEN 4 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > - > -/* MC_CMD_MUM_IN_READ msgrequest */ > -#define MC_CMD_MUM_IN_READ_LEN 16 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -/* ID of (device connected to MUM) to read from registers of */ > -#define MC_CMD_MUM_IN_READ_DEVICE_OFST 4 > -#define MC_CMD_MUM_IN_READ_DEVICE_LEN 4 > -/* enum: Hittite HMC1035 clock generator on Sorrento board */ > -#define MC_CMD_MUM_DEV_HITTITE 0x1 > -/* enum: Hittite HMC1035 clock generator for NIC-side on Sorrento board */ > -#define MC_CMD_MUM_DEV_HITTITE_NIC 0x2 > -/* 32-bit address to read from */ > -#define MC_CMD_MUM_IN_READ_ADDR_OFST 8 > -#define MC_CMD_MUM_IN_READ_ADDR_LEN 4 > -/* Number of words to read. */ > -#define MC_CMD_MUM_IN_READ_NUMWORDS_OFST 12 > -#define MC_CMD_MUM_IN_READ_NUMWORDS_LEN 4 > - > -/* MC_CMD_MUM_IN_WRITE msgrequest */ > -#define MC_CMD_MUM_IN_WRITE_LENMIN 16 > -#define MC_CMD_MUM_IN_WRITE_LENMAX 252 > -#define MC_CMD_MUM_IN_WRITE_LENMAX_MCDI2 1020 > -#define MC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num)) > -#define MC_CMD_MUM_IN_WRITE_BUFFER_NUM(len) (((len)-12)/4) > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -/* ID of (device connected to MUM) to write to registers of */ > -#define MC_CMD_MUM_IN_WRITE_DEVICE_OFST 4 > -#define MC_CMD_MUM_IN_WRITE_DEVICE_LEN 4 > -/* enum: Hittite HMC1035 clock generator on Sorrento board */ > -/* MC_CMD_MUM_DEV_HITTITE 0x1 */ > -/* 32-bit address to write to */ > -#define MC_CMD_MUM_IN_WRITE_ADDR_OFST 8 > -#define MC_CMD_MUM_IN_WRITE_ADDR_LEN 4 > -/* Words to write */ > -#define MC_CMD_MUM_IN_WRITE_BUFFER_OFST 12 > -#define MC_CMD_MUM_IN_WRITE_BUFFER_LEN 4 > -#define MC_CMD_MUM_IN_WRITE_BUFFER_MINNUM 1 > -#define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM 60 > -#define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM_MCDI2 252 > - > -/* MC_CMD_MUM_IN_RAW_CMD msgrequest */ > -#define MC_CMD_MUM_IN_RAW_CMD_LENMIN 17 > -#define MC_CMD_MUM_IN_RAW_CMD_LENMAX 252 > -#define MC_CMD_MUM_IN_RAW_CMD_LENMAX_MCDI2 1020 > -#define MC_CMD_MUM_IN_RAW_CMD_LEN(num) (16+1*(num)) > -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_NUM(len) (((len)-16)/1) > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -/* MUM I2C cmd code */ > -#define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_OFST 4 > -#define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_LEN 4 > -/* Number of bytes to write */ > -#define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_OFST 8 > -#define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_LEN 4 > -/* Number of bytes to read */ > -#define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_OFST 12 > -#define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_LEN 4 > -/* Bytes to write */ > -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_OFST 16 > -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_LEN 1 > -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MINNUM 1 > -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM 236 > -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM_MCDI2 1004 > - > -/* MC_CMD_MUM_IN_LOG msgrequest */ > -#define MC_CMD_MUM_IN_LOG_LEN 8 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_LOG_OP_OFST 4 > -#define MC_CMD_MUM_IN_LOG_OP_LEN 4 > -#define MC_CMD_MUM_IN_LOG_OP_UART 0x1 /* enum */ > - > -/* MC_CMD_MUM_IN_LOG_OP_UART msgrequest */ > -#define MC_CMD_MUM_IN_LOG_OP_UART_LEN 12 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -/* MC_CMD_MUM_IN_LOG_OP_OFST 4 */ > -/* MC_CMD_MUM_IN_LOG_OP_LEN 4 */ > -/* Enable/disable debug output to UART */ > -#define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_OFST 8 > -#define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_LEN 4 > - > -/* MC_CMD_MUM_IN_GPIO msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_LEN 8 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_HDR_LEN 4 > -#define MC_CMD_MUM_IN_GPIO_OPCODE_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OPCODE_LBN 0 > -#define MC_CMD_MUM_IN_GPIO_OPCODE_WIDTH 8 > -#define MC_CMD_MUM_IN_GPIO_IN_READ 0x0 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE 0x1 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OUT_READ 0x2 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE 0x3 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ 0x4 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OP 0x5 /* enum */ > - > -/* MC_CMD_MUM_IN_GPIO_IN_READ msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_IN_READ_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_LEN 4 > - > -/* MC_CMD_MUM_IN_GPIO_OUT_WRITE msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_LEN 16 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_LEN 4 > -/* The first 32-bit word to be written to the GPIO OUT register. */ > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_OFST 8 > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_LEN 4 > -/* The second 32-bit word to be written to the GPIO OUT register. */ > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_OFST 12 > -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_LEN 4 > - > -/* MC_CMD_MUM_IN_GPIO_OUT_READ msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OUT_READ_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_LEN 4 > - > -/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_LEN 16 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_LEN 4 > -/* The first 32-bit word to be written to the GPIO OUT ENABLE register. */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_OFST 8 > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_LEN 4 > -/* The second 32-bit word to be written to the GPIO OUT ENABLE register. */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_OFST 12 > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_LEN 4 > - > -/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_LEN 4 > - > -/* MC_CMD_MUM_IN_GPIO_OP msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OP_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OP_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_HDR_LEN 4 > -#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_LBN 8 > -#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_WIDTH 8 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ 0x0 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE 0x1 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG 0x2 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE 0x3 /* enum */ > -#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_LBN 16 > -#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_WIDTH 8 > - > -/* MC_CMD_MUM_IN_GPIO_OP_OUT_READ msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_LEN 4 > - > -/* MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_LEN 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_LBN 24 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_WIDTH 8 > - > -/* MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_LEN 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_LBN 24 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_WIDTH 8 > - > -/* MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE msgrequest */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_LEN 8 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_LEN 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_OFST 4 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_LBN 24 > -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_WIDTH 8 > - > -/* MC_CMD_MUM_IN_READ_SENSORS msgrequest */ > -#define MC_CMD_MUM_IN_READ_SENSORS_LEN 8 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_OFST 4 > -#define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_LEN 4 > -#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_OFST 4 > -#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_LBN 0 > -#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_WIDTH 8 > -#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_OFST 4 > -#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_LBN 8 > -#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_WIDTH 8 > - > -/* MC_CMD_MUM_IN_PROGRAM_CLOCKS msgrequest */ > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_LEN 12 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -/* Bit-mask of clocks to be programmed */ > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_OFST 4 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_LEN 4 > -#define MC_CMD_MUM_CLOCK_ID_FPGA 0x0 /* enum */ > -#define MC_CMD_MUM_CLOCK_ID_DDR 0x1 /* enum */ > -#define MC_CMD_MUM_CLOCK_ID_NIC 0x2 /* enum */ > -/* Control flags for clock programming */ > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_OFST 8 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_LEN 4 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_OFST 8 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_LBN 0 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_WIDTH 1 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_OFST 8 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_LBN 1 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_WIDTH 1 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_OFST 8 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_LBN 2 > -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_WIDTH 1 > - > -/* MC_CMD_MUM_IN_FPGA_LOAD msgrequest */ > -#define MC_CMD_MUM_IN_FPGA_LOAD_LEN 8 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -/* Enable/Disable FPGA config from flash */ > -#define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_OFST 4 > -#define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_LEN 4 > - > -/* MC_CMD_MUM_IN_READ_ATB_SENSOR msgrequest */ > -#define MC_CMD_MUM_IN_READ_ATB_SENSOR_LEN 4 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > - > -/* MC_CMD_MUM_IN_QSFP msgrequest */ > -#define MC_CMD_MUM_IN_QSFP_LEN 12 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_QSFP_HDR_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_HDR_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_OPCODE_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_OPCODE_LBN 0 > -#define MC_CMD_MUM_IN_QSFP_OPCODE_WIDTH 4 > -#define MC_CMD_MUM_IN_QSFP_INIT 0x0 /* enum */ > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE 0x1 /* enum */ > -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP 0x2 /* enum */ > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO 0x3 /* enum */ > -#define MC_CMD_MUM_IN_QSFP_FILL_STATS 0x4 /* enum */ > -#define MC_CMD_MUM_IN_QSFP_POLL_BIST 0x5 /* enum */ > -#define MC_CMD_MUM_IN_QSFP_IDX_OFST 8 > -#define MC_CMD_MUM_IN_QSFP_IDX_LEN 4 > - > -/* MC_CMD_MUM_IN_QSFP_INIT msgrequest */ > -#define MC_CMD_MUM_IN_QSFP_INIT_LEN 16 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_QSFP_INIT_HDR_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_INIT_HDR_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_INIT_IDX_OFST 8 > -#define MC_CMD_MUM_IN_QSFP_INIT_IDX_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_INIT_CAGE_OFST 12 > -#define MC_CMD_MUM_IN_QSFP_INIT_CAGE_LEN 4 > - > -/* MC_CMD_MUM_IN_QSFP_RECONFIGURE msgrequest */ > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_LEN 24 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_OFST 8 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_OFST 12 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_OFST 16 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_OFST 20 > -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_LEN 4 > - > -/* MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP msgrequest */ > -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_LEN 12 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_OFST 8 > -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_LEN 4 > - > -/* MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO msgrequest */ > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_LEN 16 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_OFST 8 > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_OFST 12 > -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_LEN 4 > - > -/* MC_CMD_MUM_IN_QSFP_FILL_STATS msgrequest */ > -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_LEN 12 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_OFST 8 > -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_LEN 4 > - > -/* MC_CMD_MUM_IN_QSFP_POLL_BIST msgrequest */ > -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_LEN 12 > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_OFST 4 > -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_LEN 4 > -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_OFST 8 > -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_LEN 4 > - > -/* MC_CMD_MUM_IN_READ_DDR_INFO msgrequest */ > -#define MC_CMD_MUM_IN_READ_DDR_INFO_LEN 4 > -/* MUM cmd header */ > -/* MC_CMD_MUM_IN_CMD_OFST 0 */ > -/* MC_CMD_MUM_IN_CMD_LEN 4 */ > - > -/* MC_CMD_MUM_OUT msgresponse */ > -#define MC_CMD_MUM_OUT_LEN 0 > - > -/* MC_CMD_MUM_OUT_NULL msgresponse */ > -#define MC_CMD_MUM_OUT_NULL_LEN 0 > - > -/* MC_CMD_MUM_OUT_GET_VERSION msgresponse */ > -#define MC_CMD_MUM_OUT_GET_VERSION_LEN 12 > -#define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_OFST 0 > -#define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_LEN 4 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64 > -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32 > - > -/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */ > -#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1 > -#define MC_CMD_MUM_OUT_RAW_CMD_LENMAX 252 > -#define MC_CMD_MUM_OUT_RAW_CMD_LENMAX_MCDI2 1020 > -#define MC_CMD_MUM_OUT_RAW_CMD_LEN(num) (0+1*(num)) > -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_NUM(len) (((len)-0)/1) > -/* returned data */ > -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_OFST 0 > -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_LEN 1 > -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MINNUM 1 > -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM 252 > -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM_MCDI2 1020 > - > -/* MC_CMD_MUM_OUT_READ msgresponse */ > -#define MC_CMD_MUM_OUT_READ_LENMIN 4 > -#define MC_CMD_MUM_OUT_READ_LENMAX 252 > -#define MC_CMD_MUM_OUT_READ_LENMAX_MCDI2 1020 > -#define MC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num)) > -#define MC_CMD_MUM_OUT_READ_BUFFER_NUM(len) (((len)-0)/4) > -#define MC_CMD_MUM_OUT_READ_BUFFER_OFST 0 > -#define MC_CMD_MUM_OUT_READ_BUFFER_LEN 4 > -#define MC_CMD_MUM_OUT_READ_BUFFER_MINNUM 1 > -#define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM 63 > -#define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM_MCDI2 255 > - > -/* MC_CMD_MUM_OUT_WRITE msgresponse */ > -#define MC_CMD_MUM_OUT_WRITE_LEN 0 > - > -/* MC_CMD_MUM_OUT_LOG msgresponse */ > -#define MC_CMD_MUM_OUT_LOG_LEN 0 > - > -/* MC_CMD_MUM_OUT_LOG_OP_UART msgresponse */ > -#define MC_CMD_MUM_OUT_LOG_OP_UART_LEN 0 > - > -/* MC_CMD_MUM_OUT_GPIO_IN_READ msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_IN_READ_LEN 8 > -/* The first 32-bit word read from the GPIO IN register. */ > -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_OFST 0 > -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_LEN 4 > -/* The second 32-bit word read from the GPIO IN register. */ > -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_OFST 4 > -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_LEN 4 > - > -/* MC_CMD_MUM_OUT_GPIO_OUT_WRITE msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OUT_WRITE_LEN 0 > - > -/* MC_CMD_MUM_OUT_GPIO_OUT_READ msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_LEN 8 > -/* The first 32-bit word read from the GPIO OUT register. */ > -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_OFST 0 > -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_LEN 4 > -/* The second 32-bit word read from the GPIO OUT register. */ > -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_OFST 4 > -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_LEN 4 > - > -/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE_LEN 0 > - > -/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_LEN 8 > -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_OFST 0 > -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_LEN 4 > -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_OFST 4 > -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_LEN 4 > - > -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_READ msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_LEN 4 > -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_OFST 0 > -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_LEN 4 > - > -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE_LEN 0 > - > -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG_LEN 0 > - > -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE msgresponse */ > -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE_LEN 0 > - > -/* MC_CMD_MUM_OUT_READ_SENSORS msgresponse */ > -#define MC_CMD_MUM_OUT_READ_SENSORS_LENMIN 4 > -#define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX 252 > -#define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX_MCDI2 1020 > -#define MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num)) > -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_NUM(len) (((len)-0)/4) > -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_OFST 0 > -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4 > -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM 1 > -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM 63 > -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM_MCDI2 255 > -#define MC_CMD_MUM_OUT_READ_SENSORS_READING_OFST 0 > -#define MC_CMD_MUM_OUT_READ_SENSORS_READING_LBN 0 > -#define MC_CMD_MUM_OUT_READ_SENSORS_READING_WIDTH 16 > -#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_OFST 0 > -#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_LBN 16 > -#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_WIDTH 8 > -#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_OFST 0 > -#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_LBN 24 > -#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_WIDTH 8 > - > -/* MC_CMD_MUM_OUT_PROGRAM_CLOCKS msgresponse */ > -#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_LEN 4 > -#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_OFST 0 > -#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_LEN 4 > - > -/* MC_CMD_MUM_OUT_FPGA_LOAD msgresponse */ > -#define MC_CMD_MUM_OUT_FPGA_LOAD_LEN 0 > - > -/* MC_CMD_MUM_OUT_READ_ATB_SENSOR msgresponse */ > -#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_LEN 4 > -#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_OFST 0 > -#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_LEN 4 > - > -/* MC_CMD_MUM_OUT_QSFP_INIT msgresponse */ > -#define MC_CMD_MUM_OUT_QSFP_INIT_LEN 0 > - > -/* MC_CMD_MUM_OUT_QSFP_RECONFIGURE msgresponse */ > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_LEN 8 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_OFST 0 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_LEN 4 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_OFST 4 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_LEN 4 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_OFST 4 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_LBN 0 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_WIDTH 1 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_OFST 4 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_LBN 1 > -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_WIDTH 1 > - > -/* MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP msgresponse */ > -#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_LEN 4 > -#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_OFST 0 > -#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_LEN 4 > - > -/* MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO msgresponse */ > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMIN 5 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX 252 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX_MCDI2 1020 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num)) > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_NUM(len) (((len)-4)/1) > -/* in bytes */ > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_OFST 0 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_LEN 4 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_OFST 4 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_LEN 1 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MINNUM 1 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM 248 > -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM_MCDI2 1016 > - > -/* MC_CMD_MUM_OUT_QSFP_FILL_STATS msgresponse */ > -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_LEN 8 > -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_OFST 0 > -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_LEN 4 > -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_OFST 4 > -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_LEN 4 > - > -/* MC_CMD_MUM_OUT_QSFP_POLL_BIST msgresponse */ > -#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_LEN 4 > -#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_OFST 0 > -#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_LEN 4 > - > -/* MC_CMD_MUM_OUT_READ_DDR_INFO msgresponse */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMIN 24 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX 248 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX_MCDI2 1016 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LEN(num) (8+8*(num)) > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_NUM(len) (((len)-8)/8) > -/* Discrete (soldered) DDR resistor strap info */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_OFST 0 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_LEN 4 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_OFST 0 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_LBN 0 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_WIDTH 16 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_OFST 0 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_LBN 16 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_WIDTH 16 > -/* Number of SODIMM info records */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_OFST 4 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_LEN 4 > -/* Array of SODIMM info records */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_LBN 0 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_WIDTH 8 > -/* enum: SODIMM bank 1 (Top SODIMM for Sorrento) */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK1 0x0 > -/* enum: SODIMM bank 2 (Bottom SODDIMM for Sorrento) */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK2 0x1 > -/* enum: Total number of SODIMM banks */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_BANKS 0x2 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_LBN 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_WIDTH 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_LBN 16 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_WIDTH 4 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_LBN 20 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_WIDTH 4 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_POWERED 0x0 /* enum */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V25 0x1 /* enum */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V35 0x2 /* enum */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V5 0x3 /* enum */ > -/* enum: Values 5-15 are reserved for future usage */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V8 0x4 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_LBN 24 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_WIDTH 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_LBN 32 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_WIDTH 16 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_LBN 48 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_WIDTH 4 > -/* enum: No module present */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_ABSENT 0x0 > -/* enum: Module present supported and powered on */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_POWERED 0x1 > -/* enum: Module present but bad type */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_TYPE 0x2 > -/* enum: Module present but incompatible voltage */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_VOLTAGE 0x3 > -/* enum: Module present but unknown SPD */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SPD 0x4 > -/* enum: Module present but slot cannot support it */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SLOT 0x5 > -/* enum: Modules may or may not be present, but cannot establish contact by I2C > - */ > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_REACHABLE 0x6 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_OFST 8 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_LBN 52 > -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_WIDTH 12 > - > /* MC_CMD_DYNAMIC_SENSORS_LIMITS structuredef: Set of sensor limits. This > * should match the equivalent structure in the sensor_query SPHINX service. > */ > @@ -9500,27 +9108,22 @@ > * and a generation count for this version of the sensor table. On systems > * advertising the DYNAMIC_SENSORS capability bit, this replaces the > * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors > - * added by the NMC. > - * > - * Sensor handles are persistent for the lifetime of the sensor and are used to > - * identify sensors in MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and > - * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. > - * > - * The generation count is maintained by the MC, is persistent across reboots > - * and will be incremented each time the sensor table is modified. When the > - * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated > - * containing the new generation count. The driver should compare this against > - * the current generation count, and if it is different, call > - * MC_CMD_DYNAMIC_SENSORS_LIST again to update it's copy of the sensor table. > - * > - * The sensor count is provided to allow a future path to supporting more than > + * added by the NMC. Sensor handles are persistent for the lifetime of the > + * sensor and are used to identify sensors in > + * MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and > + * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. The generation count is maintained by the > + * MC, is persistent across reboots and will be incremented each time the > + * sensor table is modified. When the table is modified, a > + * CODE_DYNAMIC_SENSORS_CHANGE event will be generated containing the new > + * generation count. The driver should compare this against the current > + * generation count, and if it is different, call MC_CMD_DYNAMIC_SENSORS_LIST > + * again to update it's copy of the sensor table. The sensor count is provided > + * to allow a future path to supporting more than > * MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 sensors, i.e. > * the maximum number that will fit in a single response. As this is a fairly > * large number (253) it is not anticipated that this will be needed in the > - * near future, so can currently be ignored. > - * > - * On Riverhead this command is implemented as a wrapper for `list` in the > - * sensor_query SPHINX service. > + * near future, so can currently be ignored. On Riverhead this command is > + * implemented as a wrapper for `list` in the sensor_query SPHINX service. > */ > #define MC_CMD_DYNAMIC_SENSORS_LIST 0x66 > #undef MC_CMD_0x66_PRIVILEGE_CTG > @@ -9557,15 +9160,13 @@ > /***********************************/ > /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS > * Get descriptions for a set of sensors, specified as an array of sensor > - * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST > - * > - * Any handles which do not correspond to a sensor currently managed by the MC > - * will be dropped from from the response. This may happen when a sensor table > - * update is in progress, and effectively means the set of usable sensors is > - * the intersection between the sets of sensors known to the driver and the MC. > - * > - * On Riverhead this command is implemented as a wrapper for > - * `get_descriptions` in the sensor_query SPHINX service. > + * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. Any handles which do not > + * correspond to a sensor currently managed by the MC will be dropped from from > + * the response. This may happen when a sensor table update is in progress, and > + * effectively means the set of usable sensors is the intersection between the > + * sets of sensors known to the driver and the MC. On Riverhead this command is > + * implemented as a wrapper for `get_descriptions` in the sensor_query SPHINX > + * service. > */ > #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67 > #undef MC_CMD_0x67_PRIVILEGE_CTG > @@ -9602,19 +9203,15 @@ > /***********************************/ > /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS > * Read the state and value for a set of sensors, specified as an array of > - * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. > - * > - * In the case of a broken sensor, then the state of the response's > - * MC_CMD_DYNAMIC_SENSORS_VALUE entry will be set to BROKEN, and any value > - * provided should be treated as erroneous. > - * > - * Any handles which do not correspond to a sensor currently managed by the MC > - * will be dropped from from the response. This may happen when a sensor table > - * update is in progress, and effectively means the set of usable sensors is > - * the intersection between the sets of sensors known to the driver and the MC. > - * > - * On Riverhead this command is implemented as a wrapper for `get_readings` > - * in the sensor_query SPHINX service. > + * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. In the case of a > + * broken sensor, then the state of the response's MC_CMD_DYNAMIC_SENSORS_VALUE > + * entry will be set to BROKEN, and any value provided should be treated as > + * erroneous. Any handles which do not correspond to a sensor currently managed > + * by the MC will be dropped from from the response. This may happen when a > + * sensor table update is in progress, and effectively means the set of usable > + * sensors is the intersection between the sets of sensors known to the driver > + * and the MC. On Riverhead this command is implemented as a wrapper for > + * `get_readings` in the sensor_query SPHINX service. > */ > #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68 > #undef MC_CMD_0x68_PRIVILEGE_CTG > @@ -9647,45 +9244,1190 @@ > #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM 21 > #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM_MCDI2 85 > > +/* MC_CMD_MAC_FLAGS structuredef */ > +#define MC_CMD_MAC_FLAGS_LEN 4 > +/* The enums defined in this field are used as indices into the > + * MC_CMD_MAC_FLAGS bitmask. > + */ > +#define MC_CMD_MAC_FLAGS_MASK_OFST 0 > +#define MC_CMD_MAC_FLAGS_MASK_LEN 4 > +/* enum property: bitshift */ > +/* enum: Include the FCS in the packet data delivered to the host. Ignored if > + * RX_INCLUDE_FCS not set in capabilities. > + */ > +#define MC_CMD_MAC_FLAGS_FLAG_INCLUDE_FCS 0x0 > +#define MC_CMD_MAC_FLAGS_MASK_LBN 0 > +#define MC_CMD_MAC_FLAGS_MASK_WIDTH 32 > + > +/* MC_CMD_TRANSMISSION_MODE structuredef */ > +#define MC_CMD_TRANSMISSION_MODE_LEN 4 > +#define MC_CMD_TRANSMISSION_MODE_MASK_OFST 0 > +#define MC_CMD_TRANSMISSION_MODE_MASK_LEN 4 > +/* enum property: value */ > +#define MC_CMD_TRANSMISSION_MODE_PROMSC_MODE 0x0 /* enum */ > +#define MC_CMD_TRANSMISSION_MODE_UNCST_MODE 0x1 /* enum */ > +#define MC_CMD_TRANSMISSION_MODE_BRDCST_MODE 0x2 /* enum */ > +#define MC_CMD_TRANSMISSION_MODE_MASK_LBN 0 > +#define MC_CMD_TRANSMISSION_MODE_MASK_WIDTH 32 > + > +/* MC_CMD_MAC_CONFIG_OPTIONS structuredef */ > +#define MC_CMD_MAC_CONFIG_OPTIONS_LEN 4 > +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_OFST 0 > +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_LEN 4 > +/* enum property: bitmask */ > +/* enum: Configure the MAC address. */ > +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_ADDR 0x0 > +/* enum: Configure the maximum frame length. */ > +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_MAX_FRAME_LEN 0x1 > +/* enum: Configure flow control. */ > +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_FCNTL 0x2 > +/* enum: Configure the transmission mode. */ > +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_TRANSMISSION_MODE 0x3 > +/* enum: Configure FCS. */ > +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_INCLUDE_FCS 0x4 > +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_LBN 0 > +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_WIDTH 32 > + > + > +/***********************************/ > +/* MC_CMD_MAC_CTRL > + * Set MAC configuration. Return code: 0, EINVAL, ENOTSUP > + */ > +#define MC_CMD_MAC_CTRL 0x1df > +#undef MC_CMD_0x1df_PRIVILEGE_CTG > + > +#define MC_CMD_0x1df_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_MAC_CTRL_IN msgrequest */ > +#define MC_CMD_MAC_CTRL_IN_LEN 32 > +/* Handle for selected network port. */ > +#define MC_CMD_MAC_CTRL_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_MAC_CTRL_IN_PORT_HANDLE_LEN 4 > +/* Select which parameters to configure. A parameter will only be modified if > + * the corresponding control flag is set. > + */ > +#define MC_CMD_MAC_CTRL_IN_CONTROL_FLAGS_OFST 4 > +#define MC_CMD_MAC_CTRL_IN_CONTROL_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_MAC_CONFIG_OPTIONS/MASK */ > +/* MAC address of the device. */ > +#define MC_CMD_MAC_CTRL_IN_ADDR_OFST 8 > +#define MC_CMD_MAC_CTRL_IN_ADDR_LEN 8 > +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_OFST 8 > +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_LEN 4 > +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_LBN 64 > +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_WIDTH 32 > +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_OFST 12 > +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_LEN 4 > +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_LBN 96 > +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_WIDTH 32 > +/* Includes the ethernet header, optional VLAN tags, payload and FCS. */ > +#define MC_CMD_MAC_CTRL_IN_MAX_FRAME_LEN_OFST 16 > +#define MC_CMD_MAC_CTRL_IN_MAX_FRAME_LEN_LEN 4 > +/* Settings for flow control. */ > +#define MC_CMD_MAC_CTRL_IN_FCNTL_OFST 20 > +#define MC_CMD_MAC_CTRL_IN_FCNTL_LEN 4 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_FCNTL/MASK */ > +/* Configure the MAC to transmit in one of promiscuous, unicast or broadcast > + * mode. > + */ > +#define MC_CMD_MAC_CTRL_IN_TRANSMISSION_MODE_OFST 24 > +#define MC_CMD_MAC_CTRL_IN_TRANSMISSION_MODE_LEN 4 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_TRANSMISSION_MODE/MASK */ > +/* Flags to control and expand the configuration of the MAC. */ > +#define MC_CMD_MAC_CTRL_IN_FLAGS_OFST 28 > +#define MC_CMD_MAC_CTRL_IN_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_MAC_FLAGS/MASK */ > > -/***********************************/ > -/* MC_CMD_EVENT_CTRL > - * Configure which categories of unsolicited events the driver expects to > - * receive (Riverhead). > - */ > -#define MC_CMD_EVENT_CTRL 0x69 > -#undef MC_CMD_0x69_PRIVILEGE_CTG > - > -#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_EVENT_CTRL_IN msgrequest */ > -#define MC_CMD_EVENT_CTRL_IN_LENMIN 0 > -#define MC_CMD_EVENT_CTRL_IN_LENMAX 252 > -#define MC_CMD_EVENT_CTRL_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_EVENT_CTRL_IN_LEN(num) (0+4*(num)) > -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_NUM(len) (((len)-0)/4) > -/* Array of event categories for which the driver wishes to receive events. */ > -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_OFST 0 > -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_LEN 4 > -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MINNUM 0 > -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM 63 > -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM_MCDI2 255 > -/* enum: Driver wishes to receive LINKCHANGE events. */ > -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_LINKCHANGE 0x0 > -/* enum: Driver wishes to receive SENSOR_CHANGE and SENSOR_STATE_CHANGE events. > - */ > -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_SENSOREVT 0x1 > -/* enum: Driver wishes to receive receive errors. */ > -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_RX_ERR 0x2 > -/* enum: Driver wishes to receive transmit errors. */ > -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_TX_ERR 0x3 > -/* enum: Driver wishes to receive firmware alerts. */ > -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_FWALERT 0x4 > -/* enum: Driver wishes to receive reboot events. */ > -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_MC_REBOOT 0x5 > - > -/* MC_CMD_EVENT_CTRL_OUT msgrequest */ > -#define MC_CMD_EVENT_CTRL_OUT_LEN 0 > +/* MC_CMD_MAC_CTRL_IN_V2 msgrequest: Updated MAC_CTRL with QBB mask */ > +#define MC_CMD_MAC_CTRL_IN_V2_LEN 33 > +/* Handle for selected network port. */ > +#define MC_CMD_MAC_CTRL_IN_V2_PORT_HANDLE_OFST 0 > +#define MC_CMD_MAC_CTRL_IN_V2_PORT_HANDLE_LEN 4 > +/* Select which parameters to configure. A parameter will only be modified if > + * the corresponding control flag is set. > + */ > +#define MC_CMD_MAC_CTRL_IN_V2_CONTROL_FLAGS_OFST 4 > +#define MC_CMD_MAC_CTRL_IN_V2_CONTROL_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_MAC_CONFIG_OPTIONS/MASK */ > +/* MAC address of the device. */ > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_OFST 8 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LEN 8 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_OFST 8 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_LEN 4 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_LBN 64 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_WIDTH 32 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_OFST 12 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_LEN 4 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_LBN 96 > +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_WIDTH 32 > +/* Includes the ethernet header, optional VLAN tags, payload and FCS. */ > +#define MC_CMD_MAC_CTRL_IN_V2_MAX_FRAME_LEN_OFST 16 > +#define MC_CMD_MAC_CTRL_IN_V2_MAX_FRAME_LEN_LEN 4 > +/* Settings for flow control. */ > +#define MC_CMD_MAC_CTRL_IN_V2_FCNTL_OFST 20 > +#define MC_CMD_MAC_CTRL_IN_V2_FCNTL_LEN 4 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_FCNTL/MASK */ > +/* Configure the MAC to transmit in one of promiscuous, unicast or broadcast > + * mode. > + */ > +#define MC_CMD_MAC_CTRL_IN_V2_TRANSMISSION_MODE_OFST 24 > +#define MC_CMD_MAC_CTRL_IN_V2_TRANSMISSION_MODE_LEN 4 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_TRANSMISSION_MODE/MASK */ > +/* Flags to control and expand the configuration of the MAC. */ > +#define MC_CMD_MAC_CTRL_IN_V2_FLAGS_OFST 28 > +#define MC_CMD_MAC_CTRL_IN_V2_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_MAC_FLAGS/MASK */ > +/* Priority-based flow control mask (QBB). PRIO7 corresponds to the highest > + * priority, and PRIO0 to the lowest. This field is only used when CFG_FCNTL is > + * set and FCNTL is QBB > + */ > +#define MC_CMD_MAC_CTRL_IN_V2_PRIO_FCNTL_MASK_OFST 32 > +#define MC_CMD_MAC_CTRL_IN_V2_PRIO_FCNTL_MASK_LEN 1 > +/* enum property: bitmask */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO0 0x0 /* enum */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO1 0x1 /* enum */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO2 0x2 /* enum */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO3 0x3 /* enum */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO4 0x4 /* enum */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO5 0x5 /* enum */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO6 0x6 /* enum */ > +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO7 0x7 /* enum */ > + > +/* MC_CMD_MAC_CTRL_OUT msgresponse */ > +#define MC_CMD_MAC_CTRL_OUT_LEN 0 > + > + > +/***********************************/ > +/* MC_CMD_MAC_STATE > + * Read the MAC state. Return code: 0, ETIME. > + */ > +#define MC_CMD_MAC_STATE 0x1e0 > +#undef MC_CMD_0x1e0_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e0_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_MAC_STATE_IN msgrequest */ > +#define MC_CMD_MAC_STATE_IN_LEN 4 > +/* Handle for selected network port. */ > +#define MC_CMD_MAC_STATE_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_MAC_STATE_IN_PORT_HANDLE_LEN 4 > + > +/* MC_CMD_MAC_STATE_OUT msgresponse */ > +#define MC_CMD_MAC_STATE_OUT_LEN 32 > +/* The configured maximum frame length of the MAC. */ > +#define MC_CMD_MAC_STATE_OUT_MAX_FRAME_LEN_OFST 0 > +#define MC_CMD_MAC_STATE_OUT_MAX_FRAME_LEN_LEN 4 > +/* This returns the negotiated flow control value. */ > +#define MC_CMD_MAC_STATE_OUT_FCNTL_OFST 4 > +#define MC_CMD_MAC_STATE_OUT_FCNTL_LEN 4 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_FCNTL/MASK */ > +/* MAC address of the device. */ > +#define MC_CMD_MAC_STATE_OUT_ADDR_OFST 8 > +#define MC_CMD_MAC_STATE_OUT_ADDR_LEN 8 > +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_OFST 8 > +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_LEN 4 > +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_LBN 64 > +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_WIDTH 32 > +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_OFST 12 > +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_LEN 4 > +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_LBN 96 > +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_WIDTH 32 > +/* Flags indicating MAC faults. */ > +#define MC_CMD_MAC_STATE_OUT_MAC_FAULT_FLAGS_OFST 16 > +#define MC_CMD_MAC_STATE_OUT_MAC_FAULT_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* enum: Indicates a local MAC fault. */ > +#define MC_CMD_MAC_STATE_OUT_LOCAL 0x0 > +/* enum: Indicates a remote MAC fault. */ > +#define MC_CMD_MAC_STATE_OUT_REMOTE 0x1 > +/* enum: Indicates a pending reconfiguration of the MAC. */ > +#define MC_CMD_MAC_STATE_OUT_PENDING_RECONFIG 0x2 > +/* The flags that were used to configure the MAC. This is a copy of the FLAGS > + * field in the MC_CMD_MAC_CTRL_IN command. > + */ > +#define MC_CMD_MAC_STATE_OUT_FLAGS_OFST 20 > +#define MC_CMD_MAC_STATE_OUT_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_MAC_FLAGS/MASK */ > +/* The transmission mode that was used to configure the MAC. This is a copy of > + * the TRANSMISSION_MODE field in the MC_CMD_MAC_CTRL_IN command. > + */ > +#define MC_CMD_MAC_STATE_OUT_TRANSMISSION_MODE_OFST 24 > +#define MC_CMD_MAC_STATE_OUT_TRANSMISSION_MODE_LEN 4 > +/* enum property: value */ > +/* Enum values, see field(s): */ > +/* MC_CMD_TRANSMISSION_MODE/MASK */ > +/* The control flags that were used to configure the MAC. This is a copy of the > + * CONTROL field in the MC_CMD_MAC_CTRL_IN command. > + */ > +#define MC_CMD_MAC_STATE_OUT_CONTROL_FLAGS_OFST 28 > +#define MC_CMD_MAC_STATE_OUT_CONTROL_FLAGS_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_MAC_CONFIG_OPTIONS/MASK */ > + > + > +/***********************************/ > +/* MC_CMD_GET_ASSIGNED_PORT_HANDLE > + * Obtain a handle that can be operated on to configure and query the status of > + * the link. ENOENT is returned when no port is assigned to the client. Return > + * code: 0, ENOENT > + */ > +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE 0x1e2 > +#undef MC_CMD_0x1e2_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e2_PRIVILEGE_CTG SRIOV_CTG_GENERAL > + > +/* MC_CMD_GET_ASSIGNED_PORT_HANDLE_IN msgrequest */ > +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_IN_LEN 0 > + > +/* MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT msgresponse */ > +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_LEN 4 > +/* Handle for assigned port. */ > +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_PORT_HANDLE_OFST 0 > +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_PORT_HANDLE_LEN 4 > + > +/* MC_CMD_STAT_ID structuredef */ > +#define MC_CMD_STAT_ID_LEN 4 > +#define MC_CMD_STAT_ID_SOURCE_ID_OFST 0 > +#define MC_CMD_STAT_ID_SOURCE_ID_LEN 2 > +/* enum property: index */ > +/* enum: Internal markers (generation start and end markers) */ > +#define MC_CMD_STAT_ID_MARKER 0x1 > +/* enum: Network port MAC statistics. */ > +#define MC_CMD_STAT_ID_MAC 0x2 > +/* enum: Network port PHY statistics. */ > +#define MC_CMD_STAT_ID_PHY 0x3 > +#define MC_CMD_STAT_ID_SOURCE_ID_LBN 0 > +#define MC_CMD_STAT_ID_SOURCE_ID_WIDTH 16 > +#define MC_CMD_STAT_ID_MARKER_STAT_ID_OFST 2 > +#define MC_CMD_STAT_ID_MARKER_STAT_ID_LEN 2 > +/* enum property: index */ > +/* enum: This value is used to mark the start of a generation of statistics for > + * DMA synchronization. It is incremented whenever a new set of statistics is > + * transferred. Always the first entry in the DMA buffer. > + */ > +#define MC_CMD_STAT_ID_GENERATION_START 0x1 > +/* enum: This value is used to mark the end of a generation of statistics for > + * DMA synchronizaion. Always the last entry in the DMA buffer and set to the > + * same value as GENERATION_START. The host driver must compare the > + * GENERATION_START and GENERATION_END values to verify that the DMA buffer is > + * consistent upon copying the the DMA buffer. If they do not match, it means > + * that new DMA transfer has started while the host driver was copying the DMA > + * buffer. In this case, the host driver must repeat the copy operation. > + */ > +#define MC_CMD_STAT_ID_GENERATION_END 0x2 > +#define MC_CMD_STAT_ID_MARKER_STAT_ID_LBN 16 > +#define MC_CMD_STAT_ID_MARKER_STAT_ID_WIDTH 16 > +#define MC_CMD_STAT_ID_MAC_STAT_ID_OFST 2 > +#define MC_CMD_STAT_ID_MAC_STAT_ID_LEN 2 > +/* enum property: index */ > +/* enum: Total number of packets transmitted (includes pause frames). */ > +#define MC_CMD_STAT_ID_TX_PKTS 0x1 > +/* enum: Pause frames transmitted. */ > +#define MC_CMD_STAT_ID_TX_PAUSE_PKTS 0x2 > +/* enum: Control frames transmitted. */ > +#define MC_CMD_STAT_ID_TX_CONTROL_PKTS 0x3 > +/* enum: Unicast packets transmitted (includes pause frames). */ > +#define MC_CMD_STAT_ID_TX_UNICAST_PKTS 0x4 > +/* enum: Multicast packets transmitted (includes pause frames). */ > +#define MC_CMD_STAT_ID_TX_MULTICAST_PKTS 0x5 > +/* enum: Broadcast packets transmitted (includes pause frames). */ > +#define MC_CMD_STAT_ID_TX_BROADCAST_PKTS 0x6 > +/* enum: Bytes transmitted (includes pause frames). */ > +#define MC_CMD_STAT_ID_TX_BYTES 0x7 > +/* enum: Bytes transmitted with bad CRC. */ > +#define MC_CMD_STAT_ID_TX_BAD_BYTES 0x8 > +/* enum: Bytes transmitted with good CRC. */ > +#define MC_CMD_STAT_ID_TX_GOOD_BYTES 0x9 > +/* enum: Packets transmitted with length less than 64 bytes. */ > +#define MC_CMD_STAT_ID_TX_LT64_PKTS 0xa > +/* enum: Packets transmitted with length equal to 64 bytes. */ > +#define MC_CMD_STAT_ID_TX_64_PKTS 0xb > +/* enum: Packets transmitted with length between 65 and 127 bytes. */ > +#define MC_CMD_STAT_ID_TX_65_TO_127_PKTS 0xc > +/* enum: Packets transmitted with length between 128 and 255 bytes. */ > +#define MC_CMD_STAT_ID_TX_128_TO_255_PKTS 0xd > +/* enum: Packets transmitted with length between 256 and 511 bytes. */ > +#define MC_CMD_STAT_ID_TX_256_TO_511_PKTS 0xe > +/* enum: Packets transmitted with length between 512 and 1023 bytes. */ > +#define MC_CMD_STAT_ID_TX_512_TO_1023_PKTS 0xf > +/* enum: Packets transmitted with length between 1024 and 1518 bytes. */ > +#define MC_CMD_STAT_ID_TX_1024_TO_15XX_PKTS 0x10 > +/* enum: Packets transmitted with length between 1519 and 9216 bytes. */ > +#define MC_CMD_STAT_ID_TX_15XX_TO_JUMBO_PKTS 0x11 > +/* enum: Packets transmitted with length greater than 9216 bytes. */ > +#define MC_CMD_STAT_ID_TX_GTJUMBO_PKTS 0x12 > +/* enum: Packets transmitted with bad FCS. */ > +#define MC_CMD_STAT_ID_TX_BAD_FCS_PKTS 0x13 > +/* enum: Packets transmitted with good FCS. */ > +#define MC_CMD_STAT_ID_TX_GOOD_FCS_PKTS 0x14 > +/* enum: Packets received. */ > +#define MC_CMD_STAT_ID_RX_PKTS 0x15 > +/* enum: Pause frames received. */ > +#define MC_CMD_STAT_ID_RX_PAUSE_PKTS 0x16 > +/* enum: Total number of good packets received. */ > +#define MC_CMD_STAT_ID_RX_GOOD_PKTS 0x17 > +/* enum: Total number of BAD packets received. */ > +#define MC_CMD_STAT_ID_RX_BAD_PKTS 0x18 > +/* enum: Total number of control frames received. */ > +#define MC_CMD_STAT_ID_RX_CONTROL_PKTS 0x19 > +/* enum: Total number of unicast packets received. */ > +#define MC_CMD_STAT_ID_RX_UNICAST_PKTS 0x1a > +/* enum: Total number of multicast packets received. */ > +#define MC_CMD_STAT_ID_RX_MULTICAST_PKTS 0x1b > +/* enum: Total number of broadcast packets received. */ > +#define MC_CMD_STAT_ID_RX_BROADCAST_PKTS 0x1c > +/* enum: Total number of bytes received. */ > +#define MC_CMD_STAT_ID_RX_BYTES 0x1d > +/* enum: Total number of bytes received with bad CRC. */ > +#define MC_CMD_STAT_ID_RX_BAD_BYTES 0x1e > +/* enum: Total number of bytes received with GOOD CRC. */ > +#define MC_CMD_STAT_ID_RX_GOOD_BYTES 0x1f > +/* enum: Packets received with length equal to 64 bytes. */ > +#define MC_CMD_STAT_ID_RX_64_PKTS 0x20 > +/* enum: Packets received with length between 65 and 127 bytes. */ > +#define MC_CMD_STAT_ID_RX_65_TO_127_PKTS 0x21 > +/* enum: Packets received with length between 128 and 255 bytes. */ > +#define MC_CMD_STAT_ID_RX_128_TO_255_PKTS 0x22 > +/* enum: Packets received with length between 256 and 511 bytes. */ > +#define MC_CMD_STAT_ID_RX_256_TO_511_PKTS 0x23 > +/* enum: Packets received with length between 512 and 1023 bytes. */ > +#define MC_CMD_STAT_ID_RX_512_TO_1023_PKTS 0x24 > +/* enum: Packets received with length between 1024 and 1518 bytes. */ > +#define MC_CMD_STAT_ID_RX_1024_TO_15XX_PKTS 0x25 > +/* enum: Packets received with length between 1519 and 9216 bytes. */ > +#define MC_CMD_STAT_ID_RX_15XX_TO_JUMBO_PKTS 0x26 > +/* enum: Packets received with length greater than 9216 bytes. */ > +#define MC_CMD_STAT_ID_RX_GTJUMBO_PKTS 0x27 > +/* enum: Packets received with length less than 64 bytes. */ > +#define MC_CMD_STAT_ID_RX_UNDERSIZE_PKTS 0x28 > +/* enum: Packets received with bad FCS. */ > +#define MC_CMD_STAT_ID_RX_BAD_FCS_PKTS 0x29 > +/* enum: Packets received with GOOD FCS. */ > +#define MC_CMD_STAT_ID_RX_GOOD_FCS_PKTS 0x2a > +/* enum: Packets received with overflow. */ > +#define MC_CMD_STAT_ID_RX_OVERFLOW_PKTS 0x2b > +/* enum: Packets received with symbol error. */ > +#define MC_CMD_STAT_ID_RX_SYMBOL_ERROR_PKTS 0x2c > +/* enum: Packets received with alignment error. */ > +#define MC_CMD_STAT_ID_RX_ALIGN_ERROR_PKTS 0x2d > +/* enum: Packets received with length error. */ > +#define MC_CMD_STAT_ID_RX_LENGTH_ERROR_PKTS 0x2e > +/* enum: Packets received with internal error. */ > +#define MC_CMD_STAT_ID_RX_INTERNAL_ERROR_PKTS 0x2f > +/* enum: Packets received with jabber. These packets are larger than the > + * allowed maximum receive unit (MRU). This indicates that a packet either has > + * a bad CRC or has an RX error. > + */ > +#define MC_CMD_STAT_ID_RX_JABBER_PKTS 0x30 > +/* enum: Packets dropped due to having no descriptor. This is a datapath stat > + */ > +#define MC_CMD_STAT_ID_RX_NODESC_DROPS 0x31 > +/* enum: Packets received with lanes 0 and 1 character error. */ > +#define MC_CMD_STAT_ID_RX_LANES01_CHAR_ERR 0x32 > +/* enum: Packets received with lanes 2 and 3 character error. */ > +#define MC_CMD_STAT_ID_RX_LANES23_CHAR_ERR 0x33 > +/* enum: Packets received with lanes 0 and 1 disparity error. */ > +#define MC_CMD_STAT_ID_RX_LANES01_DISP_ERR 0x34 > +/* enum: Packets received with lanes 2 and 3 disparity error. */ > +#define MC_CMD_STAT_ID_RX_LANES23_DISP_ERR 0x35 > +/* enum: Packets received with match fault. */ > +#define MC_CMD_STAT_ID_RX_MATCH_FAULT 0x36 > +#define MC_CMD_STAT_ID_MAC_STAT_ID_LBN 16 > +#define MC_CMD_STAT_ID_MAC_STAT_ID_WIDTH 16 > +/* Include FEC stats. */ > +#define MC_CMD_STAT_ID_PHY_STAT_ID_OFST 2 > +#define MC_CMD_STAT_ID_PHY_STAT_ID_LEN 2 > +/* enum property: index */ > +/* enum: Number of uncorrected FEC codewords on link (RS-FEC only from Medford2 > + * onwards) > + */ > +#define MC_CMD_STAT_ID_FEC_UNCORRECTED_ERRORS 0x1 > +/* enum: Number of corrected FEC codewords on link (RS-FEC only from Medford2 > + * onwards) > + */ > +#define MC_CMD_STAT_ID_FEC_CORRECTED_ERRORS 0x2 > +/* enum: Number of corrected 10-bit symbol errors, lane 0 (RS-FEC only) */ > +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE0 0x3 > +/* enum: Number of corrected 10-bit symbol errors, lane 1 (RS-FEC only) */ > +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE1 0x4 > +/* enum: Number of corrected 10-bit symbol errors, lane 2 (RS-FEC only) */ > +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE2 0x5 > +/* enum: Number of corrected 10-bit symbol errors, lane 3 (RS-FEC only) */ > +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE3 0x6 > +#define MC_CMD_STAT_ID_PHY_STAT_ID_LBN 16 > +#define MC_CMD_STAT_ID_PHY_STAT_ID_WIDTH 16 > + > +/* MC_CMD_STAT_DESC structuredef: Structure describing the layout and size of > + * the stats DMA buffer descriptor. > + */ > +#define MC_CMD_STAT_DESC_LEN 8 > +/* Unique identifier of the statistic. Formatted as MC_CMD_STAT_ID */ > +#define MC_CMD_STAT_DESC_STAT_ID_OFST 0 > +#define MC_CMD_STAT_DESC_STAT_ID_LEN 4 > +#define MC_CMD_STAT_DESC_STAT_ID_LBN 0 > +#define MC_CMD_STAT_DESC_STAT_ID_WIDTH 32 > +/* See structuredef: MC_CMD_STAT_ID */ > +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_OFST 0 > +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_LEN 2 > +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_LBN 0 > +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_WIDTH 16 > +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_OFST 2 > +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_LEN 2 > +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_LBN 16 > +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_WIDTH 16 > +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_OFST 2 > +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_LEN 2 > +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_LBN 16 > +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_WIDTH 16 > +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_OFST 2 > +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_LEN 2 > +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_LBN 16 > +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_WIDTH 16 > +/* Index of the statistic in the DMA buffer. */ > +#define MC_CMD_STAT_DESC_STAT_INDEX_OFST 4 > +#define MC_CMD_STAT_DESC_STAT_INDEX_LEN 2 > +#define MC_CMD_STAT_DESC_STAT_INDEX_LBN 32 > +#define MC_CMD_STAT_DESC_STAT_INDEX_WIDTH 16 > +/* Reserved for future extension (e.g. flags field) - currently always 0. */ > +#define MC_CMD_STAT_DESC_RESERVED_OFST 6 > +#define MC_CMD_STAT_DESC_RESERVED_LEN 2 > +#define MC_CMD_STAT_DESC_RESERVED_LBN 48 > +#define MC_CMD_STAT_DESC_RESERVED_WIDTH 16 > + > + > +/***********************************/ > +/* MC_CMD_MAC_STATISTICS_DESCRIPTOR > + * Get a list of descriptors that describe the layout and size of the stats > + * buffer required for retrieving statistics for a given port. Each entry in > + * the list is formatted as MC_CMD_STAT_DESC and provides the ID of each stat > + * and its location and size in the buffer. It also gives the overall minimum > + * size of the DMA buffer required when DMA mode is used. Note that the first > + * and last entries in the list are reserved for the generation start > + * (MC_CMD_MARKER_STAT_GENERATION_START) and end > + * (MC_CMD_MARKER_STAT_GENERATION_END) markers respectively, to be used for DMA > + * synchronisation as described in the documentation for the relevant enum > + * entries. The entries are present in the buffer even if DMA mode is not used. > + * Provisions are made (but currently unused) for extending the size of the > + * descriptors, extending the size of the list beyond the maximum MCDI response > + * size, as well as the dynamic runtime updates of the list. Returns: 0 on > + * success, ENOENT on non-existent port handle > + */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR 0x1e3 > +#undef MC_CMD_0x1e3_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e3_PRIVILEGE_CTG SRIOV_CTG_GENERAL > + > +/* MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN msgrequest */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_LEN 8 > +/* Handle of port to get MAC statitstics descriptors for. */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_PORT_HANDLE_LEN 4 > +/* Offset of the first entry to return, for cases where not all entries fit in > + * the MCDI response. Should be set to 0 on initial request, and on subsequent > + * requests updated by the number of entries already returned, as long as the > + * MORE_ENTRIES flag is set. > + */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_OFFSET_OFST 4 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_OFFSET_LEN 4 > + > +/* MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT msgresponse */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMIN 28 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMAX 252 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMAX_MCDI2 1020 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LEN(num) (20+8*(num)) > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_NUM(len) (((len)-20)/8) > +/* Generation number of the stats buffer. This is incremented each time the > + * buffer is updated, and is used to verify the consistency of the buffer > + * contents. Reserved for future extension (dynamic list updates). Currently > + * always set to 0. > + */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_GENERATION_OFST 0 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_GENERATION_LEN 4 > +/* Minimum size of the DMA buffer required to retrieve all statistics for the > + * port. This is the sum of the sizes of all the statistics, plus the size of > + * the generation markers. Minimum buffer size in bytes required to fit all > + * statistics. Drivers will typically round up this value to the granularity of > + * the host DMA allocation units. > + */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_DMA_BUFFER_SIZE_OFST 4 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_DMA_BUFFER_SIZE_LEN 4 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_FLAGS_OFST 8 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_FLAGS_LEN 4 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_OFST 8 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_LBN 0 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_WIDTH 1 > +/* Size of the individual descriptor entry in the list. Determines the entry > + * stride in the list. Currently always set to size of MC_CMD_STAT_DESC, larger > + * values can be used in the future for extending the descriptor, by appending > + * new data to the end of the existing structure. > + */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_SIZE_OFST 12 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_SIZE_LEN 4 > +/* Number of entries returned in the descriptor list. */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_COUNT_OFST 16 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_COUNT_LEN 4 > +/* List of descriptors. Each entry is formatted as MC_CMD_STAT_DESC and > + * provides the ID of each stat and its location and size in the buffer. The > + * first and last entries are reserved for the generation start and end markers > + * respectively. > + */ > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_OFST 20 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LEN 8 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_OFST 20 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_LEN 4 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_LBN 160 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_WIDTH 32 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_OFST 24 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_LEN 4 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_LBN 192 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_WIDTH 32 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MINNUM 1 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MAXNUM 29 > +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MAXNUM_MCDI2 125 > + > + > +/***********************************/ > +/* MC_CMD_MAC_STATISTICS > + * Get generic MAC statistics. This call retrieves unified statistics managed > + * by the MC. The MC will populate and provide all supported statistics in the > + * format as returned by MC_CMD_MAC_STATISTICS_DESCRIPTOR. Refer to the > + * aforementioned command for the format and contents of the stats DMA buffer. > + * To ensure consistent and accurate results, it is essential for the driver to > + * initialize the DMA buffer with zeros when DMA mode is used. Returns: 0 on > + * success, ETIME if the DMA buffer is not ready, ENOENT on non-existent port > + * handle, and EINVAL on invalid parameters (DMA buffer too small) > + */ > +#define MC_CMD_MAC_STATISTICS 0x1e4 > +#undef MC_CMD_0x1e4_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e4_PRIVILEGE_CTG SRIOV_CTG_GENERAL > + > +/* MC_CMD_MAC_STATISTICS_IN msgrequest */ > +#define MC_CMD_MAC_STATISTICS_IN_LEN 20 > +/* Handle of port to get MAC statistics for. */ > +#define MC_CMD_MAC_STATISTICS_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_MAC_STATISTICS_IN_PORT_HANDLE_LEN 4 > +/* Contains options for querying the MAC statistics. */ > +#define MC_CMD_MAC_STATISTICS_IN_CMD_OFST 4 > +#define MC_CMD_MAC_STATISTICS_IN_CMD_LEN 4 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_OFST 4 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_LBN 0 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_WIDTH 1 > +#define MC_CMD_MAC_STATISTICS_IN_CLEAR_OFST 4 > +#define MC_CMD_MAC_STATISTICS_IN_CLEAR_LBN 1 > +#define MC_CMD_MAC_STATISTICS_IN_CLEAR_WIDTH 1 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_OFST 4 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_LBN 2 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_WIDTH 1 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_OFST 4 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_LBN 3 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_WIDTH 1 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_OFST 4 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_LBN 4 > +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_WIDTH 1 > +#define MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_OFST 4 > +#define MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_LBN 16 > +#define MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_WIDTH 16 > +/* This is the address of the DMA buffer to use for transfer of the statistics. > + * Only valid if the DMA flag is set to 1. > + */ > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_OFST 8 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LEN 8 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_OFST 8 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_LEN 4 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_LBN 64 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_WIDTH 32 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_OFST 12 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_LEN 4 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_LBN 96 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_WIDTH 32 > +/* This is the length of the DMA buffer to use for the transfer of the > + * statistics. The buffer should be at least DMA_BUFFER_SIZE long, as returned > + * by MC_CMD_MAC_STATISTICS_DESCRIPTOR. If the supplied buffer is too small, > + * the command will fail with EINVAL. Only valid if the DMA flag is set to 1. > + */ > +#define MC_CMD_MAC_STATISTICS_IN_DMA_LEN_OFST 16 > +#define MC_CMD_MAC_STATISTICS_IN_DMA_LEN_LEN 4 > + > +/* MC_CMD_MAC_STATISTICS_OUT msgresponse */ > +#define MC_CMD_MAC_STATISTICS_OUT_LENMIN 5 > +#define MC_CMD_MAC_STATISTICS_OUT_LENMAX 252 > +#define MC_CMD_MAC_STATISTICS_OUT_LENMAX_MCDI2 1020 > +#define MC_CMD_MAC_STATISTICS_OUT_LEN(num) (4+1*(num)) > +#define MC_CMD_MAC_STATISTICS_OUT_DATA_NUM(len) (((len)-4)/1) > +/* length of the data in bytes */ > +#define MC_CMD_MAC_STATISTICS_OUT_DATALEN_OFST 0 > +#define MC_CMD_MAC_STATISTICS_OUT_DATALEN_LEN 4 > +#define MC_CMD_MAC_STATISTICS_OUT_DATA_OFST 4 > +#define MC_CMD_MAC_STATISTICS_OUT_DATA_LEN 1 > +#define MC_CMD_MAC_STATISTICS_OUT_DATA_MINNUM 1 > +#define MC_CMD_MAC_STATISTICS_OUT_DATA_MAXNUM 248 > +#define MC_CMD_MAC_STATISTICS_OUT_DATA_MAXNUM_MCDI2 1016 > + > +/* NET_PORT_HANDLE_DESC structuredef: Network port descriptor containing a port > + * handle and attributes used, for example, in MC_CMD_ENUM_PORTS. > + */ > +#define NET_PORT_HANDLE_DESC_LEN 53 > +/* The handle to identify the port */ > +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_OFST 0 > +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_LEN 4 > +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_LBN 0 > +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_WIDTH 32 > +/* Includes the type of port e.g. physical, virtual or MAE MPORT and other > + * properties relevant to the port. > + */ > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_OFST 4 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LEN 8 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_OFST 4 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_LEN 4 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_LBN 32 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_WIDTH 32 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_OFST 8 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_LEN 4 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_LBN 64 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_WIDTH 32 > +#define NET_PORT_HANDLE_DESC_PORT_TYPE_OFST 4 > +#define NET_PORT_HANDLE_DESC_PORT_TYPE_LBN 0 > +#define NET_PORT_HANDLE_DESC_PORT_TYPE_WIDTH 3 > +#define NET_PORT_HANDLE_DESC_PHYSICAL 0x0 /* enum */ > +#define NET_PORT_HANDLE_DESC_VIRTUAL 0x1 /* enum */ > +#define NET_PORT_HANDLE_DESC_MPORT 0x2 /* enum */ > +#define NET_PORT_HANDLE_DESC_IS_ZOMBIE_OFST 4 > +#define NET_PORT_HANDLE_DESC_IS_ZOMBIE_LBN 8 > +#define NET_PORT_HANDLE_DESC_IS_ZOMBIE_WIDTH 1 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LBN 32 > +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_WIDTH 64 > +/* The dynamic change that led to the port enumeration */ > +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_OFST 12 > +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_LEN 1 > +/* enum: Indicates that the ENTRY_SRC field has not been initialized. */ > +#define NET_PORT_HANDLE_DESC_UNKNOWN 0x0 > +/* enum: The port was enumerated at start of day. */ > +#define NET_PORT_HANDLE_DESC_PRESENT 0x1 > +/* enum: The port was dynamically added. */ > +#define NET_PORT_HANDLE_DESC_ADDED 0x2 > +/* enum: The port was dynamically deleted. */ > +#define NET_PORT_HANDLE_DESC_DELETED 0x3 > +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_LBN 96 > +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_WIDTH 8 > +/* This is an opaque 40 byte label exposed to users as a unique identifier of > + * the port. It is represented as a zero-terminated ASCII string and assigned > + * by the port administrator which is typically either the firmware for a > + * physical port or the host software responsible for creating the virtual > + * port. The label is conveyed to the driver after assignment, which, unlike > + * the port administrator, does not need to know how to interpret the label. > + */ > +#define NET_PORT_HANDLE_DESC_PORT_LABEL_OFST 13 > +#define NET_PORT_HANDLE_DESC_PORT_LABEL_LEN 40 > +#define NET_PORT_HANDLE_DESC_PORT_LABEL_LBN 104 > +#define NET_PORT_HANDLE_DESC_PORT_LABEL_WIDTH 320 > + > + > +/***********************************/ > +/* MC_CMD_ENUM_PORTS > + * This command returns handles for all ports present in the system. The PCIe > + * function type of each port (either physical or virtual) is also reported. > + * After a start-of-day port enumeration, firmware keeps track of all available > + * ports upon creation or deletion and updates the ports if there is a change. > + * This command is cleared after a control interface reset (e.g. FLR, > + * ENTITY_RESET), in which case it must be called again to reenumerate the > + * ports. The command is also clear-on-read and repeated calls will drain the > + * buffer. > + */ > +#define MC_CMD_ENUM_PORTS 0x1e5 > +#undef MC_CMD_0x1e5_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e5_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_ENUM_PORTS_IN msgrequest */ > +#define MC_CMD_ENUM_PORTS_IN_LEN 0 > + > +/* MC_CMD_ENUM_PORTS_OUT msgresponse */ > +#define MC_CMD_ENUM_PORTS_OUT_LENMIN 12 > +#define MC_CMD_ENUM_PORTS_OUT_LENMAX 252 > +#define MC_CMD_ENUM_PORTS_OUT_LENMAX_MCDI2 1020 > +#define MC_CMD_ENUM_PORTS_OUT_LEN(num) (12+1*(num)) > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_NUM(len) (((len)-12)/1) > +/* Any unused flags are reserved and must be ignored. */ > +#define MC_CMD_ENUM_PORTS_OUT_FLAGS_OFST 0 > +#define MC_CMD_ENUM_PORTS_OUT_FLAGS_LEN 4 > +#define MC_CMD_ENUM_PORTS_OUT_MORE_OFST 0 > +#define MC_CMD_ENUM_PORTS_OUT_MORE_LBN 0 > +#define MC_CMD_ENUM_PORTS_OUT_MORE_WIDTH 1 > +/* The number of NET_PORT_HANDLE_DESC structures in PORT_HANDLES. */ > +#define MC_CMD_ENUM_PORTS_OUT_PORT_COUNT_OFST 4 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_COUNT_LEN 4 > +#define MC_CMD_ENUM_PORTS_OUT_SIZEOF_NET_PORT_HANDLE_DESC_OFST 8 > +#define MC_CMD_ENUM_PORTS_OUT_SIZEOF_NET_PORT_HANDLE_DESC_LEN 4 > +/* Array of NET_PORT_HANDLE_DESC structures. Callers must use must use the > + * SIZEOF_NET_PORT_HANDLE_DESC field field as the array stride between entries. > + * This may also allow for tail padding for alignment. Fields beyond > + * SIZEOF_NET_PORT_HANDLE_DESC are not present. > + */ > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_OFST 12 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_LEN 1 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MINNUM 0 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MAXNUM 240 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MAXNUM_MCDI2 1008 > +/* See structuredef: NET_PORT_HANDLE_DESC */ > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_HANDLE_OFST 12 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_HANDLE_LEN 4 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_OFST 16 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LEN 8 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_OFST 16 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_LEN 4 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_LBN 128 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_WIDTH 32 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_OFST 20 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_LEN 4 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_LBN 160 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_WIDTH 32 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_TYPE_LBN 128 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_TYPE_WIDTH 3 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_IS_ZOMBIE_LBN 136 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_IS_ZOMBIE_WIDTH 1 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_ENTRY_SRC_OFST 24 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_ENTRY_SRC_LEN 1 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_LABEL_OFST 25 > +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_LABEL_LEN 40 > + > + > +/***********************************/ > +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES > + * Read properties of the transceiver associated with the port. Can be either > + * for a fixed onboard transceiver or an inserted module. The returned data is > + * interpreted from the transceiver hardware and may be fixed up by the > + * firmware. Use MC_CMD_GET_MODULE_DATA to get raw undecoded data. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES 0x1e6 > +#undef MC_CMD_0x1e6_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e6_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN msgrequest */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_LEN 4 > +/* Handle to port to get transceiver properties from. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_PORT_HANDLE_LEN 4 > + > +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT msgresponse */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LEN 89 > +/* Supported technology abilities. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_TECH_ABILITIES_MASK_OFST 0 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_TECH_ABILITIES_MASK_LEN 16 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_ETH_TECH/TECH */ > +/* Reserved for future expansion to accommodate future Ethernet technology > + * expansion. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_RESERVED_OFST 16 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_RESERVED_LEN 16 > +/* Preferred FEC modes. This is a function of the cable type and length. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PREFERRED_FEC_MASK_OFST 32 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PREFERRED_FEC_MASK_LEN 4 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* FEC_TYPE/TYPE */ > +/* SFF-8042 code reported by the module. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CODE_OFST 36 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CODE_LEN 2 > +/* Medium. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIUM_OFST 38 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIUM_LEN 1 > +/* enum property: value */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_UNKNOWN 0x0 /* enum */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_COPPER 0x1 /* enum */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_OPTICAL 0x2 /* enum */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BACKPLANE 0x3 /* enum */ > +/* Identifies the tech */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIA_SUBTYPE_OFST 39 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIA_SUBTYPE_LEN 1 > +/* enum property: value */ > +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_UNKNOWN 0x0 */ > +/* enum: Ethernet over twisted-pair copper cables for distances up to 100 > + * meters. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BASET 0x1 > +/* enum: Ethernet over twin-axial, balanced copper cable. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CR 0x2 > +/* enum: Ethernet over backplane for connections on the same board. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KX 0x3 > +/* enum: Ethernet over a single backplane lane for connections between > + * different boards. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KR 0x4 > +/* enum: Ethernet over copper backplane. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KP 0x5 > +/* enum: Ethernet over fiber optic. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BASEX 0x6 > +/* enum: Short range ethernet over multimode fiber optic (See IEEE 802.3 Clause > + * 49 and 52). > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SR 0x7 > +/* enum: Long range, extended range or far reach ethernet used with single mode > + * fiber optics. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LR_ER_FR 0x8 > +/* enum: Long reach multimode ethernet over multimode optical fiber. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LRM 0x9 > +/* enum: Very short reach PAM4 ethernet over multimode optical fiber (see IEEE > + * 802.3db). > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VR 0xa > +/* enum: BASE-R encoding and PAM4 over single-mode fiber with reach up to at > + * least 500 meters (803.2 Clause 121 and 124) > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_DR 0xb > +/* String of the vendor name as intepreted by NMC firmware. NMC firmware > + * applies workarounds for known buggy transceivers. The vendor name is > + * presented as 16 bytes of ASCII characters padded with spaces. It can also be > + * represented as 16 bytes of zeros if the field is unspecified for the > + * connected module. See SFF-8472/CMIS specifications for details. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_OFST 40 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_LEN 1 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_NUM 16 > +/* The vendor part number as intepreted by NMC firmware. The field is presented > + * as 16 bytes of ASCII chars padded with spaces. It can also be 16 bytes of > + * zeros if the field is unspecified for the connected module. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_OFST 56 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_LEN 1 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_NUM 16 > +/* Serial number of the module presented as 16 bytes of ASCII characters padded > + * with spaces. It can also be 16 bytes of zeros if the field is unspecified > + * for the connected module. See SFF-8472/CMIS specifications for details. > + */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_OFST 72 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_LEN 1 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_NUM 16 > +/* This reports the number of module changes detected by the NMC firmware. */ > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PORT_MODULECHANGE_SEQ_NUM_OFST 88 > +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PORT_MODULECHANGE_SEQ_NUM_LEN 1 > + > + > +/***********************************/ > +/* MC_CMD_GET_FIXED_PORT_PROPERTIES > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES 0x1e7 > +#undef MC_CMD_0x1e7_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e7_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_GET_FIXED_PORT_PROPERTIES_IN msgrequest: In this context, the port > + * consists of the MAC and the PHY, and excludes any modules inserted into the > + * cage. This information is fixed for a given board but not for a given ASIC. > + * This command reports properties for the port as it is currently configured, > + * and not its hardware capabilities, which can be better than the current > + * configuration. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_LEN 4 > +/* Handle to the port to from which to retreive properties */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_PORT_HANDLE_LEN 4 > + > +/* MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT msgresponse */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LEN 36 > +/* Supported capabilities of the port in its current configuration. */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_OFST 0 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_LEN 25 > +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_TECH_MASK_OFST 0 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_TECH_MASK_LEN 16 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_MASK_OFST 16 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_MASK_LEN 4 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_REQ_OFST 20 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_REQ_LEN 4 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_PAUSE_MASK_OFST 24 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_PAUSE_MASK_LEN 1 > +/* Number of lanes supported by the port in its current configuration. */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_NUM_LANES_OFST 25 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_NUM_LANES_LEN 1 > +/* Bitmask of supported loopback modes. Where the response to this command > + * includes the LOOPBACK_MODES_MASK_V2 field, that field should be used in > + * preference to ensure that all available loopback modes are seen. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LOOPBACK_MODES_MASK_OFST 26 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LOOPBACK_MODES_MASK_LEN 1 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LOOPBACK_V2/MODE */ > +/* This field serves as a cage index that uniquely identifies the cage to which > + * the module is connected. This is useful when splitter cables that have > + * multiple ports on a single cage are used. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_INDEX_OFST 27 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_INDEX_LEN 1 > +/* This bitmask is used to specify the lanes within the cage identified by > + * MDI_INDEX that are allocated to the port. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_LANE_MASK_OFST 28 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_LANE_MASK_LEN 1 > +/* Maximum frame length supported by the port in its current configuration. */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MAX_FRAME_LEN_OFST 32 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MAX_FRAME_LEN_LEN 4 > + > +/* MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2 msgresponse */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LEN 48 > +/* Supported capabilities of the port in its current configuration. */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_ABILITIES_OFST 0 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_ABILITIES_LEN 25 > +/* Number of lanes supported by the port in its current configuration. */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_NUM_LANES_OFST 25 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_NUM_LANES_LEN 1 > +/* Bitmask of supported loopback modes. Where the response to this command > + * includes the LOOPBACK_MODES_MASK_V2 field, that field should be used in > + * preference to ensure that all available loopback modes are seen. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_OFST 26 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_LEN 1 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LOOPBACK_V2/MODE */ > +/* This field serves as a cage index that uniquely identifies the cage to which > + * the module is connected. This is useful when splitter cables that have > + * multiple ports on a single cage are used. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_INDEX_OFST 27 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_INDEX_LEN 1 > +/* This bitmask is used to specify the lanes within the cage identified by > + * MDI_INDEX that are allocated to the port. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_LANE_MASK_OFST 28 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_LANE_MASK_LEN 1 > +/* Maximum frame length supported by the port in its current configuration. */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MAX_FRAME_LEN_OFST 32 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MAX_FRAME_LEN_LEN 4 > +/* Bitmask of supported loopback modes. This field replaces the > + * LOOPBACK_MODES_MASK field which is defined under version 1 of this command. > + */ > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_OFST 40 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LEN 8 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_OFST 40 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_LEN 4 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_LBN 320 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_WIDTH 32 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_OFST 44 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_LEN 4 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_LBN 352 > +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_WIDTH 32 > +/* enum property: bitshift */ > +/* Enum values, see field(s): */ > +/* MC_CMD_LOOPBACK_V2/MODE */ > + > + > +/***********************************/ > +/* MC_CMD_GET_MODULE_DATA > + * Read media-specific data from the PHY (e.g. SFP/SFP+ module ID information > + * for SFP+ PHYs). This command returns raw data from the module's EEPROM and > + * it is not interpreted by the MC. Use MC_CMD_GET_TRANSCEIVER_PROPERTIES to > + * get interpreted data. Return code: 0, ENOENT > + */ > +#define MC_CMD_GET_MODULE_DATA 0x1e8 > +#undef MC_CMD_0x1e8_PRIVILEGE_CTG > + > +#define MC_CMD_0x1e8_PRIVILEGE_CTG SRIOV_CTG_LINK > + > +/* MC_CMD_GET_MODULE_DATA_IN msgrequest */ > +#define MC_CMD_GET_MODULE_DATA_IN_LEN 16 > +/* Handle to identify the port from which to request module properties. */ > +#define MC_CMD_GET_MODULE_DATA_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_GET_MODULE_DATA_IN_PORT_HANDLE_LEN 4 > +/* 7 bit I2C address of the device. DEPRECATED: This field is replaced by > + * MODULE_ADDR in V2. Use V2 of this command for proper alignment and easier > + * access. > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_DEVADDR_LBN 32 > +#define MC_CMD_GET_MODULE_DATA_IN_DEVADDR_WIDTH 7 > +/* 0 if the page does not support banked access, non-zero otherwise. Non-zero > + * BANK is valid if OFFSET is in the range 80h - ffh, i.e. in the Upper Memory > + * region. > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_BANK_OFST 6 > +#define MC_CMD_GET_MODULE_DATA_IN_BANK_LEN 2 > +/* 0 if paged access is not supported, non-zero otherwise. Non-zero PAGE is > + * valid if OFFSET is in the range 80h - ffh. > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_PAGE_OFST 8 > +#define MC_CMD_GET_MODULE_DATA_IN_PAGE_LEN 2 > +/* Offset in the range 00h - 7fh to access lower memory. Offset in the range > + * 80h - ffh to access upper memory > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_OFFSET_OFST 10 > +#define MC_CMD_GET_MODULE_DATA_IN_OFFSET_LEN 1 > +#define MC_CMD_GET_MODULE_DATA_IN_LENGTH_OFST 12 > +#define MC_CMD_GET_MODULE_DATA_IN_LENGTH_LEN 4 > + > +/* MC_CMD_GET_MODULE_DATA_IN_V2 msgrequest: Updated MC_CMD_GET_MODULE_DATA with > + * 8-bit wide ADDRESSING field. This new field provides a correctly aligned > + * container for the 7-bit DEVADDR field from V1, now renamed MODULE_ADDR, to > + * ensure proper alignment. > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_V2_LEN 16 > +/* Handle to identify the port from which to request module properties. */ > +#define MC_CMD_GET_MODULE_DATA_IN_V2_PORT_HANDLE_OFST 0 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_PORT_HANDLE_LEN 4 > +/* 7 bit I2C address of the device. DEPRECATED: This field is replaced by > + * MODULE_ADDR in V2. Use V2 of this command for proper alignment and easier > + * access. > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_V2_DEVADDR_LBN 32 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_DEVADDR_WIDTH 7 > +/* 0 if the page does not support banked access, non-zero otherwise. Non-zero > + * BANK is valid if OFFSET is in the range 80h - ffh, i.e. in the Upper Memory > + * region. > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_V2_BANK_OFST 6 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_BANK_LEN 2 > +/* 0 if paged access is not supported, non-zero otherwise. Non-zero PAGE is > + * valid if OFFSET is in the range 80h - ffh. > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_V2_PAGE_OFST 8 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_PAGE_LEN 2 > +/* Offset in the range 00h - 7fh to access lower memory. Offset in the range > + * 80h - ffh to access upper memory > + */ > +#define MC_CMD_GET_MODULE_DATA_IN_V2_OFFSET_OFST 10 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_OFFSET_LEN 1 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_LENGTH_OFST 12 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_LENGTH_LEN 4 > +/* Container for 7 bit I2C addresses. */ > +#define MC_CMD_GET_MODULE_DATA_IN_V2_ADDRESSING_OFST 4 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_ADDRESSING_LEN 1 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_OFST 4 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_LBN 0 > +#define MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_WIDTH 7 > + > +/* MC_CMD_GET_MODULE_DATA_OUT msgresponse */ > +#define MC_CMD_GET_MODULE_DATA_OUT_LENMIN 5 > +#define MC_CMD_GET_MODULE_DATA_OUT_LENMAX 252 > +#define MC_CMD_GET_MODULE_DATA_OUT_LENMAX_MCDI2 1020 > +#define MC_CMD_GET_MODULE_DATA_OUT_LEN(num) (4+1*(num)) > +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_NUM(len) (((len)-4)/1) > +/* length of the data in bytes */ > +#define MC_CMD_GET_MODULE_DATA_OUT_DATALEN_OFST 0 > +#define MC_CMD_GET_MODULE_DATA_OUT_DATALEN_LEN 4 > +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_OFST 4 > +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_LEN 1 > +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_MINNUM 1 > +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_MAXNUM 248 > +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_MAXNUM_MCDI2 1016 > + > + > +/***********************************/ > +/* MC_CMD_GET_NETPORT_STATISTICS > + * Get generic MAC statistics. This call retrieves unified statistics managed > + * by the MC. The MC will populate and provide all supported statistics in the > + * format as returned by MC_CMD_MAC_STATISTICS_DESCRIPTOR. Refer to the > + * aforementioned command for the format and contents of the stats DMA buffer. > + * To ensure consistent and accurate results, it is essential for the driver to > + * initialize the DMA buffer with zeros when DMA mode is used. Returns: 0 on > + * success, ETIME if the DMA buffer is not ready, ENOENT on non-existent port > + * handle, and EINVAL on invalid parameters (DMA buffer too small) > + */ > +#define MC_CMD_GET_NETPORT_STATISTICS 0x1fa > +#undef MC_CMD_0x1fa_PRIVILEGE_CTG > + > +#define MC_CMD_0x1fa_PRIVILEGE_CTG SRIOV_CTG_GENERAL > + > +/* MC_CMD_GET_NETPORT_STATISTICS_IN msgrequest */ > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_LEN 20 > +/* Handle of port to get MAC statistics for. */ > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PORT_HANDLE_OFST 0 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PORT_HANDLE_LEN 4 > +/* Contains options for querying the MAC statistics. */ > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CMD_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CMD_LEN 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LBN 0 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_WIDTH 1 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_LBN 1 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_WIDTH 1 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_LBN 2 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_WIDTH 1 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_LBN 3 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_WIDTH 1 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_LBN 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_WIDTH 1 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_LBN 15 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_WIDTH 17 > +/* Specifies the physical address of the DMA buffer to use for statistics > + * transfer. This field must contain a valid address under either of these > + * conditions: 1. DMA flag is set (immediate DMA requested) 2. Both > + * PERIODIC_CHANGE and PERIODIC_ENABLE are set (periodic DMA configured) > + */ > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_OFST 8 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LEN 8 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_OFST 8 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_LEN 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_LBN 64 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_WIDTH 32 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_OFST 12 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_LEN 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_LBN 96 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_WIDTH 32 > +/* Specifies the length of the DMA buffer in bytes for statistics transfer. The > + * buffer size must be at least DMA_BUFFER_SIZE bytes (as returned by > + * MC_CMD_MAC_STATISTICS_DESCRIPTOR). Providing an insufficient buffer size > + * will result in an EINVAL error. This field must contain a valid length under > + * either of these conditions: 1. DMA flag is set (immediate DMA requested) 2. > + * Both PERIODIC_CHANGE and PERIODIC_ENABLE are set (periodic DMA configured) > + */ > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LEN_OFST 16 > +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LEN_LEN 4 > + > +/* MC_CMD_GET_NETPORT_STATISTICS_OUT msgresponse */ > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMIN 0 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMAX 248 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMAX_MCDI2 1016 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LEN(num) (0+8*(num)) > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_NUM(len) (((len)-0)/8) > +/* Statistics buffer. Zero-length if DMA mode is used. The statistics buffer is > + * an array of 8-byte counter values, containing the generation start marker, > + * stats counters, and generation end marker. The index of each counter in the > + * array is reported by the MAC_STATISTICS_DESCRIPTOR command. The same layout > + * is used for the DMA buffer for DMA mode stats. > + */ > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_OFST 0 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LEN 8 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_OFST 0 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_LEN 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_LBN 0 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_WIDTH 32 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_OFST 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_LEN 4 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_LBN 32 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_WIDTH 32 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MINNUM 0 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MAXNUM 31 > +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MAXNUM_MCDI2 127 > > /* EVB_PORT_ID structuredef */ > #define EVB_PORT_ID_LEN 4 > @@ -9706,44 +10448,6 @@ > #define EVB_PORT_ID_PORT_ID_LBN 0 > #define EVB_PORT_ID_PORT_ID_WIDTH 32 > > -/* EVB_VLAN_TAG structuredef */ > -#define EVB_VLAN_TAG_LEN 2 > -/* The VLAN tag value */ > -#define EVB_VLAN_TAG_VLAN_ID_LBN 0 > -#define EVB_VLAN_TAG_VLAN_ID_WIDTH 12 > -#define EVB_VLAN_TAG_MODE_LBN 12 > -#define EVB_VLAN_TAG_MODE_WIDTH 4 > -/* enum: Insert the VLAN. */ > -#define EVB_VLAN_TAG_INSERT 0x0 > -/* enum: Replace the VLAN if already present. */ > -#define EVB_VLAN_TAG_REPLACE 0x1 > - > -/* BUFTBL_ENTRY structuredef */ > -#define BUFTBL_ENTRY_LEN 12 > -/* the owner ID */ > -#define BUFTBL_ENTRY_OID_OFST 0 > -#define BUFTBL_ENTRY_OID_LEN 2 > -#define BUFTBL_ENTRY_OID_LBN 0 > -#define BUFTBL_ENTRY_OID_WIDTH 16 > -/* the page parameter as one of ESE_DZ_SMC_PAGE_SIZE_ */ > -#define BUFTBL_ENTRY_PGSZ_OFST 2 > -#define BUFTBL_ENTRY_PGSZ_LEN 2 > -#define BUFTBL_ENTRY_PGSZ_LBN 16 > -#define BUFTBL_ENTRY_PGSZ_WIDTH 16 > -/* the raw 64-bit address field from the SMC, not adjusted for page size */ > -#define BUFTBL_ENTRY_RAWADDR_OFST 4 > -#define BUFTBL_ENTRY_RAWADDR_LEN 8 > -#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4 > -#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4 > -#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32 > -#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32 > -#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8 > -#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4 > -#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64 > -#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32 > -#define BUFTBL_ENTRY_RAWADDR_LBN 32 > -#define BUFTBL_ENTRY_RAWADDR_WIDTH 64 > - > /* NVRAM_PARTITION_TYPE structuredef */ > #define NVRAM_PARTITION_TYPE_LEN 2 > #define NVRAM_PARTITION_TYPE_ID_OFST 0 > @@ -9981,116 +10685,6 @@ > #define LICENSED_APP_ID_ID_LBN 0 > #define LICENSED_APP_ID_ID_WIDTH 32 > > -/* LICENSED_FEATURES structuredef */ > -#define LICENSED_FEATURES_LEN 8 > -/* Bitmask of licensed firmware features */ > -#define LICENSED_FEATURES_MASK_OFST 0 > -#define LICENSED_FEATURES_MASK_LEN 8 > -#define LICENSED_FEATURES_MASK_LO_OFST 0 > -#define LICENSED_FEATURES_MASK_LO_LEN 4 > -#define LICENSED_FEATURES_MASK_LO_LBN 0 > -#define LICENSED_FEATURES_MASK_LO_WIDTH 32 > -#define LICENSED_FEATURES_MASK_HI_OFST 4 > -#define LICENSED_FEATURES_MASK_HI_LEN 4 > -#define LICENSED_FEATURES_MASK_HI_LBN 32 > -#define LICENSED_FEATURES_MASK_HI_WIDTH 32 > -#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0 > -#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0 > -#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1 > -#define LICENSED_FEATURES_PIO_OFST 0 > -#define LICENSED_FEATURES_PIO_LBN 1 > -#define LICENSED_FEATURES_PIO_WIDTH 1 > -#define LICENSED_FEATURES_EVQ_TIMER_OFST 0 > -#define LICENSED_FEATURES_EVQ_TIMER_LBN 2 > -#define LICENSED_FEATURES_EVQ_TIMER_WIDTH 1 > -#define LICENSED_FEATURES_CLOCK_OFST 0 > -#define LICENSED_FEATURES_CLOCK_LBN 3 > -#define LICENSED_FEATURES_CLOCK_WIDTH 1 > -#define LICENSED_FEATURES_RX_TIMESTAMPS_OFST 0 > -#define LICENSED_FEATURES_RX_TIMESTAMPS_LBN 4 > -#define LICENSED_FEATURES_RX_TIMESTAMPS_WIDTH 1 > -#define LICENSED_FEATURES_TX_TIMESTAMPS_OFST 0 > -#define LICENSED_FEATURES_TX_TIMESTAMPS_LBN 5 > -#define LICENSED_FEATURES_TX_TIMESTAMPS_WIDTH 1 > -#define LICENSED_FEATURES_RX_SNIFF_OFST 0 > -#define LICENSED_FEATURES_RX_SNIFF_LBN 6 > -#define LICENSED_FEATURES_RX_SNIFF_WIDTH 1 > -#define LICENSED_FEATURES_TX_SNIFF_OFST 0 > -#define LICENSED_FEATURES_TX_SNIFF_LBN 7 > -#define LICENSED_FEATURES_TX_SNIFF_WIDTH 1 > -#define LICENSED_FEATURES_PROXY_FILTER_OPS_OFST 0 > -#define LICENSED_FEATURES_PROXY_FILTER_OPS_LBN 8 > -#define LICENSED_FEATURES_PROXY_FILTER_OPS_WIDTH 1 > -#define LICENSED_FEATURES_EVENT_CUT_THROUGH_OFST 0 > -#define LICENSED_FEATURES_EVENT_CUT_THROUGH_LBN 9 > -#define LICENSED_FEATURES_EVENT_CUT_THROUGH_WIDTH 1 > -#define LICENSED_FEATURES_MASK_LBN 0 > -#define LICENSED_FEATURES_MASK_WIDTH 64 > - > -/* LICENSED_V3_APPS structuredef */ > -#define LICENSED_V3_APPS_LEN 8 > -/* Bitmask of licensed applications */ > -#define LICENSED_V3_APPS_MASK_OFST 0 > -#define LICENSED_V3_APPS_MASK_LEN 8 > -#define LICENSED_V3_APPS_MASK_LO_OFST 0 > -#define LICENSED_V3_APPS_MASK_LO_LEN 4 > -#define LICENSED_V3_APPS_MASK_LO_LBN 0 > -#define LICENSED_V3_APPS_MASK_LO_WIDTH 32 > -#define LICENSED_V3_APPS_MASK_HI_OFST 4 > -#define LICENSED_V3_APPS_MASK_HI_LEN 4 > -#define LICENSED_V3_APPS_MASK_HI_LBN 32 > -#define LICENSED_V3_APPS_MASK_HI_WIDTH 32 > -#define LICENSED_V3_APPS_ONLOAD_OFST 0 > -#define LICENSED_V3_APPS_ONLOAD_LBN 0 > -#define LICENSED_V3_APPS_ONLOAD_WIDTH 1 > -#define LICENSED_V3_APPS_PTP_OFST 0 > -#define LICENSED_V3_APPS_PTP_LBN 1 > -#define LICENSED_V3_APPS_PTP_WIDTH 1 > -#define LICENSED_V3_APPS_SOLARCAPTURE_PRO_OFST 0 > -#define LICENSED_V3_APPS_SOLARCAPTURE_PRO_LBN 2 > -#define LICENSED_V3_APPS_SOLARCAPTURE_PRO_WIDTH 1 > -#define LICENSED_V3_APPS_SOLARSECURE_OFST 0 > -#define LICENSED_V3_APPS_SOLARSECURE_LBN 3 > -#define LICENSED_V3_APPS_SOLARSECURE_WIDTH 1 > -#define LICENSED_V3_APPS_PERF_MONITOR_OFST 0 > -#define LICENSED_V3_APPS_PERF_MONITOR_LBN 4 > -#define LICENSED_V3_APPS_PERF_MONITOR_WIDTH 1 > -#define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_OFST 0 > -#define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_LBN 5 > -#define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_WIDTH 1 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_OFST 0 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_LBN 6 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_WIDTH 1 > -#define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_OFST 0 > -#define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_LBN 7 > -#define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_WIDTH 1 > -#define LICENSED_V3_APPS_TCP_DIRECT_OFST 0 > -#define LICENSED_V3_APPS_TCP_DIRECT_LBN 8 > -#define LICENSED_V3_APPS_TCP_DIRECT_WIDTH 1 > -#define LICENSED_V3_APPS_LOW_LATENCY_OFST 0 > -#define LICENSED_V3_APPS_LOW_LATENCY_LBN 9 > -#define LICENSED_V3_APPS_LOW_LATENCY_WIDTH 1 > -#define LICENSED_V3_APPS_SOLARCAPTURE_TAP_OFST 0 > -#define LICENSED_V3_APPS_SOLARCAPTURE_TAP_LBN 10 > -#define LICENSED_V3_APPS_SOLARCAPTURE_TAP_WIDTH 1 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_OFST 0 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_LBN 11 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_WIDTH 1 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_OFST 0 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_LBN 12 > -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_WIDTH 1 > -#define LICENSED_V3_APPS_SCALEOUT_ONLOAD_OFST 0 > -#define LICENSED_V3_APPS_SCALEOUT_ONLOAD_LBN 13 > -#define LICENSED_V3_APPS_SCALEOUT_ONLOAD_WIDTH 1 > -#define LICENSED_V3_APPS_DSHBRD_OFST 0 > -#define LICENSED_V3_APPS_DSHBRD_LBN 14 > -#define LICENSED_V3_APPS_DSHBRD_WIDTH 1 > -#define LICENSED_V3_APPS_SCATRD_OFST 0 > -#define LICENSED_V3_APPS_SCATRD_LBN 15 > -#define LICENSED_V3_APPS_SCATRD_WIDTH 1 > -#define LICENSED_V3_APPS_MASK_LBN 0 > -#define LICENSED_V3_APPS_MASK_WIDTH 64 > - > /* LICENSED_V3_FEATURES structuredef */ > #define LICENSED_V3_FEATURES_LEN 8 > /* Bitmask of licensed firmware features */ > @@ -10199,44 +10793,6 @@ > #define RSS_MODE_HASH_SELECTOR_LBN 0 > #define RSS_MODE_HASH_SELECTOR_WIDTH 8 > > -/* CTPIO_STATS_MAP structuredef */ > -#define CTPIO_STATS_MAP_LEN 4 > -/* The (function relative) VI number */ > -#define CTPIO_STATS_MAP_VI_OFST 0 > -#define CTPIO_STATS_MAP_VI_LEN 2 > -#define CTPIO_STATS_MAP_VI_LBN 0 > -#define CTPIO_STATS_MAP_VI_WIDTH 16 > -/* The target bucket for the VI */ > -#define CTPIO_STATS_MAP_BUCKET_OFST 2 > -#define CTPIO_STATS_MAP_BUCKET_LEN 2 > -#define CTPIO_STATS_MAP_BUCKET_LBN 16 > -#define CTPIO_STATS_MAP_BUCKET_WIDTH 16 > - > - > -/***********************************/ > -/* MC_CMD_READ_REGS > - * Get a dump of the MCPU registers > - */ > -#define MC_CMD_READ_REGS 0x50 > -#undef MC_CMD_0x50_PRIVILEGE_CTG > - > -#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_READ_REGS_IN msgrequest */ > -#define MC_CMD_READ_REGS_IN_LEN 0 > - > -/* MC_CMD_READ_REGS_OUT msgresponse */ > -#define MC_CMD_READ_REGS_OUT_LEN 308 > -/* Whether the corresponding register entry contains a valid value */ > -#define MC_CMD_READ_REGS_OUT_MASK_OFST 0 > -#define MC_CMD_READ_REGS_OUT_MASK_LEN 16 > -/* Same order as MIPS GDB (r0-r31, sr, lo, hi, bad, cause, 32 x float, fsr, > - * fir, fp) > - */ > -#define MC_CMD_READ_REGS_OUT_REGS_OFST 16 > -#define MC_CMD_READ_REGS_OUT_REGS_LEN 4 > -#define MC_CMD_READ_REGS_OUT_REGS_NUM 73 > - > > /***********************************/ > /* MC_CMD_INIT_EVQ > @@ -10640,25 +11196,6 @@ > #define MC_CMD_INIT_EVQ_V3_OUT_FLAG_RXQ_FORCE_EV_MERGING_LBN 3 > #define MC_CMD_INIT_EVQ_V3_OUT_FLAG_RXQ_FORCE_EV_MERGING_WIDTH 1 > > -/* QUEUE_CRC_MODE structuredef */ > -#define QUEUE_CRC_MODE_LEN 1 > -#define QUEUE_CRC_MODE_MODE_LBN 0 > -#define QUEUE_CRC_MODE_MODE_WIDTH 4 > -/* enum: No CRC. */ > -#define QUEUE_CRC_MODE_NONE 0x0 > -/* enum: CRC Fiber channel over ethernet. */ > -#define QUEUE_CRC_MODE_FCOE 0x1 > -/* enum: CRC (digest) iSCSI header only. */ > -#define QUEUE_CRC_MODE_ISCSI_HDR 0x2 > -/* enum: CRC (digest) iSCSI header and payload. */ > -#define QUEUE_CRC_MODE_ISCSI 0x3 > -/* enum: CRC Fiber channel over IP over ethernet. */ > -#define QUEUE_CRC_MODE_FCOIPOE 0x4 > -/* enum: CRC MPA. */ > -#define QUEUE_CRC_MODE_MPA 0x5 > -#define QUEUE_CRC_MODE_SPARE_LBN 4 > -#define QUEUE_CRC_MODE_SPARE_WIDTH 4 > - > > /***********************************/ > /* MC_CMD_INIT_RXQ > @@ -10827,6 +11364,9 @@ > #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_OFST 16 > #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_LBN 20 > #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_WIDTH 1 > +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 > +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 > +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 > /* Owner ID to use if in buffer mode (zero if physical) */ > #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_OFST 20 > #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_LEN 4 > @@ -10933,6 +11473,9 @@ > #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_OFST 16 > #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_LBN 20 > #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_WIDTH 1 > +#define MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 > +#define MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 > +#define MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 > /* Owner ID to use if in buffer mode (zero if physical) */ > #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_OFST 20 > #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_LEN 4 > @@ -11068,6 +11611,9 @@ > #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_OFST 16 > #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_LBN 20 > #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_WIDTH 1 > +#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 > +#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 > +#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 > /* Owner ID to use if in buffer mode (zero if physical) */ > #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_OFST 20 > #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_LEN 4 > @@ -11216,6 +11762,9 @@ > #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_OFST 16 > #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_LBN 20 > #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_WIDTH 1 > +#define MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 > +#define MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 > +#define MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 > /* Owner ID to use if in buffer mode (zero if physical) */ > #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_OFST 20 > #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_LEN 4 > @@ -11610,320 +12159,6 @@ > /* MC_CMD_PROXY_CMD_OUT msgresponse */ > #define MC_CMD_PROXY_CMD_OUT_LEN 0 > > -/* MC_PROXY_STATUS_BUFFER structuredef: Host memory status buffer used to > - * manage proxied requests > - */ > -#define MC_PROXY_STATUS_BUFFER_LEN 16 > -/* Handle allocated by the firmware for this proxy transaction */ > -#define MC_PROXY_STATUS_BUFFER_HANDLE_OFST 0 > -#define MC_PROXY_STATUS_BUFFER_HANDLE_LEN 4 > -/* enum: An invalid handle. */ > -#define MC_PROXY_STATUS_BUFFER_HANDLE_INVALID 0x0 > -#define MC_PROXY_STATUS_BUFFER_HANDLE_LBN 0 > -#define MC_PROXY_STATUS_BUFFER_HANDLE_WIDTH 32 > -/* The requesting physical function number */ > -#define MC_PROXY_STATUS_BUFFER_PF_OFST 4 > -#define MC_PROXY_STATUS_BUFFER_PF_LEN 2 > -#define MC_PROXY_STATUS_BUFFER_PF_LBN 32 > -#define MC_PROXY_STATUS_BUFFER_PF_WIDTH 16 > -/* The requesting virtual function number. Set to VF_NULL if the target is a > - * PF. > - */ > -#define MC_PROXY_STATUS_BUFFER_VF_OFST 6 > -#define MC_PROXY_STATUS_BUFFER_VF_LEN 2 > -#define MC_PROXY_STATUS_BUFFER_VF_LBN 48 > -#define MC_PROXY_STATUS_BUFFER_VF_WIDTH 16 > -/* The target function RID. */ > -#define MC_PROXY_STATUS_BUFFER_RID_OFST 8 > -#define MC_PROXY_STATUS_BUFFER_RID_LEN 2 > -#define MC_PROXY_STATUS_BUFFER_RID_LBN 64 > -#define MC_PROXY_STATUS_BUFFER_RID_WIDTH 16 > -/* The status of the proxy as described in MC_CMD_PROXY_COMPLETE. */ > -#define MC_PROXY_STATUS_BUFFER_STATUS_OFST 10 > -#define MC_PROXY_STATUS_BUFFER_STATUS_LEN 2 > -#define MC_PROXY_STATUS_BUFFER_STATUS_LBN 80 > -#define MC_PROXY_STATUS_BUFFER_STATUS_WIDTH 16 > -/* If a request is authorized rather than carried out by the host, this is the > - * elevated privilege mask granted to the requesting function. > - */ > -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_OFST 12 > -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_LEN 4 > -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_LBN 96 > -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_PROXY_CONFIGURE > - * Enable/disable authorization of MCDI requests from unprivileged functions by > - * a designated admin function > - */ > -#define MC_CMD_PROXY_CONFIGURE 0x58 > -#undef MC_CMD_0x58_PRIVILEGE_CTG > - > -#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_PROXY_CONFIGURE_IN msgrequest */ > -#define MC_CMD_PROXY_CONFIGURE_IN_LEN 108 > -#define MC_CMD_PROXY_CONFIGURE_IN_FLAGS_OFST 0 > -#define MC_CMD_PROXY_CONFIGURE_IN_FLAGS_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_OFST 0 > -#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_LBN 0 > -#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_WIDTH 1 > -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS > - * of blocks, each of the size REQUEST_BLOCK_SIZE. > - */ > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32 > -/* Must be a power of 2 */ > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12 > -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4 > -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS > - * of blocks, each of the size REPLY_BLOCK_SIZE. > - */ > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32 > -/* Must be a power of 2 */ > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24 > -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4 > -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS > - * of blocks, each of the size STATUS_BLOCK_SIZE. This buffer is only needed if > - * host intends to complete proxied operations by using MC_CMD_PROXY_CMD. > - */ > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32 > -/* Must be a power of 2, or zero if this buffer is not provided */ > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36 > -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4 > -/* Applies to all three buffers */ > -#define MC_CMD_PROXY_CONFIGURE_IN_NUM_BLOCKS_OFST 40 > -#define MC_CMD_PROXY_CONFIGURE_IN_NUM_BLOCKS_LEN 4 > -/* A bit mask defining which MCDI operations may be proxied */ > -#define MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_OFST 44 > -#define MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_LEN 64 > - > -/* MC_CMD_PROXY_CONFIGURE_EXT_IN msgrequest */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_LEN 112 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_FLAGS_OFST 0 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_FLAGS_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_OFST 0 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_LBN 0 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_WIDTH 1 > -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS > - * of blocks, each of the size REQUEST_BLOCK_SIZE. > - */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32 > -/* Must be a power of 2 */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4 > -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS > - * of blocks, each of the size REPLY_BLOCK_SIZE. > - */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32 > -/* Must be a power of 2 */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4 > -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS > - * of blocks, each of the size STATUS_BLOCK_SIZE. This buffer is only needed if > - * host intends to complete proxied operations by using MC_CMD_PROXY_CMD. > - */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32 > -/* Must be a power of 2, or zero if this buffer is not provided */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4 > -/* Applies to all three buffers */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_NUM_BLOCKS_OFST 40 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_NUM_BLOCKS_LEN 4 > -/* A bit mask defining which MCDI operations may be proxied */ > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ALLOWED_MCDI_MASK_OFST 44 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ALLOWED_MCDI_MASK_LEN 64 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_RESERVED_OFST 108 > -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_RESERVED_LEN 4 > - > -/* MC_CMD_PROXY_CONFIGURE_OUT msgresponse */ > -#define MC_CMD_PROXY_CONFIGURE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_PROXY_COMPLETE > - * Tells FW that a requested proxy operation has either been completed (by > - * using MC_CMD_PROXY_CMD) or authorized/declined. May only be sent by the > - * function that enabled proxying/authorization (by using > - * MC_CMD_PROXY_CONFIGURE). > - */ > -#define MC_CMD_PROXY_COMPLETE 0x5f > -#undef MC_CMD_0x5f_PRIVILEGE_CTG > - > -#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_PROXY_COMPLETE_IN msgrequest */ > -#define MC_CMD_PROXY_COMPLETE_IN_LEN 12 > -#define MC_CMD_PROXY_COMPLETE_IN_BLOCK_INDEX_OFST 0 > -#define MC_CMD_PROXY_COMPLETE_IN_BLOCK_INDEX_LEN 4 > -#define MC_CMD_PROXY_COMPLETE_IN_STATUS_OFST 4 > -#define MC_CMD_PROXY_COMPLETE_IN_STATUS_LEN 4 > -/* enum: The operation has been completed by using MC_CMD_PROXY_CMD, the reply > - * is stored in the REPLY_BUFF. > - */ > -#define MC_CMD_PROXY_COMPLETE_IN_COMPLETE 0x0 > -/* enum: The operation has been authorized. The originating function may now > - * try again. > - */ > -#define MC_CMD_PROXY_COMPLETE_IN_AUTHORIZED 0x1 > -/* enum: The operation has been declined. */ > -#define MC_CMD_PROXY_COMPLETE_IN_DECLINED 0x2 > -/* enum: The authorization failed because the relevant application did not > - * respond in time. > - */ > -#define MC_CMD_PROXY_COMPLETE_IN_TIMEDOUT 0x3 > -#define MC_CMD_PROXY_COMPLETE_IN_HANDLE_OFST 8 > -#define MC_CMD_PROXY_COMPLETE_IN_HANDLE_LEN 4 > - > -/* MC_CMD_PROXY_COMPLETE_OUT msgresponse */ > -#define MC_CMD_PROXY_COMPLETE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_ALLOC_BUFTBL_CHUNK > - * Allocate a set of buffer table entries using the specified owner ID. This > - * operation allocates the required buffer table entries (and fails if it > - * cannot do so). The buffer table entries will initially be zeroed. > - */ > -#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87 > -#undef MC_CMD_0x87_PRIVILEGE_CTG > - > -#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD > - > -/* MC_CMD_ALLOC_BUFTBL_CHUNK_IN msgrequest */ > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_LEN 8 > -/* Owner ID to use */ > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_OFST 0 > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_LEN 4 > -/* Size of buffer table pages to use, in bytes (note that only a few values are > - * legal on any specific hardware). > - */ > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_OFST 4 > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_LEN 4 > - > -/* MC_CMD_ALLOC_BUFTBL_CHUNK_OUT msgresponse */ > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_LEN 12 > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_OFST 0 > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_LEN 4 > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_OFST 4 > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_LEN 4 > -/* Buffer table IDs for use in DMA descriptors. */ > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_OFST 8 > -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_PROGRAM_BUFTBL_ENTRIES > - * Reprogram a set of buffer table entries in the specified chunk. > - */ > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88 > -#undef MC_CMD_0x88_PRIVILEGE_CTG > - > -#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD > - > -/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN msgrequest */ > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMIN 20 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 268 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX_MCDI2 268 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) (12+8*(num)) > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_NUM(len) (((len)-12)/8) > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST 0 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN 4 > -/* ID */ > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_OFST 4 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4 > -/* Num entries */ > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 8 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4 > -/* Buffer table entry address */ > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32 > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32 > - > -/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT msgresponse */ > -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_FREE_BUFTBL_CHUNK > - */ > -#define MC_CMD_FREE_BUFTBL_CHUNK 0x89 > -#undef MC_CMD_0x89_PRIVILEGE_CTG > - > -#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD > - > -/* MC_CMD_FREE_BUFTBL_CHUNK_IN msgrequest */ > -#define MC_CMD_FREE_BUFTBL_CHUNK_IN_LEN 4 > -#define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_OFST 0 > -#define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_LEN 4 > - > -/* MC_CMD_FREE_BUFTBL_CHUNK_OUT msgresponse */ > -#define MC_CMD_FREE_BUFTBL_CHUNK_OUT_LEN 0 > - > > /***********************************/ > /* MC_CMD_FILTER_OP > @@ -12822,6 +13057,10 @@ > #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES 0x5 > /* enum: read the supported encapsulation types for the VNIC */ > #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_VNIC_ENCAP_TYPES 0x6 > +/* enum: read the supported RX filter matches for low-latency queues (as > + * allocated by MC_CMD_ALLOC_LL_QUEUES) > + */ > +#define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_LL_RX_MATCHES 0x7 > > /* MC_CMD_GET_PARSER_DISP_INFO_OUT msgresponse */ > #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMIN 8 > @@ -12860,6 +13099,48 @@ > #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_LBN 0 > #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_WIDTH 1 > > +/* MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT msgresponse: > + * GET_PARSER_DISP_INFO response format for OP_GET_SECURITY_RULE_INFO. > + * (Medford-only; for use by SolarSecure apps, not directly by drivers. See > + * SF-114946-SW.) NOTE - this message definition is provisional. It has not yet > + * been used in any released code and may change during development. This note > + * will be removed once it is regarded as stable. > + */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_LEN 36 > +/* identifies the type of operation requested */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_OP_OFST 0 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_OP_LEN 4 > +/* Enum values, see field(s): */ > +/* MC_CMD_GET_PARSER_DISP_INFO_IN/OP */ > +/* a version number representing the set of rule lookups that are implemented > + * by the currently running firmware > + */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_OFST 4 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_LEN 4 > +/* enum: implements lookup sequences described in SF-114946-SW draft C */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_SF_114946_SW_C 0x0 > +/* the number of nodes in the subnet map */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_NODES_OFST 8 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_NODES_LEN 4 > +/* the number of entries in one subnet map node */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_ENTRIES_PER_NODE_OFST 12 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_ENTRIES_PER_NODE_LEN 4 > +/* minimum valid value for a subnet ID in a subnet map leaf */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MIN_OFST 16 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MIN_LEN 4 > +/* maximum valid value for a subnet ID in a subnet map leaf */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MAX_OFST 20 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MAX_LEN 4 > +/* the number of entries in the local and remote port range maps */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_TREE_NUM_ENTRIES_OFST 24 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_TREE_NUM_ENTRIES_LEN 4 > +/* minimum valid value for a portrange ID in a port range map leaf */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MIN_OFST 28 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MIN_LEN 4 > +/* maximum valid value for a portrange ID in a port range map leaf */ > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MAX_OFST 32 > +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MAX_LEN 4 > + > /* MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT msgresponse: This response is > * returned if a MC_CMD_GET_PARSER_DISP_INFO_IN request is sent with OP value > * OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES. It contains information about the > @@ -12913,136 +13194,6 @@ > #define MC_CMD_GET_PARSER_DISP_SUPPORTED_VNIC_ENCAP_TYPES_OUT_ENCAP_TYPE_L2GRE_WIDTH 1 > > > -/***********************************/ > -/* MC_CMD_PARSER_DISP_RW > - * Direct read/write of parser-dispatcher state (DICPUs and LUE) for debugging. > - * Please note that this interface is only of use to debug tools which have > - * knowledge of firmware and hardware data structures; nothing here is intended > - * for use by normal driver code. Note that although this command is in the > - * Admin privilege group, in tamperproof adapters, only read operations are > - * permitted. > - */ > -#define MC_CMD_PARSER_DISP_RW 0xe5 > -#undef MC_CMD_0xe5_PRIVILEGE_CTG > - > -#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_PARSER_DISP_RW_IN msgrequest */ > -#define MC_CMD_PARSER_DISP_RW_IN_LEN 32 > -/* identifies the target of the operation */ > -#define MC_CMD_PARSER_DISP_RW_IN_TARGET_OFST 0 > -#define MC_CMD_PARSER_DISP_RW_IN_TARGET_LEN 4 > -/* enum: RX dispatcher CPU */ > -#define MC_CMD_PARSER_DISP_RW_IN_RX_DICPU 0x0 > -/* enum: TX dispatcher CPU */ > -#define MC_CMD_PARSER_DISP_RW_IN_TX_DICPU 0x1 > -/* enum: Lookup engine (with original metadata format). Deprecated; used only > - * by cmdclient as a fallback for very old Huntington firmware, and not > - * supported in firmware beyond v6.4.0.1005. Use LUE_VERSIONED_METADATA > - * instead. > - */ > -#define MC_CMD_PARSER_DISP_RW_IN_LUE 0x2 > -/* enum: Lookup engine (with requested metadata format) */ > -#define MC_CMD_PARSER_DISP_RW_IN_LUE_VERSIONED_METADATA 0x3 > -/* enum: RX0 dispatcher CPU (alias for RX_DICPU; Medford has 2 RX DICPUs) */ > -#define MC_CMD_PARSER_DISP_RW_IN_RX0_DICPU 0x0 > -/* enum: RX1 dispatcher CPU (only valid for Medford) */ > -#define MC_CMD_PARSER_DISP_RW_IN_RX1_DICPU 0x4 > -/* enum: Miscellaneous other state (only valid for Medford) */ > -#define MC_CMD_PARSER_DISP_RW_IN_MISC_STATE 0x5 > -/* identifies the type of operation requested */ > -#define MC_CMD_PARSER_DISP_RW_IN_OP_OFST 4 > -#define MC_CMD_PARSER_DISP_RW_IN_OP_LEN 4 > -/* enum: Read a word of DICPU DMEM or a LUE entry */ > -#define MC_CMD_PARSER_DISP_RW_IN_READ 0x0 > -/* enum: Write a word of DICPU DMEM or a LUE entry. Not permitted on > - * tamperproof adapters. > - */ > -#define MC_CMD_PARSER_DISP_RW_IN_WRITE 0x1 > -/* enum: Read-modify-write a word of DICPU DMEM (not valid for LUE). Not > - * permitted on tamperproof adapters. > - */ > -#define MC_CMD_PARSER_DISP_RW_IN_RMW 0x2 > -/* data memory address (DICPU targets) or LUE index (LUE targets) */ > -#define MC_CMD_PARSER_DISP_RW_IN_ADDRESS_OFST 8 > -#define MC_CMD_PARSER_DISP_RW_IN_ADDRESS_LEN 4 > -/* selector (for MISC_STATE target) */ > -#define MC_CMD_PARSER_DISP_RW_IN_SELECTOR_OFST 8 > -#define MC_CMD_PARSER_DISP_RW_IN_SELECTOR_LEN 4 > -/* enum: Port to datapath mapping */ > -#define MC_CMD_PARSER_DISP_RW_IN_PORT_DP_MAPPING 0x1 > -/* value to write (for DMEM writes) */ > -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_WRITE_VALUE_OFST 12 > -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_WRITE_VALUE_LEN 4 > -/* XOR value (for DMEM read-modify-writes: new = (old & mask) ^ value) */ > -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_XOR_VALUE_OFST 12 > -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_XOR_VALUE_LEN 4 > -/* AND mask (for DMEM read-modify-writes: new = (old & mask) ^ value) */ > -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_AND_MASK_OFST 16 > -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_AND_MASK_LEN 4 > -/* metadata format (for LUE reads using LUE_VERSIONED_METADATA) */ > -#define MC_CMD_PARSER_DISP_RW_IN_LUE_READ_METADATA_VERSION_OFST 12 > -#define MC_CMD_PARSER_DISP_RW_IN_LUE_READ_METADATA_VERSION_LEN 4 > -/* value to write (for LUE writes) */ > -#define MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_OFST 12 > -#define MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_LEN 20 > - > -/* MC_CMD_PARSER_DISP_RW_OUT msgresponse */ > -#define MC_CMD_PARSER_DISP_RW_OUT_LEN 52 > -/* value read (for DMEM reads) */ > -#define MC_CMD_PARSER_DISP_RW_OUT_DMEM_READ_VALUE_OFST 0 > -#define MC_CMD_PARSER_DISP_RW_OUT_DMEM_READ_VALUE_LEN 4 > -/* value read (for LUE reads) */ > -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_OFST 0 > -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_LEN 20 > -/* up to 8 32-bit words of additional soft state from the LUE manager (the > - * exact content is firmware-dependent and intended only for debug use) > - */ > -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_OFST 20 > -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_LEN 32 > -/* datapath(s) used for each port (for MISC_STATE PORT_DP_MAPPING selector) */ > -#define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_OFST 0 > -#define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_LEN 4 > -#define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_NUM 4 > -#define MC_CMD_PARSER_DISP_RW_OUT_DP0 0x1 /* enum */ > -#define MC_CMD_PARSER_DISP_RW_OUT_DP1 0x2 /* enum */ > - > - > -/***********************************/ > -/* MC_CMD_GET_PF_COUNT > - * Get number of PFs on the device. > - */ > -#define MC_CMD_GET_PF_COUNT 0xb6 > -#undef MC_CMD_0xb6_PRIVILEGE_CTG > - > -#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_PF_COUNT_IN msgrequest */ > -#define MC_CMD_GET_PF_COUNT_IN_LEN 0 > - > -/* MC_CMD_GET_PF_COUNT_OUT msgresponse */ > -#define MC_CMD_GET_PF_COUNT_OUT_LEN 1 > -/* Identifies the number of PFs on the device. */ > -#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_OFST 0 > -#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_LEN 1 > - > - > -/***********************************/ > -/* MC_CMD_SET_PF_COUNT > - * Set number of PFs on the device. > - */ > -#define MC_CMD_SET_PF_COUNT 0xb7 > - > -/* MC_CMD_SET_PF_COUNT_IN msgrequest */ > -#define MC_CMD_SET_PF_COUNT_IN_LEN 4 > -/* New number of PFs on the device. */ > -#define MC_CMD_SET_PF_COUNT_IN_PF_COUNT_OFST 0 > -#define MC_CMD_SET_PF_COUNT_IN_PF_COUNT_LEN 4 > - > -/* MC_CMD_SET_PF_COUNT_OUT msgresponse */ > -#define MC_CMD_SET_PF_COUNT_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_GET_PORT_ASSIGNMENT > * Get port assignment for current PCI function. > @@ -13068,25 +13219,6 @@ > #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_NULL_PORT 0xffffffff > > > -/***********************************/ > -/* MC_CMD_SET_PORT_ASSIGNMENT > - * Set port assignment for current PCI function. > - */ > -#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9 > -#undef MC_CMD_0xb9_PRIVILEGE_CTG > - > -#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SET_PORT_ASSIGNMENT_IN msgrequest */ > -#define MC_CMD_SET_PORT_ASSIGNMENT_IN_LEN 4 > -/* Identifies the port assignment for this function. */ > -#define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_OFST 0 > -#define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_LEN 4 > - > -/* MC_CMD_SET_PORT_ASSIGNMENT_OUT msgresponse */ > -#define MC_CMD_SET_PORT_ASSIGNMENT_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_ALLOC_VIS > * Allocate VIs for current PCI function. > @@ -13183,263 +13315,6 @@ > #define MC_CMD_GET_SRIOV_CFG_OUT_VF_STRIDE_LEN 4 > > > -/***********************************/ > -/* MC_CMD_SET_SRIOV_CFG > - * Set SRIOV config for this PF. > - */ > -#define MC_CMD_SET_SRIOV_CFG 0xbb > -#undef MC_CMD_0xbb_PRIVILEGE_CTG > - > -#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SET_SRIOV_CFG_IN msgrequest */ > -#define MC_CMD_SET_SRIOV_CFG_IN_LEN 20 > -/* Number of VFs currently enabled. */ > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_OFST 0 > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_LEN 4 > -/* Max number of VFs before sriov stride and offset may need to be changed. */ > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_OFST 4 > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_LEN 4 > -#define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_OFST 8 > -#define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_LEN 4 > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_OFST 8 > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_LBN 0 > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_WIDTH 1 > -/* RID offset of first VF from PF, or 0 for no change, or > - * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate an offset. > - */ > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_OFST 12 > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_LEN 4 > -/* RID offset of each subsequent VF from the previous, 0 for no change, or > - * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate a stride. > - */ > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_OFST 16 > -#define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_LEN 4 > - > -/* MC_CMD_SET_SRIOV_CFG_OUT msgresponse */ > -#define MC_CMD_SET_SRIOV_CFG_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_GET_VI_ALLOC_INFO > - * Get information about number of VI's and base VI number allocated to this > - * function. This message is not available to dynamic clients created by > - * MC_CMD_CLIENT_ALLOC. > - */ > -#define MC_CMD_GET_VI_ALLOC_INFO 0x8d > -#undef MC_CMD_0x8d_PRIVILEGE_CTG > - > -#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_VI_ALLOC_INFO_IN msgrequest */ > -#define MC_CMD_GET_VI_ALLOC_INFO_IN_LEN 0 > - > -/* MC_CMD_GET_VI_ALLOC_INFO_OUT msgresponse */ > -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_LEN 12 > -/* The number of VIs allocated on this function */ > -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_OFST 0 > -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_LEN 4 > -/* The base absolute VI number allocated to this function. Required to > - * correctly interpret wakeup events. > - */ > -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_OFST 4 > -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_LEN 4 > -/* Function's port vi_shift value (always 0 on Huntington) */ > -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_OFST 8 > -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_DUMP_VI_STATE > - * For CmdClient use. Dump pertinent information on a specific absolute VI. The > - * VI must be owned by the calling client or one of its ancestors; usership of > - * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient. > - */ > -#define MC_CMD_DUMP_VI_STATE 0x8e > -#undef MC_CMD_0x8e_PRIVILEGE_CTG > - > -#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_DUMP_VI_STATE_IN msgrequest */ > -#define MC_CMD_DUMP_VI_STATE_IN_LEN 4 > -/* The VI number to query. */ > -#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_OFST 0 > -#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4 > - > -/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */ > -#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100 > -/* The PF part of the function owning this VI. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0 > -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2 > -/* The VF part of the function owning this VI. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_OFST 2 > -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_LEN 2 > -/* Base of VIs allocated to this function. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_OFST 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_LEN 2 > -/* Count of VIs allocated to the owner function. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_OFST 6 > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_LEN 2 > -/* Base interrupt vector allocated to this function. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_OFST 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_LEN 2 > -/* Number of interrupt vectors allocated to this function. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_OFST 10 > -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_LEN 2 > -/* Raw evq ptr table data. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32 > -/* Raw evq timer table data. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32 > -/* Combined metadata field. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_OFST 28 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_LBN 0 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_WIDTH 16 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_OFST 28 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_LBN 16 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_WIDTH 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_OFST 28 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_LBN 24 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_WIDTH 8 > -/* TXDPCPU raw table data for queue. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32 > -/* TXDPCPU raw table data for queue. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32 > -/* TXDPCPU raw table data for queue. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32 > -/* Combined metadata field. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_OFST 56 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_LBN 16 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_WIDTH 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_OFST 56 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_LBN 24 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_WIDTH 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_OFST 56 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_LBN 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_WIDTH 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_OFST 56 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_LBN 40 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_WIDTH 24 > -/* RXDPCPU raw table data for queue. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32 > -/* RXDPCPU raw table data for queue. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32 > -/* Reserved, currently 0. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32 > -/* Combined metadata field. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_OFST 88 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_LBN 16 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_WIDTH 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_OFST 88 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_LBN 24 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_WIDTH 8 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32 > -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8 > -/* Current user, as assigned by MC_CMD_SET_VI_USER. */ > -#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96 > -#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4 > - > - > /***********************************/ > /* MC_CMD_ALLOC_PIOBUF > * Allocate a push I/O buffer for later use with a tx queue. > @@ -13491,354 +13366,102 @@ > > /* MC_CMD_GET_VI_TLP_PROCESSING_IN msgrequest */ > #define MC_CMD_GET_VI_TLP_PROCESSING_IN_LEN 4 > -/* VI number to get information for. */ > +/* Queue handle, encodes queue type and VI number to get information for. */ > #define MC_CMD_GET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0 > #define MC_CMD_GET_VI_TLP_PROCESSING_IN_INSTANCE_LEN 4 > > -/* MC_CMD_GET_VI_TLP_PROCESSING_OUT msgresponse */ > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_LEN 4 > -/* Transaction processing steering hint 1 for use with the Rx Queue. */ > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_OFST 0 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_LEN 1 > -/* Transaction processing steering hint 2 for use with the Ev Queue. */ > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_OFST 1 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_LEN 1 > -/* Use Relaxed ordering model for TLPs on this VI. */ > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_LBN 16 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_WIDTH 1 > -/* Use ID based ordering for TLPs on this VI. */ > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_LBN 17 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_WIDTH 1 > -/* Set no snoop bit for TLPs on this VI. */ > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_LBN 18 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_WIDTH 1 > -/* Enable TPH for TLPs on this VI. */ > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_LBN 19 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_WIDTH 1 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_DATA_OFST 0 > -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_DATA_LEN 4 > +/* MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT msgresponse: This message has the same > + * layout as GET_VI_TLP_PROCESSING_OUT, but with corrected field ordering to > + * simplify use in drivers > + */ > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_LEN 4 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_DATA_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_DATA_LEN 4 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_LBN 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_WIDTH 8 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_LBN 8 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_WIDTH 8 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_LBN 16 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_WIDTH 1 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_LBN 16 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_WIDTH 1 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_LBN 17 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_WIDTH 1 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_LBN 18 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_WIDTH 1 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_LBN 19 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_WIDTH 1 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_OFST 0 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_LBN 20 > +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_WIDTH 1 > > > /***********************************/ > /* MC_CMD_SET_VI_TLP_PROCESSING > * Set TLP steering and ordering information for a VI. The caller must have the > * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or > - * an ancestor of the current user (see MC_CMD_SET_VI_USER). > + * an ancestor of the current user (see MC_CMD_SET_VI_USER). Note that LL > + * queues require this to be called after allocation but before initialisation > + * of the queue. TLP options of a queue are fixed after queue is initialised, > + * with the values set to current global value or they can be overriden using > + * this command. At LL queue allocation, all overrides are cleared. > */ > #define MC_CMD_SET_VI_TLP_PROCESSING 0xb1 > #undef MC_CMD_0xb1_PRIVILEGE_CTG > > #define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL > > -/* MC_CMD_SET_VI_TLP_PROCESSING_IN msgrequest */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_LEN 8 > -/* VI number to set information for. */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_INSTANCE_LEN 4 > -/* Transaction processing steering hint 1 for use with the Rx Queue. */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_OFST 4 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_LEN 1 > -/* Transaction processing steering hint 2 for use with the Ev Queue. */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_OFST 5 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_LEN 1 > -/* Use Relaxed ordering model for TLPs on this VI. */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_LBN 48 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_WIDTH 1 > -/* Use ID based ordering for TLPs on this VI. */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_LBN 49 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_WIDTH 1 > -/* Set the no snoop bit for TLPs on this VI. */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_LBN 50 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_WIDTH 1 > -/* Enable TPH for TLPs on this VI. */ > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_LBN 51 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_WIDTH 1 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_DATA_OFST 4 > -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_DATA_LEN 4 > +/* MC_CMD_SET_VI_TLP_PROCESSING_V2_IN msgrequest: This message has the same > + * layout as SET_VI_TLP_PROCESSING_OUT, but with corrected field ordering to > + * simplify use in drivers. > + */ > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_LEN 8 > +/* Queue handle, encodes queue type and VI number to set information for. */ > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_INSTANCE_OFST 0 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_INSTANCE_LEN 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_DATA_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_DATA_LEN 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_LBN 0 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_WIDTH 8 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_LBN 8 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_WIDTH 8 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_LBN 16 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_WIDTH 1 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_LBN 16 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_WIDTH 1 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_LBN 17 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_WIDTH 1 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_LBN 18 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_WIDTH 1 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_LBN 19 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_WIDTH 1 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_OFST 4 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_LBN 20 > +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_WIDTH 1 > > /* MC_CMD_SET_VI_TLP_PROCESSING_OUT msgresponse */ > #define MC_CMD_SET_VI_TLP_PROCESSING_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS > - * Get global PCIe steering and transaction processing configuration. > - */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc > -#undef MC_CMD_0xbc_PRIVILEGE_CTG > - > -#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN msgrequest */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_LEN 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_LEN 4 > -/* enum: MISC. */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_MISC 0x0 > -/* enum: IDO. */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_IDO 0x1 > -/* enum: RO. */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_RO 0x2 > -/* enum: TPH Type. */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_TPH_TYPE 0x3 > - > -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT msgresponse */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_LEN 8 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_GLOBAL_CATEGORY_OFST 0 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_GLOBAL_CATEGORY_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */ > -/* Amalgamated TLP info word. */ > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_WORD_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_WORD_LEN 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_LBN 0 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_LBN 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_WIDTH 31 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_LBN 0 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_LBN 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_LBN 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_LBN 3 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_LBN 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_WIDTH 28 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_LBN 0 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_LBN 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_LBN 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_WIDTH 1 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_LBN 3 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_WIDTH 29 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_LBN 0 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_LBN 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_WIDTH 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_LBN 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_WIDTH 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_LBN 6 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_WIDTH 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_LBN 8 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_WIDTH 2 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_OFST 4 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_LBN 9 > -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_WIDTH 23 > - > - > -/***********************************/ > -/* MC_CMD_SET_TLP_PROCESSING_GLOBALS > - * Set global PCIe steering and transaction processing configuration. > - */ > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd > -#undef MC_CMD_0xbd_PRIVILEGE_CTG > - > -#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN msgrequest */ > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_LEN 8 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS/MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */ > -/* Amalgamated TLP info word. */ > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_WORD_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_WORD_LEN 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_LBN 0 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_LBN 0 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_LBN 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_LBN 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_LBN 3 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_LBN 0 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_LBN 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_LBN 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_WIDTH 1 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_LBN 0 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_LBN 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_WIDTH 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_LBN 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_WIDTH 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_LBN 6 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_WIDTH 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_LBN 8 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_WIDTH 2 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_OFST 4 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_LBN 10 > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_WIDTH 22 > - > -/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT msgresponse */ > -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_SATELLITE_DOWNLOAD > - * Download a new set of images to the satellite CPUs from the host. > - */ > -#define MC_CMD_SATELLITE_DOWNLOAD 0x91 > -#undef MC_CMD_0x91_PRIVILEGE_CTG > - > -#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SATELLITE_DOWNLOAD_IN msgrequest: The reset requirements for the CPUs > - * are subtle, and so downloads must proceed in a number of phases. > - * > - * 1) PHASE_RESET with a target of TARGET_ALL and chunk ID/length of 0. > - * > - * 2) PHASE_IMEMS for each of the IMEM targets (target IDs 0-11). Each download > - * may consist of multiple chunks. The final chunk (with CHUNK_ID_LAST) should > - * be a checksum (a simple 32-bit sum) of the transferred data. An individual > - * download may be aborted using CHUNK_ID_ABORT. > - * > - * 3) PHASE_VECTORS for each of the vector table targets (target IDs 12-15), > - * similar to PHASE_IMEMS. > - * > - * 4) PHASE_READY with a target of TARGET_ALL and chunk ID/length of 0. > - * > - * After any error (a requested abort is not considered to be an error) the > - * sequence must be restarted from PHASE_RESET. > - */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMIN 20 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX 252 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LEN(num) (16+4*(num)) > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_NUM(len) (((len)-16)/4) > -/* Download phase. (Note: the IDLE phase is used internally and is never valid > - * in a command from the host.) > - */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_OFST 0 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_LEN 4 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IDLE 0x0 /* enum */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_RESET 0x1 /* enum */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IMEMS 0x2 /* enum */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_VECTORS 0x3 /* enum */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_READY 0x4 /* enum */ > -/* Target for download. (These match the blob numbers defined in > - * mc_flash_layout.h.) > - */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_OFST 4 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_LEN 4 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_TEXT 0x0 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_TEXT 0x1 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDP_TEXT 0x2 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDP_TEXT 0x3 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT 0x4 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT_CFG 0x5 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT 0x6 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT_CFG 0x7 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_PGM 0x8 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_SL_PGM 0x9 > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_PGM 0xa > -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_SL_PGM 0xb > -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL0 0xc > -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL0 0xd > -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL1 0xe > -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL1 0xf > -/* enum: Valid in phases 1 (PHASE_RESET) and 4 (PHASE_READY) only */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_ALL 0xffffffff > -/* Chunk ID, or CHUNK_ID_LAST or CHUNK_ID_ABORT */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_OFST 8 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_LEN 4 > -/* enum: Last chunk, containing checksum rather than data */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_LAST 0xffffffff > -/* enum: Abort download of this item */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_ABORT 0xfffffffe > -/* Length of this chunk in bytes */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_LEN_OFST 12 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_LEN_LEN 4 > -/* Data for this chunk */ > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_OFST 16 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_LEN 4 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MINNUM 1 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM 59 > -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM_MCDI2 251 > - > -/* MC_CMD_SATELLITE_DOWNLOAD_OUT msgresponse */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_LEN 8 > -/* Same as MC_CMD_ERR field, but included as 0 in success cases */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_RESULT_OFST 0 > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_RESULT_LEN 4 > -/* Extra status information */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_INFO_OFST 4 > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_INFO_LEN 4 > -/* enum: Code download OK, completed. */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_COMPLETE 0x0 > -/* enum: Code download aborted as requested. */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_ABORTED 0x1 > -/* enum: Code download OK so far, send next chunk. */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_NEXT_CHUNK 0x2 > -/* enum: Download phases out of sequence */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_PHASE 0x100 > -/* enum: Bad target for this phase */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_TARGET 0x101 > -/* enum: Chunk ID out of sequence */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_ID 0x200 > -/* enum: Chunk length zero or too large */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_LEN 0x201 > -/* enum: Checksum was incorrect */ > -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHECKSUM 0x300 > - > - > /***********************************/ > /* MC_CMD_GET_CAPABILITIES > - * Get device capabilities. > - * > - * This is supplementary to the MC_CMD_GET_BOARD_CFG command, and intended to > - * reference inherent device capabilities as opposed to current NVRAM config. > + * Get device capabilities. This is supplementary to the MC_CMD_GET_BOARD_CFG > + * command, and intended to reference inherent device capabilities as opposed > + * to current NVRAM config. > */ > #define MC_CMD_GET_CAPABILITIES 0xbe > #undef MC_CMD_0xbe_PRIVILEGE_CTG > @@ -14490,7 +14113,10 @@ > /* MC_CMD_GET_CAPABILITIES_V2_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V2_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -14900,7 +14526,10 @@ > /* MC_CMD_GET_CAPABILITIES_V3_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V3_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -15335,7 +14964,10 @@ > /* MC_CMD_GET_CAPABILITIES_V4_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V4_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -15778,7 +15410,10 @@ > /* MC_CMD_GET_CAPABILITIES_V5_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V5_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -16226,7 +15861,10 @@ > /* MC_CMD_GET_CAPABILITIES_V6_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -16685,7 +16323,10 @@ > /* MC_CMD_GET_CAPABILITIES_V7_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V7_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -16796,9 +16437,21 @@ > #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 > #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 > #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 > #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_WIDTH 1 > > /* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */ > #define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160 > @@ -17189,7 +16842,10 @@ > /* MC_CMD_GET_CAPABILITIES_V8_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V8_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -17300,9 +16956,21 @@ > #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 > #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 > #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 > #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_WIDTH 1 > /* These bits are reserved for communicating test-specific capabilities to > * host-side test software. All production drivers should treat this field as > * opaque. > @@ -17707,7 +17375,10 @@ > /* MC_CMD_GET_CAPABILITIES_V9_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V9_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -17818,9 +17489,21 @@ > #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 > #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 > #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 > #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_WIDTH 1 > /* These bits are reserved for communicating test-specific capabilities to > * host-side test software. All production drivers should treat this field as > * opaque. > @@ -18260,7 +17943,10 @@ > /* MC_CMD_GET_CAPABILITIES_V10_OUT_ACCESS_NOT_PERMITTED 0xff */ > /* enum: PF does not exist. */ > /* MC_CMD_GET_CAPABILITIES_V10_OUT_PF_NOT_PRESENT 0xfe */ > -/* Number of VIs available for each external port */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > #define MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_OFST 58 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_LEN 2 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_NUM 4 > @@ -18371,9 +18057,21 @@ > #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_WIDTH 1 > /* These bits are reserved for communicating test-specific capabilities to > * host-side test software. All production drivers should treat this field as > * opaque. > @@ -18438,212 +18136,1233 @@ > #define MC_CMD_GET_CAPABILITIES_V10_OUT_GUARANTEED_QUEUE_SIZES_OFST 188 > #define MC_CMD_GET_CAPABILITIES_V10_OUT_GUARANTEED_QUEUE_SIZES_LEN 4 > > - > -/***********************************/ > -/* MC_CMD_V2_EXTN > - * Encapsulation for a v2 extended command > +/* MC_CMD_GET_CAPABILITIES_V11_OUT msgresponse */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LEN 196 > +/* First word of flags. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS1_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS1_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_LBN 3 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_LBN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_LBN 5 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_LBN 6 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_LBN 8 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_LBN 9 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN 10 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 11 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_LBN 14 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_LBN 18 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_LBN 19 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_LBN 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_LBN 21 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_LBN 22 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_LBN 23 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_LBN 24 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_LBN 25 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_LBN 26 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_LBN 27 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_LBN 28 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_LBN 30 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_LBN 31 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_WIDTH 1 > +/* RxDPCPU firmware id. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DPCPU_FW_ID_OFST 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DPCPU_FW_ID_LEN 2 > +/* enum: Standard RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP 0x0 > +/* enum: Low latency RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_LOW_LATENCY 0x1 > +/* enum: Packed stream RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_PACKED_STREAM 0x2 > +/* enum: Rules engine RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_RULES_ENGINE 0x5 > +/* enum: DPDK RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_DPDK 0x6 > +/* enum: BIST RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_BIST 0x10a > +/* enum: RXDP Test firmware image 1 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101 > +/* enum: RXDP Test firmware image 2 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102 > +/* enum: RXDP Test firmware image 3 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103 > +/* enum: RXDP Test firmware image 4 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104 > +/* enum: RXDP Test firmware image 5 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_BACKPRESSURE 0x105 > +/* enum: RXDP Test firmware image 6 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106 > +/* enum: RXDP Test firmware image 7 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107 > +/* enum: RXDP Test firmware image 8 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_DISABLE_DL 0x108 > +/* enum: RXDP Test firmware image 9 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_DOORBELL_DELAY 0x10b > +/* enum: RXDP Test firmware image 10 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_SLOW 0x10c > +/* TxDPCPU firmware id. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DPCPU_FW_ID_OFST 6 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DPCPU_FW_ID_LEN 2 > +/* enum: Standard TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP 0x0 > +/* enum: Low latency TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_LOW_LATENCY 0x1 > +/* enum: High packet rate TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_HIGH_PACKET_RATE 0x3 > +/* enum: Rules engine TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_RULES_ENGINE 0x5 > +/* enum: DPDK TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_DPDK 0x6 > +/* enum: BIST TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_BIST 0x12d > +/* enum: TXDP Test firmware image 1 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_TSO_EDIT 0x101 > +/* enum: TXDP Test firmware image 2 */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102 > +/* enum: TXDP CSR bus test firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_CSR 0x103 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_OFST 8 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_LEN 2 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_OFST 8 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_WIDTH 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_OFST 8 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4 > +/* enum: reserved value - do not use (may indicate alternative interpretation > + * of REV field in future) > */ > -#define MC_CMD_V2_EXTN 0x7f > - > -/* MC_CMD_V2_EXTN_IN msgrequest */ > -#define MC_CMD_V2_EXTN_IN_LEN 4 > -/* the extended command number */ > -#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_LBN 0 > -#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_WIDTH 15 > -#define MC_CMD_V2_EXTN_IN_UNUSED_LBN 15 > -#define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH 1 > -/* the actual length of the encapsulated command (which is not in the v1 > - * header) > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_RESERVED 0x0 > +/* enum: Trivial RX PD firmware for early Huntington development (Huntington > + * development only) > */ > -#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_LBN 16 > -#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_WIDTH 10 > -#define MC_CMD_V2_EXTN_IN_UNUSED2_LBN 26 > -#define MC_CMD_V2_EXTN_IN_UNUSED2_WIDTH 2 > -/* Type of command/response */ > -#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_LBN 28 > -#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH 4 > -/* enum: MCDI command directed to or response originating from the MC. */ > -#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_MC 0x0 > -/* enum: MCDI command directed to a TSA controller. MCDI responses of this type > - * are not defined. > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1 > +/* enum: RX PD firmware for telemetry prototyping (Medford2 development only) > */ > -#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1 > - > - > -/***********************************/ > -/* MC_CMD_TCM_BUCKET_ALLOC > - * Allocate a pacer bucket (for qau rp or a snapper test) > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 > +/* enum: RX PD firmware with approximately Siena-compatible behaviour > + * (Huntington development only) > */ > -#define MC_CMD_TCM_BUCKET_ALLOC 0xb2 > -#undef MC_CMD_0xb2_PRIVILEGE_CTG > - > -#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_TCM_BUCKET_ALLOC_IN msgrequest */ > -#define MC_CMD_TCM_BUCKET_ALLOC_IN_LEN 0 > - > -/* MC_CMD_TCM_BUCKET_ALLOC_OUT msgresponse */ > -#define MC_CMD_TCM_BUCKET_ALLOC_OUT_LEN 4 > -/* the bucket id */ > -#define MC_CMD_TCM_BUCKET_ALLOC_OUT_BUCKET_OFST 0 > -#define MC_CMD_TCM_BUCKET_ALLOC_OUT_BUCKET_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_TCM_BUCKET_FREE > - * Free a pacer bucket > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2 > +/* enum: Full featured RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_FULL_FEATURED 0x3 > +/* enum: (deprecated original name for the FULL_FEATURED variant) */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_VSWITCH 0x3 > +/* enum: siena_compat variant RX PD firmware using PM rather than MAC > + * (Huntington development only) > */ > -#define MC_CMD_TCM_BUCKET_FREE 0xb3 > -#undef MC_CMD_0xb3_PRIVILEGE_CTG > - > -#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_TCM_BUCKET_FREE_IN msgrequest */ > -#define MC_CMD_TCM_BUCKET_FREE_IN_LEN 4 > -/* the bucket id */ > -#define MC_CMD_TCM_BUCKET_FREE_IN_BUCKET_OFST 0 > -#define MC_CMD_TCM_BUCKET_FREE_IN_BUCKET_LEN 4 > - > -/* MC_CMD_TCM_BUCKET_FREE_OUT msgresponse */ > -#define MC_CMD_TCM_BUCKET_FREE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_TCM_BUCKET_INIT > - * Initialise pacer bucket with a given rate > - */ > -#define MC_CMD_TCM_BUCKET_INIT 0xb4 > -#undef MC_CMD_0xb4_PRIVILEGE_CTG > - > -#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_TCM_BUCKET_INIT_IN msgrequest */ > -#define MC_CMD_TCM_BUCKET_INIT_IN_LEN 8 > -/* the bucket id */ > -#define MC_CMD_TCM_BUCKET_INIT_IN_BUCKET_OFST 0 > -#define MC_CMD_TCM_BUCKET_INIT_IN_BUCKET_LEN 4 > -/* the rate in mbps */ > -#define MC_CMD_TCM_BUCKET_INIT_IN_RATE_OFST 4 > -#define MC_CMD_TCM_BUCKET_INIT_IN_RATE_LEN 4 > - > -/* MC_CMD_TCM_BUCKET_INIT_EXT_IN msgrequest */ > -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_LEN 12 > -/* the bucket id */ > -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_BUCKET_OFST 0 > -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_BUCKET_LEN 4 > -/* the rate in mbps */ > -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_RATE_OFST 4 > -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_RATE_LEN 4 > -/* the desired maximum fill level */ > -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_MAX_FILL_OFST 8 > -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_MAX_FILL_LEN 4 > - > -/* MC_CMD_TCM_BUCKET_INIT_OUT msgresponse */ > -#define MC_CMD_TCM_BUCKET_INIT_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_TCM_TXQ_INIT > - * Initialise txq in pacer with given options or set options > - */ > -#define MC_CMD_TCM_TXQ_INIT 0xb5 > -#undef MC_CMD_0xb5_PRIVILEGE_CTG > - > -#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_TCM_TXQ_INIT_IN msgrequest */ > -#define MC_CMD_TCM_TXQ_INIT_IN_LEN 28 > -/* the txq id */ > -#define MC_CMD_TCM_TXQ_INIT_IN_QID_OFST 0 > -#define MC_CMD_TCM_TXQ_INIT_IN_QID_LEN 4 > -/* the static priority associated with the txq */ > -#define MC_CMD_TCM_TXQ_INIT_IN_LABEL_OFST 4 > -#define MC_CMD_TCM_TXQ_INIT_IN_LABEL_LEN 4 > -/* bitmask of the priority queues this txq is inserted into when inserted. */ > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAGS_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAGS_LEN 4 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_LBN 0 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_WIDTH 1 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_LBN 1 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_WIDTH 1 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_LBN 2 > -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_WIDTH 1 > -/* the reaction point (RP) bucket */ > -#define MC_CMD_TCM_TXQ_INIT_IN_RP_BKT_OFST 12 > -#define MC_CMD_TCM_TXQ_INIT_IN_RP_BKT_LEN 4 > -/* an already reserved bucket (typically set to bucket associated with outer > - * vswitch) > - */ > -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT1_OFST 16 > -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT1_LEN 4 > -/* an already reserved bucket (typically set to bucket associated with inner > - * vswitch) > - */ > -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT2_OFST 20 > -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT2_LEN 4 > -/* the min bucket (typically for ETS/minimum bandwidth) */ > -#define MC_CMD_TCM_TXQ_INIT_IN_MIN_BKT_OFST 24 > -#define MC_CMD_TCM_TXQ_INIT_IN_MIN_BKT_LEN 4 > - > -/* MC_CMD_TCM_TXQ_INIT_EXT_IN msgrequest */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LEN 32 > -/* the txq id */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_QID_OFST 0 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_QID_LEN 4 > -/* the static priority associated with the txq */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_NORMAL_OFST 4 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_NORMAL_LEN 4 > -/* bitmask of the priority queues this txq is inserted into when inserted. */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAGS_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAGS_LEN 4 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_LBN 0 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_WIDTH 1 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_LBN 1 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_WIDTH 1 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_OFST 8 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_LBN 2 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_WIDTH 1 > -/* the reaction point (RP) bucket */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_RP_BKT_OFST 12 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_RP_BKT_LEN 4 > -/* an already reserved bucket (typically set to bucket associated with outer > - * vswitch) > - */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT1_OFST 16 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT1_LEN 4 > -/* an already reserved bucket (typically set to bucket associated with inner > - * vswitch) > - */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT2_OFST 20 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT2_LEN 4 > -/* the min bucket (typically for ETS/minimum bandwidth) */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MIN_BKT_OFST 24 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MIN_BKT_LEN 4 > -/* the static priority associated with the txq */ > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_GUARANTEED_OFST 28 > -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_GUARANTEED_LEN 4 > - > -/* MC_CMD_TCM_TXQ_INIT_OUT msgresponse */ > -#define MC_CMD_TCM_TXQ_INIT_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_LINK_PIOBUF > - * Link a push I/O buffer to a TxQ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 > +/* enum: Low latency RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5 > +/* enum: Packed stream RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6 > +/* enum: RX PD firmware handling layer 2 only for high packet rate performance > + * tests (Medford development only) > */ > -#define MC_CMD_LINK_PIOBUF 0x92 > -#undef MC_CMD_0x92_PRIVILEGE_CTG > - > -#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD > - > -/* MC_CMD_LINK_PIOBUF_IN msgrequest */ > -#define MC_CMD_LINK_PIOBUF_IN_LEN 8 > -/* Handle for allocated push I/O buffer. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7 > +/* enum: Rules engine RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_RULES_ENGINE 0x8 > +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_L3XUDP 0x9 > +/* enum: DPDK RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_DPDK 0xa > +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe > +/* enum: RX PD firmware parsing but not filtering network overlay tunnel > + * encapsulations (Medford development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_OFST 10 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_LEN 2 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_OFST 10 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_WIDTH 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_OFST 10 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4 > +/* enum: reserved value - do not use (may indicate alternative interpretation > + * of REV field in future) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_RESERVED 0x0 > +/* enum: Trivial TX PD firmware for early Huntington development (Huntington > + * development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1 > +/* enum: TX PD firmware for telemetry prototyping (Medford2 development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 > +/* enum: TX PD firmware with approximately Siena-compatible behaviour > + * (Huntington development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2 > +/* enum: Full featured TX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_FULL_FEATURED 0x3 > +/* enum: (deprecated original name for the FULL_FEATURED variant) */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_VSWITCH 0x3 > +/* enum: siena_compat variant TX PD firmware using PM rather than MAC > + * (Huntington development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */ > +/* enum: TX PD firmware handling layer 2 only for high packet rate performance > + * tests (Medford development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7 > +/* enum: Rules engine TX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_RULES_ENGINE 0x8 > +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_L3XUDP 0x9 > +/* enum: DPDK TX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_DPDK 0xa > +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe > +/* Hardware capabilities of NIC */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_HW_CAPABILITIES_OFST 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_HW_CAPABILITIES_LEN 4 > +/* Licensed capabilities */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LICENSE_CAPABILITIES_OFST 16 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LICENSE_CAPABILITIES_LEN 4 > +/* Second word of flags. Not present on older firmware (check the length). */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS2_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS2_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_LBN 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_LBN 2 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_LBN 3 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_LBN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_LBN 5 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN 6 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_LBN 8 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_LBN 9 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_LBN 10 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_LBN 11 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_LBN 14 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_LBN 18 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_LBN 19 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_LBN 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN 21 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN 21 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_LBN 22 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN 23 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_LBN 24 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_LBN 25 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_LBN 26 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_LBN 28 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_LBN 29 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_LBN 30 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1 > +/* Number of FATSOv2 contexts per datapath supported by this NIC (when > + * TX_TSO_V2 == 1). Not present on older firmware (check the length). > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2 > +/* One byte per PF containing the number of the external port assigned to this > + * PF, indexed by PF number. Special values indicate that a PF is either not > + * present or not assigned. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST 26 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM 16 > +/* enum: The caller is not permitted to access information on this PF. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ACCESS_NOT_PERMITTED 0xff > +/* enum: PF does not exist. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_PRESENT 0xfe > +/* enum: PF does exist but is not assigned to any external port. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_ASSIGNED 0xfd > +/* enum: This value indicates that PF is assigned, but it cannot be expressed > + * in this field. It is intended for a possible future situation where a more > + * complex scheme of PFs to ports mapping is being used. The future driver > + * should look for a new field supporting the new scheme. The current/old > + * driver should treat this value as PF_NOT_ASSIGNED. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INCOMPATIBLE_ASSIGNMENT 0xfc > +/* One byte per PF containing the number of its VFs, indexed by PF number. A > + * special value indicates that a PF is not present. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_OFST 42 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_LEN 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_NUM 16 > +/* enum: The caller is not permitted to access information on this PF. */ > +/* MC_CMD_GET_CAPABILITIES_V11_OUT_ACCESS_NOT_PERMITTED 0xff */ > +/* enum: PF does not exist. */ > +/* MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_PRESENT 0xfe */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_OFST 58 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_LEN 2 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_NUM 4 > +/* Size of RX descriptor cache expressed as binary logarithm The actual size > + * equals (2 ^ RX_DESC_CACHE_SIZE) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DESC_CACHE_SIZE_OFST 66 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DESC_CACHE_SIZE_LEN 1 > +/* Size of TX descriptor cache expressed as binary logarithm The actual size > + * equals (2 ^ TX_DESC_CACHE_SIZE) > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DESC_CACHE_SIZE_OFST 67 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DESC_CACHE_SIZE_LEN 1 > +/* Total number of available PIO buffers */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_PIO_BUFFS_OFST 68 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_PIO_BUFFS_LEN 2 > +/* Size of a single PIO buffer */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SIZE_PIO_BUFF_OFST 70 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SIZE_PIO_BUFF_LEN 2 > +/* On chips later than Medford the amount of address space assigned to each VI > + * is configurable. This is a global setting that the driver must query to > + * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available > + * with 8k VI windows. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_OFST 72 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_LEN 1 > +/* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. > + * CTPIO is not mapped. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_8K 0x0 > +/* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_16K 0x1 > +/* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_64K 0x2 > +/* Number of vFIFOs per adapter that can be used for VFIFO Stuffing > + * (SF-115995-SW) in the present configuration of firmware and port mode. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST 73 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1 > +/* Number of buffers per adapter that can be used for VFIFO Stuffing > + * (SF-115995-SW) in the present configuration of firmware and port mode. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST 74 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN 2 > +/* Entry count in the MAC stats array, including the final GENERATION_END > + * entry. For MAC stats DMA, drivers should allocate a buffer large enough to > + * hold at least this many 64-bit stats values, if they wish to receive all > + * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the > + * stats array returned will be truncated. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_NUM_STATS_OFST 76 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_NUM_STATS_LEN 2 > +/* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field > + * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_MAX_OFST 80 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_MAX_LEN 4 > +/* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in > + * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when > + * they create an RX queue. Due to hardware limitations, only a small number of > + * different buffer sizes may be available concurrently. Nonzero entries in > + * this array are the sizes of buffers which the system guarantees will be > + * available for use. If the list is empty, there are no limitations on > + * concurrent buffer sizes. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST 84 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM 16 > +/* Third word of flags. Not present on older firmware (check the length). */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS3_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS3_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_LBN 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN 2 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_LBN 3 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_LBN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN 5 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN 6 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_WIDTH 1 > +/* These bits are reserved for communicating test-specific capabilities to > + * host-side test software. All production drivers should treat this field as > + * opaque. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_OFST 152 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LEN 8 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_OFST 152 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_LBN 1216 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_WIDTH 32 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_OFST 156 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_LBN 1248 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_WIDTH 32 > +/* The minimum size (in table entries) of indirection table to be allocated > + * from the pool for an RSS context. Note that the table size used must be a > + * power of 2. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_OFST 160 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4 > +/* The maximum size (in table entries) of indirection table to be allocated > + * from the pool for an RSS context. Note that the table size used must be a > + * power of 2. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_OFST 164 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4 > +/* The maximum number of queues that can be used by an RSS context in exclusive > + * mode. In exclusive mode the context has a configurable indirection table and > + * a configurable RSS key. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_QUEUES_OFST 168 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4 > +/* The maximum number of queues that can be used by an RSS context in even- > + * spreading mode. In even-spreading mode the context has no indirection table > + * but it does have a configurable RSS key. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_OFST 172 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4 > +/* The total number of RSS contexts supported. Note that the number of > + * available contexts using indirection tables is also limited by the > + * availability of indirection table space allocated from a common pool. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_NUM_CONTEXTS_OFST 176 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_NUM_CONTEXTS_LEN 4 > +/* The total amount of indirection table space that can be shared between RSS > + * contexts. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_TABLE_POOL_SIZE_OFST 180 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_TABLE_POOL_SIZE_LEN 4 > +/* A bitmap of the queue sizes the device can provide, where bit N being set > + * indicates that 2**N is a valid size. The device may be limited in the number > + * of different queue sizes that can exist simultaneously, so a bit being set > + * here does not guarantee that an attempt to create a queue of that size will > + * succeed. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SUPPORTED_QUEUE_SIZES_OFST 184 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SUPPORTED_QUEUE_SIZES_LEN 4 > +/* A bitmap of queue sizes that are always available, in the same format as > + * SUPPORTED_QUEUE_SIZES. Attempting to create a queue with one of these sizes > + * will never fail due to unavailability of the requested size. > + */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_QUEUE_SIZES_OFST 188 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_QUEUE_SIZES_LEN 4 > +/* Number of available indirect memory maps. */ > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INDIRECT_MAP_INDEX_COUNT_OFST 192 > +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INDIRECT_MAP_INDEX_COUNT_LEN 4 > + > +/* MC_CMD_GET_CAPABILITIES_V12_OUT msgresponse */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LEN 204 > +/* First word of flags. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS1_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS1_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_LBN 3 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_LBN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_LBN 5 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_LBN 6 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_LBN 8 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_LBN 9 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN 10 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 11 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_LBN 14 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_LBN 18 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_LBN 19 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_LBN 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_LBN 21 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_LBN 22 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_LBN 23 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_LBN 24 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_LBN 25 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_LBN 26 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_LBN 27 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_LBN 28 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_LBN 30 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_OFST 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_LBN 31 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_WIDTH 1 > +/* RxDPCPU firmware id. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DPCPU_FW_ID_OFST 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DPCPU_FW_ID_LEN 2 > +/* enum: Standard RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP 0x0 > +/* enum: Low latency RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_LOW_LATENCY 0x1 > +/* enum: Packed stream RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_PACKED_STREAM 0x2 > +/* enum: Rules engine RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_RULES_ENGINE 0x5 > +/* enum: DPDK RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_DPDK 0x6 > +/* enum: BIST RXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_BIST 0x10a > +/* enum: RXDP Test firmware image 1 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101 > +/* enum: RXDP Test firmware image 2 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102 > +/* enum: RXDP Test firmware image 3 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103 > +/* enum: RXDP Test firmware image 4 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104 > +/* enum: RXDP Test firmware image 5 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_BACKPRESSURE 0x105 > +/* enum: RXDP Test firmware image 6 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106 > +/* enum: RXDP Test firmware image 7 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107 > +/* enum: RXDP Test firmware image 8 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_DISABLE_DL 0x108 > +/* enum: RXDP Test firmware image 9 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_DOORBELL_DELAY 0x10b > +/* enum: RXDP Test firmware image 10 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_SLOW 0x10c > +/* TxDPCPU firmware id. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DPCPU_FW_ID_OFST 6 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DPCPU_FW_ID_LEN 2 > +/* enum: Standard TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP 0x0 > +/* enum: Low latency TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_LOW_LATENCY 0x1 > +/* enum: High packet rate TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_HIGH_PACKET_RATE 0x3 > +/* enum: Rules engine TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_RULES_ENGINE 0x5 > +/* enum: DPDK TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_DPDK 0x6 > +/* enum: BIST TXDP firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_BIST 0x12d > +/* enum: TXDP Test firmware image 1 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_TSO_EDIT 0x101 > +/* enum: TXDP Test firmware image 2 */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102 > +/* enum: TXDP CSR bus test firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_CSR 0x103 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_OFST 8 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_LEN 2 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_OFST 8 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_WIDTH 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_OFST 8 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4 > +/* enum: reserved value - do not use (may indicate alternative interpretation > + * of REV field in future) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_RESERVED 0x0 > +/* enum: Trivial RX PD firmware for early Huntington development (Huntington > + * development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1 > +/* enum: RX PD firmware for telemetry prototyping (Medford2 development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 > +/* enum: RX PD firmware with approximately Siena-compatible behaviour > + * (Huntington development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2 > +/* enum: Full featured RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_FULL_FEATURED 0x3 > +/* enum: (deprecated original name for the FULL_FEATURED variant) */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_VSWITCH 0x3 > +/* enum: siena_compat variant RX PD firmware using PM rather than MAC > + * (Huntington development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 > +/* enum: Low latency RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5 > +/* enum: Packed stream RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6 > +/* enum: RX PD firmware handling layer 2 only for high packet rate performance > + * tests (Medford development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7 > +/* enum: Rules engine RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_RULES_ENGINE 0x8 > +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_L3XUDP 0x9 > +/* enum: DPDK RX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_DPDK 0xa > +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe > +/* enum: RX PD firmware parsing but not filtering network overlay tunnel > + * encapsulations (Medford development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_OFST 10 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_LEN 2 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_OFST 10 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_WIDTH 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_OFST 10 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4 > +/* enum: reserved value - do not use (may indicate alternative interpretation > + * of REV field in future) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_RESERVED 0x0 > +/* enum: Trivial TX PD firmware for early Huntington development (Huntington > + * development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1 > +/* enum: TX PD firmware for telemetry prototyping (Medford2 development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 > +/* enum: TX PD firmware with approximately Siena-compatible behaviour > + * (Huntington development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2 > +/* enum: Full featured TX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_FULL_FEATURED 0x3 > +/* enum: (deprecated original name for the FULL_FEATURED variant) */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_VSWITCH 0x3 > +/* enum: siena_compat variant TX PD firmware using PM rather than MAC > + * (Huntington development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */ > +/* enum: TX PD firmware handling layer 2 only for high packet rate performance > + * tests (Medford development only) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7 > +/* enum: Rules engine TX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_RULES_ENGINE 0x8 > +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_L3XUDP 0x9 > +/* enum: DPDK TX PD production firmware */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_DPDK 0xa > +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe > +/* Hardware capabilities of NIC */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_HW_CAPABILITIES_OFST 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_HW_CAPABILITIES_LEN 4 > +/* Licensed capabilities */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LICENSE_CAPABILITIES_OFST 16 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LICENSE_CAPABILITIES_LEN 4 > +/* Second word of flags. Not present on older firmware (check the length). */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS2_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS2_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_LBN 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_LBN 2 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_LBN 3 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_LBN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_LBN 5 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN 6 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_LBN 8 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_LBN 9 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_LBN 10 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_LBN 11 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_LBN 14 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_LBN 18 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_LBN 19 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_LBN 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN 21 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN 21 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_LBN 22 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN 23 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_LBN 24 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_LBN 25 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_LBN 26 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_LBN 28 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_LBN 29 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_LBN 30 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST 20 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1 > +/* Number of FATSOv2 contexts per datapath supported by this NIC (when > + * TX_TSO_V2 == 1). Not present on older firmware (check the length). > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2 > +/* One byte per PF containing the number of the external port assigned to this > + * PF, indexed by PF number. Special values indicate that a PF is either not > + * present or not assigned. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST 26 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM 16 > +/* enum: The caller is not permitted to access information on this PF. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ACCESS_NOT_PERMITTED 0xff > +/* enum: PF does not exist. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_PRESENT 0xfe > +/* enum: PF does exist but is not assigned to any external port. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_ASSIGNED 0xfd > +/* enum: This value indicates that PF is assigned, but it cannot be expressed > + * in this field. It is intended for a possible future situation where a more > + * complex scheme of PFs to ports mapping is being used. The future driver > + * should look for a new field supporting the new scheme. The current/old > + * driver should treat this value as PF_NOT_ASSIGNED. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INCOMPATIBLE_ASSIGNMENT 0xfc > +/* One byte per PF containing the number of its VFs, indexed by PF number. A > + * special value indicates that a PF is not present. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_OFST 42 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_LEN 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_NUM 16 > +/* enum: The caller is not permitted to access information on this PF. */ > +/* MC_CMD_GET_CAPABILITIES_V12_OUT_ACCESS_NOT_PERMITTED 0xff */ > +/* enum: PF does not exist. */ > +/* MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_PRESENT 0xfe */ > +/* Number of VIs available for external ports 0-3. For devices with more than > + * four ports, the remainder are in NUM_VIS_PER_PORT2 in > + * GET_CAPABILITIES_V12_OUT. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_OFST 58 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_LEN 2 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_NUM 4 > +/* Size of RX descriptor cache expressed as binary logarithm The actual size > + * equals (2 ^ RX_DESC_CACHE_SIZE) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DESC_CACHE_SIZE_OFST 66 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DESC_CACHE_SIZE_LEN 1 > +/* Size of TX descriptor cache expressed as binary logarithm The actual size > + * equals (2 ^ TX_DESC_CACHE_SIZE) > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DESC_CACHE_SIZE_OFST 67 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DESC_CACHE_SIZE_LEN 1 > +/* Total number of available PIO buffers */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_PIO_BUFFS_OFST 68 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_PIO_BUFFS_LEN 2 > +/* Size of a single PIO buffer */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SIZE_PIO_BUFF_OFST 70 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SIZE_PIO_BUFF_LEN 2 > +/* On chips later than Medford the amount of address space assigned to each VI > + * is configurable. This is a global setting that the driver must query to > + * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available > + * with 8k VI windows. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_OFST 72 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_LEN 1 > +/* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. > + * CTPIO is not mapped. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_8K 0x0 > +/* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_16K 0x1 > +/* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_64K 0x2 > +/* Number of vFIFOs per adapter that can be used for VFIFO Stuffing > + * (SF-115995-SW) in the present configuration of firmware and port mode. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST 73 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1 > +/* Number of buffers per adapter that can be used for VFIFO Stuffing > + * (SF-115995-SW) in the present configuration of firmware and port mode. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST 74 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN 2 > +/* Entry count in the MAC stats array, including the final GENERATION_END > + * entry. For MAC stats DMA, drivers should allocate a buffer large enough to > + * hold at least this many 64-bit stats values, if they wish to receive all > + * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the > + * stats array returned will be truncated. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_NUM_STATS_OFST 76 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_NUM_STATS_LEN 2 > +/* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field > + * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_MAX_OFST 80 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_MAX_LEN 4 > +/* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in > + * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when > + * they create an RX queue. Due to hardware limitations, only a small number of > + * different buffer sizes may be available concurrently. Nonzero entries in > + * this array are the sizes of buffers which the system guarantees will be > + * available for use. If the list is empty, there are no limitations on > + * concurrent buffer sizes. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST 84 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM 16 > +/* Third word of flags. Not present on older firmware (check the length). */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS3_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS3_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_LBN 0 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_LBN 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN 2 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_LBN 3 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_LBN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN 5 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN 6 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_LBN 15 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_OFST 148 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_LBN 17 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_WIDTH 1 > +/* These bits are reserved for communicating test-specific capabilities to > + * host-side test software. All production drivers should treat this field as > + * opaque. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_OFST 152 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LEN 8 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_OFST 152 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_LBN 1216 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_WIDTH 32 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_OFST 156 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_LEN 4 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_LBN 1248 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_WIDTH 32 > +/* The minimum size (in table entries) of indirection table to be allocated > + * from the pool for an RSS context. Note that the table size used must be a > + * power of 2. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_OFST 160 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4 > +/* The maximum size (in table entries) of indirection table to be allocated > + * from the pool for an RSS context. Note that the table size used must be a > + * power of 2. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_OFST 164 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4 > +/* The maximum number of queues that can be used by an RSS context in exclusive > + * mode. In exclusive mode the context has a configurable indirection table and > + * a configurable RSS key. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_QUEUES_OFST 168 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4 > +/* The maximum number of queues that can be used by an RSS context in even- > + * spreading mode. In even-spreading mode the context has no indirection table > + * but it does have a configurable RSS key. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_OFST 172 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4 > +/* The total number of RSS contexts supported. Note that the number of > + * available contexts using indirection tables is also limited by the > + * availability of indirection table space allocated from a common pool. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_NUM_CONTEXTS_OFST 176 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_NUM_CONTEXTS_LEN 4 > +/* The total amount of indirection table space that can be shared between RSS > + * contexts. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_TABLE_POOL_SIZE_OFST 180 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_TABLE_POOL_SIZE_LEN 4 > +/* A bitmap of the queue sizes the device can provide, where bit N being set > + * indicates that 2**N is a valid size. The device may be limited in the number > + * of different queue sizes that can exist simultaneously, so a bit being set > + * here does not guarantee that an attempt to create a queue of that size will > + * succeed. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SUPPORTED_QUEUE_SIZES_OFST 184 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SUPPORTED_QUEUE_SIZES_LEN 4 > +/* A bitmap of queue sizes that are always available, in the same format as > + * SUPPORTED_QUEUE_SIZES. Attempting to create a queue with one of these sizes > + * will never fail due to unavailability of the requested size. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_QUEUE_SIZES_OFST 188 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_QUEUE_SIZES_LEN 4 > +/* Number of available indirect memory maps. */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INDIRECT_MAP_INDEX_COUNT_OFST 192 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INDIRECT_MAP_INDEX_COUNT_LEN 4 > +/* Number of VIs available for external ports 4-7. Information for ports 0-3 is > + * in NUM_VIS_PER_PORT in GET_CAPABILITIES_V2_OUT. > + */ > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_OFST 196 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_LEN 2 > +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_NUM 4 > + > + > +/***********************************/ > +/* MC_CMD_V2_EXTN > + * Encapsulation for a v2 extended command > + */ > +#define MC_CMD_V2_EXTN 0x7f > + > +/* MC_CMD_V2_EXTN_IN msgrequest */ > +#define MC_CMD_V2_EXTN_IN_LEN 4 > +/* the extended command number */ > +#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_LBN 0 > +#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_WIDTH 15 > +#define MC_CMD_V2_EXTN_IN_UNUSED_LBN 15 > +#define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH 1 > +/* the actual length of the encapsulated command (which is not in the v1 > + * header) > + */ > +#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_LBN 16 > +#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_WIDTH 10 > +#define MC_CMD_V2_EXTN_IN_UNUSED2_LBN 26 > +#define MC_CMD_V2_EXTN_IN_UNUSED2_WIDTH 2 > +/* Type of command/response */ > +#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_LBN 28 > +#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH 4 > +/* enum: MCDI command directed to or response originating from the MC. */ > +#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_MC 0x0 > +/* enum: MCDI command directed to a TSA controller. MCDI responses of this type > + * are not defined. > + */ > +#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1 > +/* enum: MCDI command used for platform management. Typically, these commands > + * are used for low-level operations directed at the platform as a whole (e.g. > + * MMIO device enumeration) rather than individual functions and use a > + * dedicated comms channel (e.g. RPmsg/IPI). May be handled by the same or > + * different CPU as MCDI_MESSAGE_TYPE_MC. > + */ > +#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_PLATFORM 0x2 > + > + > +/***********************************/ > +/* MC_CMD_LINK_PIOBUF > + * Link a push I/O buffer to a TxQ > + */ > +#define MC_CMD_LINK_PIOBUF 0x92 > +#undef MC_CMD_0x92_PRIVILEGE_CTG > + > +#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD > + > +/* MC_CMD_LINK_PIOBUF_IN msgrequest */ > +#define MC_CMD_LINK_PIOBUF_IN_LEN 8 > +/* Handle for allocated push I/O buffer. */ > #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0 > #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4 > /* Function Local Instance (VI) number which has a TxQ allocated to it. */ > @@ -18739,27 +19458,6 @@ > #define MC_CMD_VSWITCH_FREE_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_VSWITCH_QUERY > - * read some config of v-switch. For now this command is an empty placeholder. > - * It may be used to check if a v-switch is connected to a given EVB port (if > - * not, then the command returns ENOENT). > - */ > -#define MC_CMD_VSWITCH_QUERY 0x63 > -#undef MC_CMD_0x63_PRIVILEGE_CTG > - > -#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_VSWITCH_QUERY_IN msgrequest */ > -#define MC_CMD_VSWITCH_QUERY_IN_LEN 4 > -/* The port to which the v-switch is connected. */ > -#define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_OFST 0 > -#define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_LEN 4 > - > -/* MC_CMD_VSWITCH_QUERY_OUT msgresponse */ > -#define MC_CMD_VSWITCH_QUERY_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_VPORT_ALLOC > * allocate a v-port. > @@ -18935,28 +19633,6 @@ > #define MC_CMD_VADAPTOR_SET_MAC_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_VADAPTOR_GET_MAC > - * read the MAC address assigned to a v-adaptor. > - */ > -#define MC_CMD_VADAPTOR_GET_MAC 0x5e > -#undef MC_CMD_0x5e_PRIVILEGE_CTG > - > -#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_VADAPTOR_GET_MAC_IN msgrequest */ > -#define MC_CMD_VADAPTOR_GET_MAC_IN_LEN 4 > -/* The port to which the v-adaptor is connected. */ > -#define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_OFST 0 > -#define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_LEN 4 > - > -/* MC_CMD_VADAPTOR_GET_MAC_OUT msgresponse */ > -#define MC_CMD_VADAPTOR_GET_MAC_OUT_LEN 6 > -/* The MAC address assigned to this v-adaptor */ > -#define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_OFST 0 > -#define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_LEN 6 > - > - > /***********************************/ > /* MC_CMD_VADAPTOR_QUERY > * read some config of v-adaptor. > @@ -19013,86 +19689,6 @@ > #define MC_CMD_EVB_PORT_ASSIGN_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_RDWR_A64_REGIONS > - * Assign the 64 bit region addresses. > - */ > -#define MC_CMD_RDWR_A64_REGIONS 0x9b > -#undef MC_CMD_0x9b_PRIVILEGE_CTG > - > -#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_RDWR_A64_REGIONS_IN msgrequest */ > -#define MC_CMD_RDWR_A64_REGIONS_IN_LEN 17 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_OFST 0 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_LEN 4 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_OFST 4 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_LEN 4 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_OFST 8 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_LEN 4 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_OFST 12 > -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_LEN 4 > -/* Write enable bits 0-3, set to write, clear to read. */ > -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_LBN 128 > -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_WIDTH 4 > -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_OFST 16 > -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_LEN 1 > - > -/* MC_CMD_RDWR_A64_REGIONS_OUT msgresponse: This data always included > - * regardless of state of write bits in the request. > - */ > -#define MC_CMD_RDWR_A64_REGIONS_OUT_LEN 16 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_OFST 0 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_LEN 4 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_OFST 4 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_LEN 4 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_OFST 8 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_LEN 4 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_OFST 12 > -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_ONLOAD_STACK_ALLOC > - * Allocate an Onload stack ID. > - */ > -#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c > -#undef MC_CMD_0x9c_PRIVILEGE_CTG > - > -#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD > - > -/* MC_CMD_ONLOAD_STACK_ALLOC_IN msgrequest */ > -#define MC_CMD_ONLOAD_STACK_ALLOC_IN_LEN 4 > -/* The handle of the owning upstream port */ > -#define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 > -#define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4 > - > -/* MC_CMD_ONLOAD_STACK_ALLOC_OUT msgresponse */ > -#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_LEN 4 > -/* The handle of the new Onload stack */ > -#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_OFST 0 > -#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_ONLOAD_STACK_FREE > - * Free an Onload stack ID. > - */ > -#define MC_CMD_ONLOAD_STACK_FREE 0x9d > -#undef MC_CMD_0x9d_PRIVILEGE_CTG > - > -#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD > - > -/* MC_CMD_ONLOAD_STACK_FREE_IN msgrequest */ > -#define MC_CMD_ONLOAD_STACK_FREE_IN_LEN 4 > -/* The handle of the Onload stack */ > -#define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_OFST 0 > -#define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_LEN 4 > - > -/* MC_CMD_ONLOAD_STACK_FREE_OUT msgresponse */ > -#define MC_CMD_ONLOAD_STACK_FREE_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_RSS_CONTEXT_ALLOC > * Allocate an RSS context. > @@ -19304,93 +19900,6 @@ > #define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_LEN 128 > > > -/***********************************/ > -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE > - * Write a portion of a selectable-size indirection table for an RSS context. > - * This command must be used instead of MC_CMD_RSS_CONTEXT_SET_TABLE if the > - * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES. > - */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e > -#undef MC_CMD_0x13e_PRIVILEGE_CTG > - > -#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN msgrequest */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMIN 8 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX 252 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LEN(num) (4+4*(num)) > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_NUM(len) (((len)-4)/4) > -/* The handle of the RSS context */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_OFST 0 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_LEN 4 > -/* An array of index-value pairs to be written to the table. Structure is > - * MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY. > - */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_OFST 4 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_LEN 4 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MINNUM 1 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM 62 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM_MCDI2 254 > - > -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT msgresponse */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT_LEN 0 > - > -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY structuredef */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_LEN 4 > -/* The index of the table entry to be written. */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_OFST 0 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LEN 2 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LBN 0 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_WIDTH 16 > -/* The value to write into the table entry. */ > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_OFST 2 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LEN 2 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LBN 16 > -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_WIDTH 16 > - > - > -/***********************************/ > -/* MC_CMD_RSS_CONTEXT_READ_TABLE > - * Read a portion of a selectable-size indirection table for an RSS context. > - * This command must be used instead of MC_CMD_RSS_CONTEXT_GET_TABLE if the > - * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES. > - */ > -#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f > -#undef MC_CMD_0x13f_PRIVILEGE_CTG > - > -#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_RSS_CONTEXT_READ_TABLE_IN msgrequest */ > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMIN 6 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX 252 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LEN(num) (4+2*(num)) > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_NUM(len) (((len)-4)/2) > -/* The handle of the RSS context */ > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_OFST 0 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_LEN 4 > -/* An array containing the indices of the entries to be read. */ > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_OFST 4 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_LEN 2 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MINNUM 1 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM 124 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM_MCDI2 508 > - > -/* MC_CMD_RSS_CONTEXT_READ_TABLE_OUT msgresponse */ > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMIN 2 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX 252 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LEN(num) (0+2*(num)) > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_NUM(len) (((len)-0)/2) > -/* A buffer containing the requested entries read from the table. */ > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_OFST 0 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_LEN 2 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MINNUM 1 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM 126 > -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM_MCDI2 510 > - > - > /***********************************/ > /* MC_CMD_RSS_CONTEXT_SET_FLAGS > * Set various control flags for an RSS context. > @@ -19524,158 +20033,6 @@ > #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_WIDTH 4 > > > -/***********************************/ > -/* MC_CMD_DOT1P_MAPPING_ALLOC > - * Allocate a .1p mapping. > - */ > -#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4 > -#undef MC_CMD_0xa4_PRIVILEGE_CTG > - > -#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DOT1P_MAPPING_ALLOC_IN msgrequest */ > -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_LEN 8 > -/* The handle of the owning upstream port */ > -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 > -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4 > -/* Number of queues spanned by this mapping, in the range 1-64; valid fixed > - * offsets in the mapping table will be in the range 0 to NUM_QUEUES-1, and > - * referenced RSS contexts must span no more than this number. > - */ > -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_NUM_QUEUES_OFST 4 > -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_NUM_QUEUES_LEN 4 > - > -/* MC_CMD_DOT1P_MAPPING_ALLOC_OUT msgresponse */ > -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_LEN 4 > -/* The handle of the new .1p mapping. This should be considered opaque to the > - * host, although a value of 0xFFFFFFFF is guaranteed never to be a valid > - * handle. > - */ > -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_OFST 0 > -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_LEN 4 > -/* enum: guaranteed invalid .1p mapping handle value */ > -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_INVALID 0xffffffff > - > - > -/***********************************/ > -/* MC_CMD_DOT1P_MAPPING_FREE > - * Free a .1p mapping. > - */ > -#define MC_CMD_DOT1P_MAPPING_FREE 0xa5 > -#undef MC_CMD_0xa5_PRIVILEGE_CTG > - > -#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DOT1P_MAPPING_FREE_IN msgrequest */ > -#define MC_CMD_DOT1P_MAPPING_FREE_IN_LEN 4 > -/* The handle of the .1p mapping */ > -#define MC_CMD_DOT1P_MAPPING_FREE_IN_DOT1P_MAPPING_ID_OFST 0 > -#define MC_CMD_DOT1P_MAPPING_FREE_IN_DOT1P_MAPPING_ID_LEN 4 > - > -/* MC_CMD_DOT1P_MAPPING_FREE_OUT msgresponse */ > -#define MC_CMD_DOT1P_MAPPING_FREE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_DOT1P_MAPPING_SET_TABLE > - * Set the mapping table for a .1p mapping. > - */ > -#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6 > -#undef MC_CMD_0xa6_PRIVILEGE_CTG > - > -#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DOT1P_MAPPING_SET_TABLE_IN msgrequest */ > -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_LEN 36 > -/* The handle of the .1p mapping */ > -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0 > -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_DOT1P_MAPPING_ID_LEN 4 > -/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context > - * handle) > - */ > -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_OFST 4 > -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_LEN 32 > - > -/* MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT msgresponse */ > -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_DOT1P_MAPPING_GET_TABLE > - * Get the mapping table for a .1p mapping. > - */ > -#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7 > -#undef MC_CMD_0xa7_PRIVILEGE_CTG > - > -#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DOT1P_MAPPING_GET_TABLE_IN msgrequest */ > -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_LEN 4 > -/* The handle of the .1p mapping */ > -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0 > -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_DOT1P_MAPPING_ID_LEN 4 > - > -/* MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT msgresponse */ > -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_LEN 36 > -/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context > - * handle) > - */ > -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_OFST 4 > -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_LEN 32 > - > - > -/***********************************/ > -/* MC_CMD_GET_VECTOR_CFG > - * Get Interrupt Vector config for this PF. > - */ > -#define MC_CMD_GET_VECTOR_CFG 0xbf > -#undef MC_CMD_0xbf_PRIVILEGE_CTG > - > -#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_VECTOR_CFG_IN msgrequest */ > -#define MC_CMD_GET_VECTOR_CFG_IN_LEN 0 > - > -/* MC_CMD_GET_VECTOR_CFG_OUT msgresponse */ > -#define MC_CMD_GET_VECTOR_CFG_OUT_LEN 12 > -/* Base absolute interrupt vector number. */ > -#define MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_OFST 0 > -#define MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_LEN 4 > -/* Number of interrupt vectors allocate to this PF. */ > -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_OFST 4 > -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_LEN 4 > -/* Number of interrupt vectors to allocate per VF. */ > -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_OFST 8 > -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_SET_VECTOR_CFG > - * Set Interrupt Vector config for this PF. > - */ > -#define MC_CMD_SET_VECTOR_CFG 0xc0 > -#undef MC_CMD_0xc0_PRIVILEGE_CTG > - > -#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_SET_VECTOR_CFG_IN msgrequest */ > -#define MC_CMD_SET_VECTOR_CFG_IN_LEN 12 > -/* Base absolute interrupt vector number, or MC_CMD_RESOURCE_INSTANCE_ANY to > - * let the system find a suitable base. > - */ > -#define MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_OFST 0 > -#define MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_LEN 4 > -/* Number of interrupt vectors allocate to this PF. */ > -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_OFST 4 > -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_LEN 4 > -/* Number of interrupt vectors to allocate per VF. */ > -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_OFST 8 > -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_LEN 4 > - > -/* MC_CMD_SET_VECTOR_CFG_OUT msgresponse */ > -#define MC_CMD_SET_VECTOR_CFG_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_VPORT_ADD_MAC_ADDRESS > * Add a MAC address to a v-port > @@ -19809,124 +20166,6 @@ > #define MC_CMD_VPORT_RECONFIGURE_OUT_RESET_DONE_WIDTH 1 > > > -/***********************************/ > -/* MC_CMD_EVB_PORT_QUERY > - * read some config of v-port. > - */ > -#define MC_CMD_EVB_PORT_QUERY 0x62 > -#undef MC_CMD_0x62_PRIVILEGE_CTG > - > -#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_EVB_PORT_QUERY_IN msgrequest */ > -#define MC_CMD_EVB_PORT_QUERY_IN_LEN 4 > -/* The handle of the v-port */ > -#define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_OFST 0 > -#define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_LEN 4 > - > -/* MC_CMD_EVB_PORT_QUERY_OUT msgresponse */ > -#define MC_CMD_EVB_PORT_QUERY_OUT_LEN 8 > -/* The EVB port flags as defined at MC_CMD_VPORT_ALLOC. */ > -#define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_OFST 0 > -#define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_LEN 4 > -/* The number of VLAN tags that may be used on a v-adaptor connected to this > - * EVB port. > - */ > -#define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_OFST 4 > -#define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_DUMP_BUFTBL_ENTRIES > - * Dump buffer table entries, mainly for command client debug use. Dumps > - * absolute entries, and does not use chunk handles. All entries must be in > - * range, and used for q page mapping, Although the latter restriction may be > - * lifted in future. > - */ > -#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab > -#undef MC_CMD_0xab_PRIVILEGE_CTG > - > -#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_DUMP_BUFTBL_ENTRIES_IN msgrequest */ > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_LEN 8 > -/* Index of the first buffer table entry. */ > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_FIRSTID_OFST 0 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4 > -/* Number of buffer table entries to dump. */ > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 4 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4 > - > -/* MC_CMD_DUMP_BUFTBL_ENTRIES_OUT msgresponse */ > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMIN 12 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX 252 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LEN(num) (0+12*(num)) > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_NUM(len) (((len)-0)/12) > -/* Raw buffer table entries, layed out as BUFTBL_ENTRY. */ > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_OFST 0 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_LEN 12 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MINNUM 1 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM 21 > -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM_MCDI2 85 > - > - > -/***********************************/ > -/* MC_CMD_SET_RXDP_CONFIG > - * Set global RXDP configuration settings > - */ > -#define MC_CMD_SET_RXDP_CONFIG 0xc1 > -#undef MC_CMD_0xc1_PRIVILEGE_CTG > - > -#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SET_RXDP_CONFIG_IN msgrequest */ > -#define MC_CMD_SET_RXDP_CONFIG_IN_LEN 4 > -#define MC_CMD_SET_RXDP_CONFIG_IN_DATA_OFST 0 > -#define MC_CMD_SET_RXDP_CONFIG_IN_DATA_LEN 4 > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_OFST 0 > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_LBN 0 > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_WIDTH 1 > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_OFST 0 > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_LBN 1 > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_WIDTH 2 > -/* enum: pad to 64 bytes */ > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64 0x0 > -/* enum: pad to 128 bytes (Medford only) */ > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128 0x1 > -/* enum: pad to 256 bytes (Medford only) */ > -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256 0x2 > - > -/* MC_CMD_SET_RXDP_CONFIG_OUT msgresponse */ > -#define MC_CMD_SET_RXDP_CONFIG_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_GET_RXDP_CONFIG > - * Get global RXDP configuration settings > - */ > -#define MC_CMD_GET_RXDP_CONFIG 0xc2 > -#undef MC_CMD_0xc2_PRIVILEGE_CTG > - > -#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_RXDP_CONFIG_IN msgrequest */ > -#define MC_CMD_GET_RXDP_CONFIG_IN_LEN 0 > - > -/* MC_CMD_GET_RXDP_CONFIG_OUT msgresponse */ > -#define MC_CMD_GET_RXDP_CONFIG_OUT_LEN 4 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_DATA_OFST 0 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_DATA_LEN 4 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_OFST 0 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_LBN 0 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_WIDTH 1 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_OFST 0 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_LBN 1 > -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_WIDTH 2 > -/* Enum values, see field(s): */ > -/* MC_CMD_SET_RXDP_CONFIG/MC_CMD_SET_RXDP_CONFIG_IN/PAD_HOST_LEN */ > - > - > /***********************************/ > /* MC_CMD_GET_CLOCK > * Return the system and PDCPU clock frequencies. > @@ -19949,210 +20188,6 @@ > #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_LEN 4 > > > -/***********************************/ > -/* MC_CMD_SET_CLOCK > - * Control the system and DPCPU clock frequencies. Changes are lost reboot. > - */ > -#define MC_CMD_SET_CLOCK 0xad > -#undef MC_CMD_0xad_PRIVILEGE_CTG > - > -#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_SET_CLOCK_IN msgrequest */ > -#define MC_CMD_SET_CLOCK_IN_LEN 28 > -/* Requested frequency in MHz for system clock domain */ > -#define MC_CMD_SET_CLOCK_IN_SYS_FREQ_OFST 0 > -#define MC_CMD_SET_CLOCK_IN_SYS_FREQ_LEN 4 > -/* enum: Leave the system clock domain frequency unchanged */ > -#define MC_CMD_SET_CLOCK_IN_SYS_DOMAIN_DONT_CHANGE 0x0 > -/* Requested frequency in MHz for inter-core clock domain */ > -#define MC_CMD_SET_CLOCK_IN_ICORE_FREQ_OFST 4 > -#define MC_CMD_SET_CLOCK_IN_ICORE_FREQ_LEN 4 > -/* enum: Leave the inter-core clock domain frequency unchanged */ > -#define MC_CMD_SET_CLOCK_IN_ICORE_DOMAIN_DONT_CHANGE 0x0 > -/* Requested frequency in MHz for DPCPU clock domain */ > -#define MC_CMD_SET_CLOCK_IN_DPCPU_FREQ_OFST 8 > -#define MC_CMD_SET_CLOCK_IN_DPCPU_FREQ_LEN 4 > -/* enum: Leave the DPCPU clock domain frequency unchanged */ > -#define MC_CMD_SET_CLOCK_IN_DPCPU_DOMAIN_DONT_CHANGE 0x0 > -/* Requested frequency in MHz for PCS clock domain */ > -#define MC_CMD_SET_CLOCK_IN_PCS_FREQ_OFST 12 > -#define MC_CMD_SET_CLOCK_IN_PCS_FREQ_LEN 4 > -/* enum: Leave the PCS clock domain frequency unchanged */ > -#define MC_CMD_SET_CLOCK_IN_PCS_DOMAIN_DONT_CHANGE 0x0 > -/* Requested frequency in MHz for MC clock domain */ > -#define MC_CMD_SET_CLOCK_IN_MC_FREQ_OFST 16 > -#define MC_CMD_SET_CLOCK_IN_MC_FREQ_LEN 4 > -/* enum: Leave the MC clock domain frequency unchanged */ > -#define MC_CMD_SET_CLOCK_IN_MC_DOMAIN_DONT_CHANGE 0x0 > -/* Requested frequency in MHz for rmon clock domain */ > -#define MC_CMD_SET_CLOCK_IN_RMON_FREQ_OFST 20 > -#define MC_CMD_SET_CLOCK_IN_RMON_FREQ_LEN 4 > -/* enum: Leave the rmon clock domain frequency unchanged */ > -#define MC_CMD_SET_CLOCK_IN_RMON_DOMAIN_DONT_CHANGE 0x0 > -/* Requested frequency in MHz for vswitch clock domain */ > -#define MC_CMD_SET_CLOCK_IN_VSWITCH_FREQ_OFST 24 > -#define MC_CMD_SET_CLOCK_IN_VSWITCH_FREQ_LEN 4 > -/* enum: Leave the vswitch clock domain frequency unchanged */ > -#define MC_CMD_SET_CLOCK_IN_VSWITCH_DOMAIN_DONT_CHANGE 0x0 > - > -/* MC_CMD_SET_CLOCK_OUT msgresponse */ > -#define MC_CMD_SET_CLOCK_OUT_LEN 28 > -/* Resulting system frequency in MHz */ > -#define MC_CMD_SET_CLOCK_OUT_SYS_FREQ_OFST 0 > -#define MC_CMD_SET_CLOCK_OUT_SYS_FREQ_LEN 4 > -/* enum: The system clock domain doesn't exist */ > -#define MC_CMD_SET_CLOCK_OUT_SYS_DOMAIN_UNSUPPORTED 0x0 > -/* Resulting inter-core frequency in MHz */ > -#define MC_CMD_SET_CLOCK_OUT_ICORE_FREQ_OFST 4 > -#define MC_CMD_SET_CLOCK_OUT_ICORE_FREQ_LEN 4 > -/* enum: The inter-core clock domain doesn't exist / isn't used */ > -#define MC_CMD_SET_CLOCK_OUT_ICORE_DOMAIN_UNSUPPORTED 0x0 > -/* Resulting DPCPU frequency in MHz */ > -#define MC_CMD_SET_CLOCK_OUT_DPCPU_FREQ_OFST 8 > -#define MC_CMD_SET_CLOCK_OUT_DPCPU_FREQ_LEN 4 > -/* enum: The dpcpu clock domain doesn't exist */ > -#define MC_CMD_SET_CLOCK_OUT_DPCPU_DOMAIN_UNSUPPORTED 0x0 > -/* Resulting PCS frequency in MHz */ > -#define MC_CMD_SET_CLOCK_OUT_PCS_FREQ_OFST 12 > -#define MC_CMD_SET_CLOCK_OUT_PCS_FREQ_LEN 4 > -/* enum: The PCS clock domain doesn't exist / isn't controlled */ > -#define MC_CMD_SET_CLOCK_OUT_PCS_DOMAIN_UNSUPPORTED 0x0 > -/* Resulting MC frequency in MHz */ > -#define MC_CMD_SET_CLOCK_OUT_MC_FREQ_OFST 16 > -#define MC_CMD_SET_CLOCK_OUT_MC_FREQ_LEN 4 > -/* enum: The MC clock domain doesn't exist / isn't controlled */ > -#define MC_CMD_SET_CLOCK_OUT_MC_DOMAIN_UNSUPPORTED 0x0 > -/* Resulting rmon frequency in MHz */ > -#define MC_CMD_SET_CLOCK_OUT_RMON_FREQ_OFST 20 > -#define MC_CMD_SET_CLOCK_OUT_RMON_FREQ_LEN 4 > -/* enum: The rmon clock domain doesn't exist / isn't controlled */ > -#define MC_CMD_SET_CLOCK_OUT_RMON_DOMAIN_UNSUPPORTED 0x0 > -/* Resulting vswitch frequency in MHz */ > -#define MC_CMD_SET_CLOCK_OUT_VSWITCH_FREQ_OFST 24 > -#define MC_CMD_SET_CLOCK_OUT_VSWITCH_FREQ_LEN 4 > -/* enum: The vswitch clock domain doesn't exist / isn't controlled */ > -#define MC_CMD_SET_CLOCK_OUT_VSWITCH_DOMAIN_UNSUPPORTED 0x0 > - > - > -/***********************************/ > -/* MC_CMD_DPCPU_RPC > - * Send an arbitrary DPCPU message. > - */ > -#define MC_CMD_DPCPU_RPC 0xae > -#undef MC_CMD_0xae_PRIVILEGE_CTG > - > -#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_DPCPU_RPC_IN msgrequest */ > -#define MC_CMD_DPCPU_RPC_IN_LEN 36 > -#define MC_CMD_DPCPU_RPC_IN_CPU_OFST 0 > -#define MC_CMD_DPCPU_RPC_IN_CPU_LEN 4 > -/* enum: RxDPCPU0 */ > -#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX0 0x0 > -/* enum: TxDPCPU0 */ > -#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX0 0x1 > -/* enum: TxDPCPU1 */ > -#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX1 0x2 > -/* enum: RxDPCPU1 (Medford only) */ > -#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX1 0x3 > -/* enum: RxDPCPU (will be for the calling function; for now, just an alias of > - * DPCPU_RX0) > - */ > -#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX 0x80 > -/* enum: TxDPCPU (will be for the calling function; for now, just an alias of > - * DPCPU_TX0) > - */ > -#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX 0x81 > -/* First 8 bits [39:32] of DATA are consumed by MC-DPCPU protocol and must be > - * initialised to zero > - */ > -#define MC_CMD_DPCPU_RPC_IN_DATA_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_DATA_LEN 32 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_LBN 8 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_WIDTH 8 > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_READ 0x6 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_WRITE 0x7 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_SELF_TEST 0xc /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_CSR_ACCESS 0xe /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_READ 0x46 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_WRITE 0x47 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SELF_TEST 0x4a /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_CSR_ACCESS 0x4c /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SET_MC_REPLAY_CNTXT 0x4d /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_LBN 16 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_LBN 16 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_LBN 48 > -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_LBN 16 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_WIDTH 240 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_LBN 16 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_STOP_RETURN_RESULT 0x0 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_READ 0x1 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE 0x2 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE_READ 0x3 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_PIPELINED_READ 0x4 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_LBN 48 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_LBN 64 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_LBN 80 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_LBN 16 > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_CUT_THROUGH 0x1 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD 0x2 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD_FIRST 0x3 /* enum */ > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_OFST 4 > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_LBN 64 > -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_IN_WDATA_OFST 12 > -#define MC_CMD_DPCPU_RPC_IN_WDATA_LEN 24 > -/* Register data to write. Only valid in write/write-read. */ > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_DATA_OFST 16 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_DATA_LEN 4 > -/* Register address. */ > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_ADDRESS_OFST 20 > -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_ADDRESS_LEN 4 > - > -/* MC_CMD_DPCPU_RPC_OUT msgresponse */ > -#define MC_CMD_DPCPU_RPC_OUT_LEN 36 > -#define MC_CMD_DPCPU_RPC_OUT_RC_OFST 0 > -#define MC_CMD_DPCPU_RPC_OUT_RC_LEN 4 > -/* DATA */ > -#define MC_CMD_DPCPU_RPC_OUT_DATA_OFST 4 > -#define MC_CMD_DPCPU_RPC_OUT_DATA_LEN 32 > -#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_OFST 4 > -#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_LBN 32 > -#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_OFST 4 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_LBN 48 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_WIDTH 16 > -#define MC_CMD_DPCPU_RPC_OUT_RDATA_OFST 12 > -#define MC_CMD_DPCPU_RPC_OUT_RDATA_LEN 24 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_1_OFST 12 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_1_LEN 4 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_2_OFST 16 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_2_LEN 4 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_3_OFST 20 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_3_LEN 4 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_4_OFST 24 > -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_4_LEN 4 > - > - > /***********************************/ > /* MC_CMD_TRIGGER_INTERRUPT > * Trigger an interrupt by prodding the BIU. > @@ -20172,66 +20207,6 @@ > #define MC_CMD_TRIGGER_INTERRUPT_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_SHMBOOT_OP > - * Special operations to support (for now) shmboot. > - */ > -#define MC_CMD_SHMBOOT_OP 0xe6 > -#undef MC_CMD_0xe6_PRIVILEGE_CTG > - > -#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SHMBOOT_OP_IN msgrequest */ > -#define MC_CMD_SHMBOOT_OP_IN_LEN 4 > -/* Identifies the operation to perform */ > -#define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_OFST 0 > -#define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_LEN 4 > -/* enum: Copy slave_data section to the slave core. (Greenport only) */ > -#define MC_CMD_SHMBOOT_OP_IN_PUSH_SLAVE_DATA 0x0 > - > -/* MC_CMD_SHMBOOT_OP_OUT msgresponse */ > -#define MC_CMD_SHMBOOT_OP_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_CAP_BLK_READ > - * Read multiple 64bit words from capture block memory > - */ > -#define MC_CMD_CAP_BLK_READ 0xe7 > -#undef MC_CMD_0xe7_PRIVILEGE_CTG > - > -#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_CAP_BLK_READ_IN msgrequest */ > -#define MC_CMD_CAP_BLK_READ_IN_LEN 12 > -#define MC_CMD_CAP_BLK_READ_IN_CAP_REG_OFST 0 > -#define MC_CMD_CAP_BLK_READ_IN_CAP_REG_LEN 4 > -#define MC_CMD_CAP_BLK_READ_IN_ADDR_OFST 4 > -#define MC_CMD_CAP_BLK_READ_IN_ADDR_LEN 4 > -#define MC_CMD_CAP_BLK_READ_IN_COUNT_OFST 8 > -#define MC_CMD_CAP_BLK_READ_IN_COUNT_LEN 4 > - > -/* MC_CMD_CAP_BLK_READ_OUT msgresponse */ > -#define MC_CMD_CAP_BLK_READ_OUT_LENMIN 8 > -#define MC_CMD_CAP_BLK_READ_OUT_LENMAX 248 > -#define MC_CMD_CAP_BLK_READ_OUT_LENMAX_MCDI2 1016 > -#define MC_CMD_CAP_BLK_READ_OUT_LEN(num) (0+8*(num)) > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_NUM(len) (((len)-0)/8) > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31 > -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127 > - > - > /***********************************/ > /* MC_CMD_DUMP_DO > * Take a dump of the DUT state > @@ -20379,34 +20354,6 @@ > #define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_SIZE_LEN 4 > > > -/***********************************/ > -/* MC_CMD_SET_PSU > - * Adjusts power supply parameters. This is a warranty-voiding operation. > - * Returns: ENOENT if the parameter or rail specified does not exist, EINVAL if > - * the parameter is out of range. > - */ > -#define MC_CMD_SET_PSU 0xea > -#undef MC_CMD_0xea_PRIVILEGE_CTG > - > -#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_SET_PSU_IN msgrequest */ > -#define MC_CMD_SET_PSU_IN_LEN 12 > -#define MC_CMD_SET_PSU_IN_PARAM_OFST 0 > -#define MC_CMD_SET_PSU_IN_PARAM_LEN 4 > -#define MC_CMD_SET_PSU_IN_PARAM_SUPPLY_VOLTAGE 0x0 /* enum */ > -#define MC_CMD_SET_PSU_IN_RAIL_OFST 4 > -#define MC_CMD_SET_PSU_IN_RAIL_LEN 4 > -#define MC_CMD_SET_PSU_IN_RAIL_0V9 0x0 /* enum */ > -#define MC_CMD_SET_PSU_IN_RAIL_1V2 0x1 /* enum */ > -/* desired value, eg voltage in mV */ > -#define MC_CMD_SET_PSU_IN_VALUE_OFST 8 > -#define MC_CMD_SET_PSU_IN_VALUE_LEN 4 > - > -/* MC_CMD_SET_PSU_OUT msgresponse */ > -#define MC_CMD_SET_PSU_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_GET_FUNCTION_INFO > * Get function information. PF and VF number. > @@ -20448,7 +20395,7 @@ > #define MC_CMD_ENABLE_OFFLINE_BIST 0xed > #undef MC_CMD_0xed_PRIVILEGE_CTG > > -#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN > +#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND > > /* MC_CMD_ENABLE_OFFLINE_BIST_IN msgrequest */ > #define MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN 0 > @@ -20457,130 +20404,6 @@ > #define MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_UART_SEND_DATA > - * Send checksummed[sic] block of data over the uart. Response is a placeholder > - * should we wish to make this reliable; currently requests are fire-and- > - * forget. > - */ > -#define MC_CMD_UART_SEND_DATA 0xee > -#undef MC_CMD_0xee_PRIVILEGE_CTG > - > -#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_UART_SEND_DATA_OUT msgrequest */ > -#define MC_CMD_UART_SEND_DATA_OUT_LENMIN 16 > -#define MC_CMD_UART_SEND_DATA_OUT_LENMAX 252 > -#define MC_CMD_UART_SEND_DATA_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_UART_SEND_DATA_OUT_LEN(num) (16+1*(num)) > -#define MC_CMD_UART_SEND_DATA_OUT_DATA_NUM(len) (((len)-16)/1) > -/* CRC32 over OFFSET, LENGTH, RESERVED, DATA */ > -#define MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_OFST 0 > -#define MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_LEN 4 > -/* Offset at which to write the data */ > -#define MC_CMD_UART_SEND_DATA_OUT_OFFSET_OFST 4 > -#define MC_CMD_UART_SEND_DATA_OUT_OFFSET_LEN 4 > -/* Length of data */ > -#define MC_CMD_UART_SEND_DATA_OUT_LENGTH_OFST 8 > -#define MC_CMD_UART_SEND_DATA_OUT_LENGTH_LEN 4 > -/* Reserved for future use */ > -#define MC_CMD_UART_SEND_DATA_OUT_RESERVED_OFST 12 > -#define MC_CMD_UART_SEND_DATA_OUT_RESERVED_LEN 4 > -#define MC_CMD_UART_SEND_DATA_OUT_DATA_OFST 16 > -#define MC_CMD_UART_SEND_DATA_OUT_DATA_LEN 1 > -#define MC_CMD_UART_SEND_DATA_OUT_DATA_MINNUM 0 > -#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM 236 > -#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM_MCDI2 1004 > - > -/* MC_CMD_UART_SEND_DATA_IN msgresponse */ > -#define MC_CMD_UART_SEND_DATA_IN_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_UART_RECV_DATA > - * Request checksummed[sic] block of data over the uart. Only a placeholder, > - * subject to change and not currently implemented. > - */ > -#define MC_CMD_UART_RECV_DATA 0xef > -#undef MC_CMD_0xef_PRIVILEGE_CTG > - > -#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_UART_RECV_DATA_OUT msgrequest */ > -#define MC_CMD_UART_RECV_DATA_OUT_LEN 16 > -/* CRC32 over OFFSET, LENGTH, RESERVED */ > -#define MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_OFST 0 > -#define MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_LEN 4 > -/* Offset from which to read the data */ > -#define MC_CMD_UART_RECV_DATA_OUT_OFFSET_OFST 4 > -#define MC_CMD_UART_RECV_DATA_OUT_OFFSET_LEN 4 > -/* Length of data */ > -#define MC_CMD_UART_RECV_DATA_OUT_LENGTH_OFST 8 > -#define MC_CMD_UART_RECV_DATA_OUT_LENGTH_LEN 4 > -/* Reserved for future use */ > -#define MC_CMD_UART_RECV_DATA_OUT_RESERVED_OFST 12 > -#define MC_CMD_UART_RECV_DATA_OUT_RESERVED_LEN 4 > - > -/* MC_CMD_UART_RECV_DATA_IN msgresponse */ > -#define MC_CMD_UART_RECV_DATA_IN_LENMIN 16 > -#define MC_CMD_UART_RECV_DATA_IN_LENMAX 252 > -#define MC_CMD_UART_RECV_DATA_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_UART_RECV_DATA_IN_LEN(num) (16+1*(num)) > -#define MC_CMD_UART_RECV_DATA_IN_DATA_NUM(len) (((len)-16)/1) > -/* CRC32 over RESERVED1, RESERVED2, RESERVED3, DATA */ > -#define MC_CMD_UART_RECV_DATA_IN_CHECKSUM_OFST 0 > -#define MC_CMD_UART_RECV_DATA_IN_CHECKSUM_LEN 4 > -/* Offset at which to write the data */ > -#define MC_CMD_UART_RECV_DATA_IN_RESERVED1_OFST 4 > -#define MC_CMD_UART_RECV_DATA_IN_RESERVED1_LEN 4 > -/* Length of data */ > -#define MC_CMD_UART_RECV_DATA_IN_RESERVED2_OFST 8 > -#define MC_CMD_UART_RECV_DATA_IN_RESERVED2_LEN 4 > -/* Reserved for future use */ > -#define MC_CMD_UART_RECV_DATA_IN_RESERVED3_OFST 12 > -#define MC_CMD_UART_RECV_DATA_IN_RESERVED3_LEN 4 > -#define MC_CMD_UART_RECV_DATA_IN_DATA_OFST 16 > -#define MC_CMD_UART_RECV_DATA_IN_DATA_LEN 1 > -#define MC_CMD_UART_RECV_DATA_IN_DATA_MINNUM 0 > -#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM 236 > -#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM_MCDI2 1004 > - > - > -/***********************************/ > -/* MC_CMD_READ_FUSES > - * Read data programmed into the device One-Time-Programmable (OTP) Fuses > - */ > -#define MC_CMD_READ_FUSES 0xf0 > -#undef MC_CMD_0xf0_PRIVILEGE_CTG > - > -#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_READ_FUSES_IN msgrequest */ > -#define MC_CMD_READ_FUSES_IN_LEN 8 > -/* Offset in OTP to read */ > -#define MC_CMD_READ_FUSES_IN_OFFSET_OFST 0 > -#define MC_CMD_READ_FUSES_IN_OFFSET_LEN 4 > -/* Length of data to read in bytes */ > -#define MC_CMD_READ_FUSES_IN_LENGTH_OFST 4 > -#define MC_CMD_READ_FUSES_IN_LENGTH_LEN 4 > - > -/* MC_CMD_READ_FUSES_OUT msgresponse */ > -#define MC_CMD_READ_FUSES_OUT_LENMIN 4 > -#define MC_CMD_READ_FUSES_OUT_LENMAX 252 > -#define MC_CMD_READ_FUSES_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num)) > -#define MC_CMD_READ_FUSES_OUT_DATA_NUM(len) (((len)-4)/1) > -/* Length of returned OTP data in bytes */ > -#define MC_CMD_READ_FUSES_OUT_LENGTH_OFST 0 > -#define MC_CMD_READ_FUSES_OUT_LENGTH_LEN 4 > -/* Returned data */ > -#define MC_CMD_READ_FUSES_OUT_DATA_OFST 4 > -#define MC_CMD_READ_FUSES_OUT_DATA_LEN 1 > -#define MC_CMD_READ_FUSES_OUT_DATA_MINNUM 0 > -#define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM 248 > -#define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM_MCDI2 1016 > - > - > /***********************************/ > /* MC_CMD_KR_TUNE > * Get or set KR Serdes RXEQ and TX Driver settings > @@ -20588,7 +20411,7 @@ > #define MC_CMD_KR_TUNE 0xf1 > #undef MC_CMD_0xf1_PRIVILEGE_CTG > > -#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN > +#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND > > /* MC_CMD_KR_TUNE_IN msgrequest */ > #define MC_CMD_KR_TUNE_IN_LENMIN 4 > @@ -21123,274 +20946,18 @@ > /* MC_CMD_KR_TUNE_LINK_TRAIN_CMD_IN/CM1 */ > /* C(+1) status */ > #define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_STATUS_OFST 8 > -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_STATUS_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_KR_TUNE_LINK_TRAIN_CMD_IN/CM1 */ > -/* C(-1) value */ > -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_OFST 12 > -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_LEN 4 > -/* C(0) value */ > -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_OFST 16 > -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_LEN 4 > -/* C(+1) status */ > -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_OFST 20 > -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_PCIE_TUNE > - * Get or set PCIE Serdes RXEQ and TX Driver settings > - */ > -#define MC_CMD_PCIE_TUNE 0xf2 > -#undef MC_CMD_0xf2_PRIVILEGE_CTG > - > -#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_PCIE_TUNE_IN msgrequest */ > -#define MC_CMD_PCIE_TUNE_IN_LENMIN 4 > -#define MC_CMD_PCIE_TUNE_IN_LENMAX 252 > -#define MC_CMD_PCIE_TUNE_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_PCIE_TUNE_IN_LEN(num) (4+4*(num)) > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_NUM(len) (((len)-4)/4) > -/* Requested operation */ > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_OFST 0 > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_LEN 1 > -/* enum: Get current RXEQ settings */ > -#define MC_CMD_PCIE_TUNE_IN_RXEQ_GET 0x0 > -/* enum: Override RXEQ settings */ > -#define MC_CMD_PCIE_TUNE_IN_RXEQ_SET 0x1 > -/* enum: Get current TX Driver settings */ > -#define MC_CMD_PCIE_TUNE_IN_TXEQ_GET 0x2 > -/* enum: Override TX Driver settings */ > -#define MC_CMD_PCIE_TUNE_IN_TXEQ_SET 0x3 > -/* enum: Start PCIe Serdes Eye diagram plot on a given lane. */ > -#define MC_CMD_PCIE_TUNE_IN_START_EYE_PLOT 0x5 > -/* enum: Poll PCIe Serdes Eye diagram plot. Returns one row of BER data. The > - * caller should call this command repeatedly after starting eye plot, until no > - * more data is returned. > - */ > -#define MC_CMD_PCIE_TUNE_IN_POLL_EYE_PLOT 0x6 > -/* enum: Enable the SERDES BIST and set it to generate a 200MHz square wave */ > -#define MC_CMD_PCIE_TUNE_IN_BIST_SQUARE_WAVE 0x7 > -/* Align the arguments to 32 bits */ > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_OFST 1 > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_LEN 3 > -/* Arguments specific to the operation */ > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_OFST 4 > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_LEN 4 > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MINNUM 0 > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM 62 > -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM_MCDI2 254 > - > -/* MC_CMD_PCIE_TUNE_OUT msgresponse */ > -#define MC_CMD_PCIE_TUNE_OUT_LEN 0 > - > -/* MC_CMD_PCIE_TUNE_RXEQ_GET_IN msgrequest */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_LEN 4 > -/* Requested operation */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_LEN 1 > -/* Align the arguments to 32 bits */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3 > - > -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT msgresponse */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMIN 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX 252 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4) > -/* RXEQ Parameter */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LEN 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MINNUM 1 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM 63 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_LBN 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_WIDTH 8 > -/* enum: Attenuation (0-15) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_ATT 0x0 > -/* enum: CTLE Boost (0-15) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_BOOST 0x1 > -/* enum: DFE Tap1 (0 - max negative, 64 - zero, 127 - max positive) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP1 0x2 > -/* enum: DFE Tap2 (0 - max negative, 32 - zero, 63 - max positive) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP2 0x3 > -/* enum: DFE Tap3 (0 - max negative, 32 - zero, 63 - max positive) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP3 0x4 > -/* enum: DFE Tap4 (0 - max negative, 32 - zero, 63 - max positive) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP4 0x5 > -/* enum: DFE Tap5 (0 - max negative, 32 - zero, 63 - max positive) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP5 0x6 > -/* enum: DFE DLev */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_DLEV 0x7 > -/* enum: Figure of Merit */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_FOM 0x8 > -/* enum: CTLE EQ Capacitor (HF Gain) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_CTLE_EQC 0x9 > -/* enum: CTLE EQ Resistor (DC Gain) */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_CTLE_EQRES 0xa > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_LBN 8 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_WIDTH 5 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_0 0x0 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_1 0x1 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_2 0x2 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_3 0x3 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_4 0x4 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_5 0x5 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_6 0x6 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_7 0x7 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_8 0x8 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_9 0x9 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_10 0xa /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_11 0xb /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_12 0xc /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_13 0xd /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_14 0xe /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_15 0xf /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_ALL 0x10 /* enum */ > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_LBN 13 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_WIDTH 1 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_LBN 14 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_WIDTH 10 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_LBN 24 > -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8 > - > -/* MC_CMD_PCIE_TUNE_RXEQ_SET_IN msgrequest */ > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMIN 8 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX 252 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num)) > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_NUM(len) (((len)-4)/4) > -/* Requested operation */ > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_OFST 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_LEN 1 > -/* Align the arguments to 32 bits */ > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_RSVD_OFST 1 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_RSVD_LEN 3 > -/* RXEQ Parameter */ > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_OFST 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LEN 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MINNUM 1 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM 62 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM_MCDI2 254 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_OFST 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_LBN 0 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_WIDTH 8 > -/* Enum values, see field(s): */ > -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_ID */ > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_OFST 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_LBN 8 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_WIDTH 5 > -/* Enum values, see field(s): */ > -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_LANE */ > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_OFST 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_LBN 13 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_WIDTH 1 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_OFST 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_LBN 14 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_WIDTH 2 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_OFST 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_LBN 16 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_WIDTH 8 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_OFST 4 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_LBN 24 > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_WIDTH 8 > - > -/* MC_CMD_PCIE_TUNE_RXEQ_SET_OUT msgresponse */ > -#define MC_CMD_PCIE_TUNE_RXEQ_SET_OUT_LEN 0 > - > -/* MC_CMD_PCIE_TUNE_TXEQ_GET_IN msgrequest */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_LEN 4 > -/* Requested operation */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_OFST 0 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_LEN 1 > -/* Align the arguments to 32 bits */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3 > - > -/* MC_CMD_PCIE_TUNE_TXEQ_GET_OUT msgresponse */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMIN 4 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX 252 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4) > -/* RXEQ Parameter */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_OFST 0 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LEN 4 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_OFST 0 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8 > -/* enum: TxMargin (PIPE) */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXMARGIN 0x0 > -/* enum: TxSwing (PIPE) */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXSWING 0x1 > -/* enum: De-emphasis coefficient C(-1) (PIPE) */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CM1 0x2 > -/* enum: De-emphasis coefficient C(0) (PIPE) */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_C0 0x3 > -/* enum: De-emphasis coefficient C(+1) (PIPE) */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CP1 0x4 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_OFST 0 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_LBN 8 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_WIDTH 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_LANE */ > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_OFST 0 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_LBN 12 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_WIDTH 12 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_OFST 0 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_LBN 24 > -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8 > - > -/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN msgrequest */ > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LEN 8 > -/* Requested operation */ > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0 > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1 > -/* Align the arguments to 32 bits */ > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1 > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3 > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_OFST 4 > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_LEN 4 > - > -/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT msgresponse */ > -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT_LEN 0 > - > -/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN msgrequest */ > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_LEN 4 > -/* Requested operation */ > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1 > -/* Align the arguments to 32 bits */ > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3 > - > -/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT msgresponse */ > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num)) > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_NUM(len) (((len)-0)/2) > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126 > -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM_MCDI2 510 > - > -/* MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN msgrequest */ > -#define MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN_LEN 0 > - > -/* MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_OUT msgrequest */ > -#define MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_OUT_LEN 0 > +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_STATUS_LEN 4 > +/* Enum values, see field(s): */ > +/* MC_CMD_KR_TUNE_LINK_TRAIN_CMD_IN/CM1 */ > +/* C(-1) value */ > +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_OFST 12 > +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_LEN 4 > +/* C(0) value */ > +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_OFST 16 > +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_LEN 4 > +/* C(+1) status */ > +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_OFST 20 > +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_LEN 4 > > > /***********************************/ > @@ -21531,56 +21098,6 @@ > #define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24 > > > -/***********************************/ > -/* MC_CMD_LICENSING_GET_ID_V3 > - * Get ID and type from the NVRAM_PARTITION_TYPE_LICENSE application license > - * partition - V3 licensing (Medford) > - */ > -#define MC_CMD_LICENSING_GET_ID_V3 0xd1 > -#undef MC_CMD_0xd1_PRIVILEGE_CTG > - > -#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_LICENSING_GET_ID_V3_IN msgrequest */ > -#define MC_CMD_LICENSING_GET_ID_V3_IN_LEN 0 > - > -/* MC_CMD_LICENSING_GET_ID_V3_OUT msgresponse */ > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN 8 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX 252 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LEN(num) (8+1*(num)) > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_NUM(len) (((len)-8)/1) > -/* type of license (eg 3) */ > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_OFST 0 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_LEN 4 > -/* length of the license ID (in bytes) */ > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_OFST 4 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_LEN 4 > -/* the unique license ID of the adapter */ > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_OFST 8 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LEN 1 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MINNUM 0 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM 244 > -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM_MCDI2 1012 > - > - > -/***********************************/ > -/* MC_CMD_MC2MC_PROXY > - * Execute an arbitrary MCDI command on the slave MC of a dual-core device. > - * This will fail on a single-core system. > - */ > -#define MC_CMD_MC2MC_PROXY 0xf4 > -#undef MC_CMD_0xf4_PRIVILEGE_CTG > - > -#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_MC2MC_PROXY_IN msgrequest */ > -#define MC_CMD_MC2MC_PROXY_IN_LEN 0 > - > -/* MC_CMD_MC2MC_PROXY_OUT msgresponse */ > -#define MC_CMD_MC2MC_PROXY_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_GET_LICENSED_APP_STATE > * Query the state of an individual licensed application. (Note that the actual > @@ -21609,424 +21126,6 @@ > #define MC_CMD_GET_LICENSED_APP_STATE_OUT_LICENSED 0x1 > > > -/***********************************/ > -/* MC_CMD_GET_LICENSED_V3_APP_STATE > - * Query the state of an individual licensed application. (Note that the actual > - * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE > - * operation or a reboot of the MC.) Used for V3 licensing (Medford) > - */ > -#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2 > -#undef MC_CMD_0xd2_PRIVILEGE_CTG > - > -#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_LICENSED_V3_APP_STATE_IN msgrequest */ > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_LEN 8 > -/* application ID to query (LICENSED_V3_APPS_xxx) expressed as a single bit > - * mask > - */ > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32 > - > -/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */ > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4 > -/* state of this application */ > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_OFST 0 > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_LEN 4 > -/* enum: no (or invalid) license is present for the application */ > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_NOT_LICENSED 0x0 > -/* enum: a valid license is present for the application */ > -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LICENSED 0x1 > - > - > -/***********************************/ > -/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES > - * Query the state of an one or more licensed features. (Note that the actual > - * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE > - * operation or a reboot of the MC.) Used for V3 licensing (Medford) > - */ > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3 > -#undef MC_CMD_0xd3_PRIVILEGE_CTG > - > -#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN msgrequest */ > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_LEN 8 > -/* features to query (LICENSED_V3_FEATURES_xxx) expressed as a mask with one or > - * more bits set > - */ > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32 > - > -/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */ > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8 > -/* states of these features - bit set for licensed, clear for not licensed */ > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32 > -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_LICENSED_APP_OP > - * Perform an action for an individual licensed application - not used for V3 > - * licensing. > - */ > -#define MC_CMD_LICENSED_APP_OP 0xf6 > -#undef MC_CMD_0xf6_PRIVILEGE_CTG > - > -#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_LICENSED_APP_OP_IN msgrequest */ > -#define MC_CMD_LICENSED_APP_OP_IN_LENMIN 8 > -#define MC_CMD_LICENSED_APP_OP_IN_LENMAX 252 > -#define MC_CMD_LICENSED_APP_OP_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num)) > -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_NUM(len) (((len)-8)/4) > -/* application ID */ > -#define MC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST 0 > -#define MC_CMD_LICENSED_APP_OP_IN_APP_ID_LEN 4 > -/* the type of operation requested */ > -#define MC_CMD_LICENSED_APP_OP_IN_OP_OFST 4 > -#define MC_CMD_LICENSED_APP_OP_IN_OP_LEN 4 > -/* enum: validate application */ > -#define MC_CMD_LICENSED_APP_OP_IN_OP_VALIDATE 0x0 > -/* enum: mask application */ > -#define MC_CMD_LICENSED_APP_OP_IN_OP_MASK 0x1 > -/* arguments specific to this particular operation */ > -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_OFST 8 > -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4 > -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MINNUM 0 > -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM 61 > -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM_MCDI2 253 > - > -/* MC_CMD_LICENSED_APP_OP_OUT msgresponse */ > -#define MC_CMD_LICENSED_APP_OP_OUT_LENMIN 0 > -#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX 252 > -#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_NUM(len) (((len)-0)/4) > -/* result specific to this particular operation */ > -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST 0 > -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4 > -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MINNUM 0 > -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM 63 > -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM_MCDI2 255 > - > -/* MC_CMD_LICENSED_APP_OP_VALIDATE_IN msgrequest */ > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_LEN 72 > -/* application ID */ > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_OFST 0 > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_LEN 4 > -/* the type of operation requested */ > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST 4 > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_LEN 4 > -/* validation challenge */ > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_OFST 8 > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_LEN 64 > - > -/* MC_CMD_LICENSED_APP_OP_VALIDATE_OUT msgresponse */ > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_LEN 68 > -/* feature expiry (time_t) */ > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_OFST 0 > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_LEN 4 > -/* validation response */ > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST 4 > -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_LEN 64 > - > -/* MC_CMD_LICENSED_APP_OP_MASK_IN msgrequest */ > -#define MC_CMD_LICENSED_APP_OP_MASK_IN_LEN 12 > -/* application ID */ > -#define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_OFST 0 > -#define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_LEN 4 > -/* the type of operation requested */ > -#define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_OFST 4 > -#define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_LEN 4 > -/* flag */ > -#define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_OFST 8 > -#define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_LEN 4 > - > -/* MC_CMD_LICENSED_APP_OP_MASK_OUT msgresponse */ > -#define MC_CMD_LICENSED_APP_OP_MASK_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_LICENSED_V3_VALIDATE_APP > - * Perform validation for an individual licensed application - V3 licensing > - * (Medford) > - */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4 > -#undef MC_CMD_0xd4_PRIVILEGE_CTG > - > -#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_LICENSED_V3_VALIDATE_APP_IN msgrequest */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_LEN 56 > -/* challenge for validation (384 bits) */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_OFST 0 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_LEN 48 > -/* application ID expressed as a single bit mask */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32 > - > -/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116 > -/* validation response to challenge in the form of ECDSA signature consisting > - * of two 384-bit integers, r and s, in big-endian order. The signature signs a > - * SHA-384 digest of a message constructed from the concatenation of the input > - * message and the remaining fields of this output message, e.g. challenge[48 > - * bytes] ... expiry_time[4 bytes] ... > - */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_OFST 0 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_LEN 96 > -/* application expiry time */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_OFST 96 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_LEN 4 > -/* application expiry units */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_OFST 100 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_LEN 4 > -/* enum: expiry units are accounting units */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_ACC 0x0 > -/* enum: expiry units are calendar days */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_DAYS 0x1 > -/* base MAC address of the NIC stored in NVRAM (note that this is a constant > - * value for a given NIC regardless which function is calling, effectively this > - * is PF0 base MAC address) > - */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_OFST 104 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_LEN 6 > -/* MAC address of v-adaptor associated with the client. If no such v-adapator > - * exists, then the field is filled with 0xFF. > - */ > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_OFST 110 > -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_LEN 6 > - > - > -/***********************************/ > -/* MC_CMD_LICENSED_V3_MASK_FEATURES > - * Mask features - V3 licensing (Medford) > - */ > -#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5 > -#undef MC_CMD_0xd5_PRIVILEGE_CTG > - > -#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_LICENSED_V3_MASK_FEATURES_IN msgrequest */ > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_LEN 12 > -/* mask to be applied to features to be changed */ > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32 > -/* whether to turn on or turn off the masked features */ > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8 > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4 > -/* enum: turn the features off */ > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_OFF 0x0 > -/* enum: turn the features back on */ > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_ON 0x1 > - > -/* MC_CMD_LICENSED_V3_MASK_FEATURES_OUT msgresponse */ > -#define MC_CMD_LICENSED_V3_MASK_FEATURES_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_LICENSING_V3_TEMPORARY > - * Perform operations to support installation of a single temporary license in > - * the adapter, in addition to those found in the licensing partition. See > - * SF-116124-SW for an overview of how this could be used. The license is > - * stored in MC persistent data and so will survive a MC reboot, but will be > - * erased when the adapter is power cycled > - */ > -#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6 > -#undef MC_CMD_0xd6_PRIVILEGE_CTG > - > -#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_LICENSING_V3_TEMPORARY_IN msgrequest */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_LEN 4 > -/* operation code */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_OFST 0 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_LEN 4 > -/* enum: install a new license, overwriting any existing temporary license. > - * This is an asynchronous operation owing to the time taken to validate an > - * ECDSA license > - */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_SET 0x0 > -/* enum: clear the license immediately rather than waiting for the next power > - * cycle > - */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_CLEAR 0x1 > -/* enum: get the status of the asynchronous MC_CMD_LICENSING_V3_TEMPORARY_SET > - * operation > - */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS 0x2 > - > -/* MC_CMD_LICENSING_V3_TEMPORARY_IN_SET msgrequest */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LEN 164 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_OFST 0 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_LEN 4 > -/* ECDSA license and signature */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_OFST 4 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_LEN 160 > - > -/* MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR msgrequest */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_LEN 4 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_OFST 0 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_LEN 4 > - > -/* MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS msgrequest */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_LEN 4 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_OFST 0 > -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_LEN 4 > - > -/* MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS msgresponse */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LEN 12 > -/* status code */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_OFST 0 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_LEN 4 > -/* enum: finished validating and installing license */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_OK 0x0 > -/* enum: license validation and installation in progress */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_IN_PROGRESS 0x1 > -/* enum: licensing error. More specific error messages are not provided to > - * avoid exposing details of the licensing system to the client > - */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_ERROR 0x2 > -/* bitmask of licensed features */ > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64 > -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_SET_PORT_SNIFF_CONFIG > - * Configure RX port sniffing for the physical port associated with the calling > - * function. Only a privileged function may change the port sniffing > - * configuration. A copy of all traffic delivered to the host (non-promiscuous > - * mode) or all traffic arriving at the port (promiscuous mode) may be > - * delivered to a specific queue, or a set of queues with RSS. > - */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7 > -#undef MC_CMD_0xf7_PRIVILEGE_CTG > - > -#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SET_PORT_SNIFF_CONFIG_IN msgrequest */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_LEN 16 > -/* configuration flags */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_LEN 4 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_OFST 0 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_OFST 0 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_LBN 1 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_WIDTH 1 > -/* receive queue handle (for RSS mode, this is the base queue) */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_LEN 4 > -/* receive mode */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_LEN 4 > -/* enum: receive to just the specified queue */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0 > -/* enum: receive to multiple queues using RSS context */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1 > -/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note > - * that these handles should be considered opaque to the host, although a value > - * of 0xFFFFFFFF is guaranteed never to be a valid handle. > - */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12 > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_LEN 4 > - > -/* MC_CMD_SET_PORT_SNIFF_CONFIG_OUT msgresponse */ > -#define MC_CMD_SET_PORT_SNIFF_CONFIG_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_GET_PORT_SNIFF_CONFIG > - * Obtain the current RX port sniffing configuration for the physical port > - * associated with the calling function. Only a privileged function may read > - * the configuration. > - */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8 > -#undef MC_CMD_0xf8_PRIVILEGE_CTG > - > -#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_PORT_SNIFF_CONFIG_IN msgrequest */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_IN_LEN 0 > - > -/* MC_CMD_GET_PORT_SNIFF_CONFIG_OUT msgresponse */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_LEN 16 > -/* configuration flags */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_LEN 4 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_OFST 0 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_OFST 0 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_LBN 1 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_WIDTH 1 > -/* receiving queue handle (for RSS mode, this is the base queue) */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_LEN 4 > -/* receive mode */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_LEN 4 > -/* enum: receiving to just the specified queue */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0 > -/* enum: receiving to multiple queues using RSS context */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1 > -/* RSS context (for RX_MODE_RSS) */ > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12 > -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_LEN 4 > - > - > /***********************************/ > /* MC_CMD_SET_PARSER_DISP_CONFIG > * Change configuration related to the parser-dispatcher subsystem. > @@ -22072,305 +21171,6 @@ > #define MC_CMD_SET_PARSER_DISP_CONFIG_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_GET_PARSER_DISP_CONFIG > - * Read configuration related to the parser-dispatcher subsystem. > - */ > -#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa > -#undef MC_CMD_0xfa_PRIVILEGE_CTG > - > -#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_PARSER_DISP_CONFIG_IN msgrequest */ > -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_LEN 8 > -/* the type of configuration setting to read */ > -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_OFST 0 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_SET_PARSER_DISP_CONFIG/MC_CMD_SET_PARSER_DISP_CONFIG_IN/TYPE */ > -/* handle for the entity to query: queue handle, EVB port ID, etc. depending on > - * the type of configuration setting being read > - */ > -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_LEN 4 > - > -/* MC_CMD_GET_PARSER_DISP_CONFIG_OUT msgresponse */ > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN 4 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX 252 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_NUM(len) (((len)-0)/4) > -/* current value: the details depend on the type of configuration setting being > - * read > - */ > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_OFST 0 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN 4 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MINNUM 1 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM 63 > -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM_MCDI2 255 > - > - > -/***********************************/ > -/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG > - * Configure TX port sniffing for the physical port associated with the calling > - * function. Only a privileged function may change the port sniffing > - * configuration. A copy of all traffic transmitted through the port may be > - * delivered to a specific queue, or a set of queues with RSS. Note that these > - * packets are delivered with transmit timestamps in the packet prefix, not > - * receive timestamps, so it is likely that the queue(s) will need to be > - * dedicated as TX sniff receivers. > - */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb > -#undef MC_CMD_0xfb_PRIVILEGE_CTG > - > -#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN msgrequest */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_LEN 16 > -/* configuration flags */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0 > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_FLAGS_LEN 4 > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_OFST 0 > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0 > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1 > -/* receive queue handle (for RSS mode, this is the base queue) */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4 > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_QUEUE_LEN 4 > -/* receive mode */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8 > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_LEN 4 > -/* enum: receive to just the specified queue */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0 > -/* enum: receive to multiple queues using RSS context */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1 > -/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note > - * that these handles should be considered opaque to the host, although a value > - * of 0xFFFFFFFF is guaranteed never to be a valid handle. > - */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12 > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_LEN 4 > - > -/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */ > -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG > - * Obtain the current TX port sniffing configuration for the physical port > - * associated with the calling function. Only a privileged function may read > - * the configuration. > - */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc > -#undef MC_CMD_0xfc_PRIVILEGE_CTG > - > -#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN msgrequest */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN_LEN 0 > - > -/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_LEN 16 > -/* configuration flags */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0 > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_FLAGS_LEN 4 > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_OFST 0 > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0 > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1 > -/* receiving queue handle (for RSS mode, this is the base queue) */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4 > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_LEN 4 > -/* receive mode */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8 > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_LEN 4 > -/* enum: receiving to just the specified queue */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0 > -/* enum: receiving to multiple queues using RSS context */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1 > -/* RSS context (for RX_MODE_RSS) */ > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12 > -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_RMON_STATS_RX_ERRORS > - * Per queue rx error stats. > - */ > -#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe > -#undef MC_CMD_0xfe_PRIVILEGE_CTG > - > -#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_RMON_STATS_RX_ERRORS_IN msgrequest */ > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_LEN 8 > -/* The rx queue to get stats for. */ > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RX_QUEUE_OFST 0 > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RX_QUEUE_LEN 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_FLAGS_OFST 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_FLAGS_LEN 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_OFST 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_LBN 0 > -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_WIDTH 1 > - > -/* MC_CMD_RMON_STATS_RX_ERRORS_OUT msgresponse */ > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_LEN 16 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_CRC_ERRORS_OFST 0 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_CRC_ERRORS_LEN 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_TRUNC_ERRORS_OFST 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_TRUNC_ERRORS_LEN 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_NO_DESC_DROPS_OFST 8 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_NO_DESC_DROPS_LEN 4 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_ABORT_OFST 12 > -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_ABORT_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_GET_PCIE_RESOURCE_INFO > - * Find out about available PCIE resources > - */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd > -#undef MC_CMD_0xfd_PRIVILEGE_CTG > - > -#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_PCIE_RESOURCE_INFO_IN msgrequest */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_IN_LEN 0 > - > -/* MC_CMD_GET_PCIE_RESOURCE_INFO_OUT msgresponse */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_LEN 28 > -/* The maximum number of PFs the device can expose */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PFS_OFST 0 > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PFS_LEN 4 > -/* The maximum number of VFs the device can expose in total */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VFS_OFST 4 > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VFS_LEN 4 > -/* The maximum number of MSI-X vectors the device can provide in total */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VECTORS_OFST 8 > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VECTORS_LEN 4 > -/* the number of MSI-X vectors the device will allocate by default to each PF > - */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_PF_VECTORS_OFST 12 > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_PF_VECTORS_LEN 4 > -/* the number of MSI-X vectors the device will allocate by default to each VF > - */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_VF_VECTORS_OFST 16 > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_VF_VECTORS_LEN 4 > -/* the maximum number of MSI-X vectors the device can allocate to any one PF */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PF_VECTORS_OFST 20 > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PF_VECTORS_LEN 4 > -/* the maximum number of MSI-X vectors the device can allocate to any one VF */ > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VF_VECTORS_OFST 24 > -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VF_VECTORS_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_GET_PORT_MODES > - * Find out about available port modes > - */ > -#define MC_CMD_GET_PORT_MODES 0xff > -#undef MC_CMD_0xff_PRIVILEGE_CTG > - > -#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_PORT_MODES_IN msgrequest */ > -#define MC_CMD_GET_PORT_MODES_IN_LEN 0 > - > -/* MC_CMD_GET_PORT_MODES_OUT msgresponse */ > -#define MC_CMD_GET_PORT_MODES_OUT_LEN 12 > -/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) > - * that are supported for customer use in production firmware. > - */ > -#define MC_CMD_GET_PORT_MODES_OUT_MODES_OFST 0 > -#define MC_CMD_GET_PORT_MODES_OUT_MODES_LEN 4 > -/* Default (canonical) board mode */ > -#define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_OFST 4 > -#define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_LEN 4 > -/* Current board mode */ > -#define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_OFST 8 > -#define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_LEN 4 > - > -/* MC_CMD_GET_PORT_MODES_OUT_V2 msgresponse */ > -#define MC_CMD_GET_PORT_MODES_OUT_V2_LEN 16 > -/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) > - * that are supported for customer use in production firmware. > - */ > -#define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_OFST 0 > -#define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_LEN 4 > -/* Default (canonical) board mode */ > -#define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_OFST 4 > -#define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_LEN 4 > -/* Current board mode */ > -#define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_OFST 8 > -#define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_LEN 4 > -/* Bitmask of engineering port modes available on the board (indexed by > - * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that > - * contains all modes implemented in firmware for a particular board. Modes > - * listed in MODES are considered production modes and should be exposed in > - * userland tools. Modes listed in ENGINEERING_MODES, but not in MODES > - * should be considered hidden (not to be exposed in userland tools) and for > - * engineering use only. There are no other semantic differences and any mode > - * listed in either MODES or ENGINEERING_MODES can be set on the board. > - */ > -#define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_OFST 12 > -#define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_OVERRIDE_PORT_MODE > - * Override flash config port mode for subsequent MC reboot(s). Override data > - * is stored in the presistent data section of DMEM and activated on next MC > - * warm reboot. A cold reboot resets the override. It is assumed that a > - * sufficient number of PFs are available and that port mapping is valid for > - * the new port mode, as the override does not affect PF configuration. > - */ > -#define MC_CMD_OVERRIDE_PORT_MODE 0x137 > -#undef MC_CMD_0x137_PRIVILEGE_CTG > - > -#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_OVERRIDE_PORT_MODE_IN msgrequest */ > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_LEN 8 > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_OFST 0 > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_LEN 4 > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_OFST 0 > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_LBN 0 > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_WIDTH 1 > -/* New mode (TLV_PORT_MODE_*) to set, if override enabled */ > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_OFST 4 > -#define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_LEN 4 > - > -/* MC_CMD_OVERRIDE_PORT_MODE_OUT msgresponse */ > -#define MC_CMD_OVERRIDE_PORT_MODE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_READ_ATB > - * Sample voltages on the ATB > - */ > -#define MC_CMD_READ_ATB 0x100 > -#undef MC_CMD_0x100_PRIVILEGE_CTG > - > -#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_READ_ATB_IN msgrequest */ > -#define MC_CMD_READ_ATB_IN_LEN 16 > -#define MC_CMD_READ_ATB_IN_SIGNAL_BUS_OFST 0 > -#define MC_CMD_READ_ATB_IN_SIGNAL_BUS_LEN 4 > -#define MC_CMD_READ_ATB_IN_BUS_CCOM 0x0 /* enum */ > -#define MC_CMD_READ_ATB_IN_BUS_CKR 0x1 /* enum */ > -#define MC_CMD_READ_ATB_IN_BUS_CPCIE 0x8 /* enum */ > -#define MC_CMD_READ_ATB_IN_SIGNAL_EN_BITNO_OFST 4 > -#define MC_CMD_READ_ATB_IN_SIGNAL_EN_BITNO_LEN 4 > -#define MC_CMD_READ_ATB_IN_SIGNAL_SEL_OFST 8 > -#define MC_CMD_READ_ATB_IN_SIGNAL_SEL_LEN 4 > -#define MC_CMD_READ_ATB_IN_SETTLING_TIME_US_OFST 12 > -#define MC_CMD_READ_ATB_IN_SETTLING_TIME_US_LEN 4 > - > -/* MC_CMD_READ_ATB_OUT msgresponse */ > -#define MC_CMD_READ_ATB_OUT_LEN 4 > -#define MC_CMD_READ_ATB_OUT_SAMPLE_MV_OFST 0 > -#define MC_CMD_READ_ATB_OUT_SAMPLE_MV_LEN 4 > - > - > /***********************************/ > /* MC_CMD_GET_WORKAROUNDS > * Read the list of all implemented and all currently enabled workarounds. The > @@ -22538,447 +21338,6 @@ > #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_OFST 0 > #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_LEN 4 > > - > -/***********************************/ > -/* MC_CMD_GET_SNAPSHOT_LENGTH > - * Obtain the current range of allowable values for the SNAPSHOT_LENGTH > - * parameter to MC_CMD_INIT_RXQ. > - */ > -#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101 > -#undef MC_CMD_0x101_PRIVILEGE_CTG > - > -#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_SNAPSHOT_LENGTH_IN msgrequest */ > -#define MC_CMD_GET_SNAPSHOT_LENGTH_IN_LEN 0 > - > -/* MC_CMD_GET_SNAPSHOT_LENGTH_OUT msgresponse */ > -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_LEN 8 > -/* Minimum acceptable snapshot length. */ > -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MIN_OFST 0 > -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MIN_LEN 4 > -/* Maximum acceptable snapshot length. */ > -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MAX_OFST 4 > -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MAX_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_FUSE_DIAGS > - * Additional fuse diagnostics > - */ > -#define MC_CMD_FUSE_DIAGS 0x102 > -#undef MC_CMD_0x102_PRIVILEGE_CTG > - > -#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_FUSE_DIAGS_IN msgrequest */ > -#define MC_CMD_FUSE_DIAGS_IN_LEN 0 > - > -/* MC_CMD_FUSE_DIAGS_OUT msgresponse */ > -#define MC_CMD_FUSE_DIAGS_OUT_LEN 48 > -/* Total number of mismatched bits between pairs in area 0 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_OFST 0 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_LEN 4 > -/* Total number of unexpectedly clear (set in B but not A) bits in area 0 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_OFST 4 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_LEN 4 > -/* Total number of unexpectedly clear (set in A but not B) bits in area 0 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_OFST 8 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_LEN 4 > -/* Checksum of data after logical OR of pairs in area 0 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_OFST 12 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_LEN 4 > -/* Total number of mismatched bits between pairs in area 1 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_OFST 16 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_LEN 4 > -/* Total number of unexpectedly clear (set in B but not A) bits in area 1 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_OFST 20 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_LEN 4 > -/* Total number of unexpectedly clear (set in A but not B) bits in area 1 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_OFST 24 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_LEN 4 > -/* Checksum of data after logical OR of pairs in area 1 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_OFST 28 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_LEN 4 > -/* Total number of mismatched bits between pairs in area 2 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_OFST 32 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_LEN 4 > -/* Total number of unexpectedly clear (set in B but not A) bits in area 2 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_OFST 36 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_LEN 4 > -/* Total number of unexpectedly clear (set in A but not B) bits in area 2 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_OFST 40 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_LEN 4 > -/* Checksum of data after logical OR of pairs in area 2 */ > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_OFST 44 > -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_PRIVILEGE_MODIFY > - * Modify the privileges of a set of PCIe functions. Note that this operation > - * only effects non-admin functions unless the admin privilege itself is > - * included in one of the masks provided. > - */ > -#define MC_CMD_PRIVILEGE_MODIFY 0x60 > -#undef MC_CMD_0x60_PRIVILEGE_CTG > - > -#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_PRIVILEGE_MODIFY_IN msgrequest */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_LEN 16 > -/* The groups of functions to have their privilege masks modified. */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_OFST 0 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_LEN 4 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_NONE 0x0 /* enum */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_ALL 0x1 /* enum */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_PFS_ONLY 0x2 /* enum */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_ONLY 0x3 /* enum */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_OF_PF 0x4 /* enum */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_ONE 0x5 /* enum */ > -/* For VFS_OF_PF specify the PF, for ONE specify the target function */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_OFST 4 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_LEN 4 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_OFST 4 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_LBN 0 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_WIDTH 16 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_OFST 4 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_LBN 16 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_WIDTH 16 > -/* Privileges to be added to the target functions. For privilege definitions > - * refer to the command MC_CMD_PRIVILEGE_MASK > - */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_OFST 8 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_LEN 4 > -/* Privileges to be removed from the target functions. For privilege > - * definitions refer to the command MC_CMD_PRIVILEGE_MASK > - */ > -#define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_OFST 12 > -#define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_LEN 4 > - > -/* MC_CMD_PRIVILEGE_MODIFY_OUT msgresponse */ > -#define MC_CMD_PRIVILEGE_MODIFY_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_XPM_READ_BYTES > - * Read XPM memory > - */ > -#define MC_CMD_XPM_READ_BYTES 0x103 > -#undef MC_CMD_0x103_PRIVILEGE_CTG > - > -#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_XPM_READ_BYTES_IN msgrequest */ > -#define MC_CMD_XPM_READ_BYTES_IN_LEN 8 > -/* Start address (byte) */ > -#define MC_CMD_XPM_READ_BYTES_IN_ADDR_OFST 0 > -#define MC_CMD_XPM_READ_BYTES_IN_ADDR_LEN 4 > -/* Count (bytes) */ > -#define MC_CMD_XPM_READ_BYTES_IN_COUNT_OFST 4 > -#define MC_CMD_XPM_READ_BYTES_IN_COUNT_LEN 4 > - > -/* MC_CMD_XPM_READ_BYTES_OUT msgresponse */ > -#define MC_CMD_XPM_READ_BYTES_OUT_LENMIN 0 > -#define MC_CMD_XPM_READ_BYTES_OUT_LENMAX 252 > -#define MC_CMD_XPM_READ_BYTES_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_XPM_READ_BYTES_OUT_LEN(num) (0+1*(num)) > -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_NUM(len) (((len)-0)/1) > -/* Data */ > -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_OFST 0 > -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_LEN 1 > -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MINNUM 0 > -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM 252 > -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM_MCDI2 1020 > - > - > -/***********************************/ > -/* MC_CMD_XPM_WRITE_BYTES > - * Write XPM memory > - */ > -#define MC_CMD_XPM_WRITE_BYTES 0x104 > -#undef MC_CMD_0x104_PRIVILEGE_CTG > - > -#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_WRITE_BYTES_IN msgrequest */ > -#define MC_CMD_XPM_WRITE_BYTES_IN_LENMIN 8 > -#define MC_CMD_XPM_WRITE_BYTES_IN_LENMAX 252 > -#define MC_CMD_XPM_WRITE_BYTES_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_XPM_WRITE_BYTES_IN_LEN(num) (8+1*(num)) > -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_NUM(len) (((len)-8)/1) > -/* Start address (byte) */ > -#define MC_CMD_XPM_WRITE_BYTES_IN_ADDR_OFST 0 > -#define MC_CMD_XPM_WRITE_BYTES_IN_ADDR_LEN 4 > -/* Count (bytes) */ > -#define MC_CMD_XPM_WRITE_BYTES_IN_COUNT_OFST 4 > -#define MC_CMD_XPM_WRITE_BYTES_IN_COUNT_LEN 4 > -/* Data */ > -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_OFST 8 > -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_LEN 1 > -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MINNUM 0 > -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM 244 > -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM_MCDI2 1012 > - > -/* MC_CMD_XPM_WRITE_BYTES_OUT msgresponse */ > -#define MC_CMD_XPM_WRITE_BYTES_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_XPM_READ_SECTOR > - * Read XPM sector > - */ > -#define MC_CMD_XPM_READ_SECTOR 0x105 > -#undef MC_CMD_0x105_PRIVILEGE_CTG > - > -#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_READ_SECTOR_IN msgrequest */ > -#define MC_CMD_XPM_READ_SECTOR_IN_LEN 8 > -/* Sector index */ > -#define MC_CMD_XPM_READ_SECTOR_IN_INDEX_OFST 0 > -#define MC_CMD_XPM_READ_SECTOR_IN_INDEX_LEN 4 > -/* Sector size */ > -#define MC_CMD_XPM_READ_SECTOR_IN_SIZE_OFST 4 > -#define MC_CMD_XPM_READ_SECTOR_IN_SIZE_LEN 4 > - > -/* MC_CMD_XPM_READ_SECTOR_OUT msgresponse */ > -#define MC_CMD_XPM_READ_SECTOR_OUT_LENMIN 4 > -#define MC_CMD_XPM_READ_SECTOR_OUT_LENMAX 36 > -#define MC_CMD_XPM_READ_SECTOR_OUT_LENMAX_MCDI2 36 > -#define MC_CMD_XPM_READ_SECTOR_OUT_LEN(num) (4+1*(num)) > -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_NUM(len) (((len)-4)/1) > -/* Sector type */ > -#define MC_CMD_XPM_READ_SECTOR_OUT_TYPE_OFST 0 > -#define MC_CMD_XPM_READ_SECTOR_OUT_TYPE_LEN 4 > -#define MC_CMD_XPM_READ_SECTOR_OUT_BLANK 0x0 /* enum */ > -#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_128 0x1 /* enum */ > -#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_256 0x2 /* enum */ > -#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_DATA 0x3 /* enum */ > -#define MC_CMD_XPM_READ_SECTOR_OUT_INVALID 0xff /* enum */ > -/* Sector data */ > -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_OFST 4 > -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_LEN 1 > -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MINNUM 0 > -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM 32 > -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM_MCDI2 32 > - > - > -/***********************************/ > -/* MC_CMD_XPM_WRITE_SECTOR > - * Write XPM sector > - */ > -#define MC_CMD_XPM_WRITE_SECTOR 0x106 > -#undef MC_CMD_0x106_PRIVILEGE_CTG > - > -#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_WRITE_SECTOR_IN msgrequest */ > -#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMIN 12 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX 44 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX_MCDI2 44 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_LEN(num) (12+1*(num)) > -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_NUM(len) (((len)-12)/1) > -/* If writing fails due to an uncorrectable error, try up to RETRIES following > - * sectors (or until no more space available). If 0, only one write attempt is > - * made. Note that uncorrectable errors are unlikely, thanks to XPM self-repair > - * mechanism. > - */ > -#define MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_OFST 0 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_LEN 1 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_OFST 1 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_LEN 3 > -/* Sector type */ > -#define MC_CMD_XPM_WRITE_SECTOR_IN_TYPE_OFST 4 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_TYPE_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_XPM_READ_SECTOR/MC_CMD_XPM_READ_SECTOR_OUT/TYPE */ > -/* Sector size */ > -#define MC_CMD_XPM_WRITE_SECTOR_IN_SIZE_OFST 8 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_SIZE_LEN 4 > -/* Sector data */ > -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_OFST 12 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_LEN 1 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MINNUM 0 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM 32 > -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM_MCDI2 32 > - > -/* MC_CMD_XPM_WRITE_SECTOR_OUT msgresponse */ > -#define MC_CMD_XPM_WRITE_SECTOR_OUT_LEN 4 > -/* New sector index */ > -#define MC_CMD_XPM_WRITE_SECTOR_OUT_INDEX_OFST 0 > -#define MC_CMD_XPM_WRITE_SECTOR_OUT_INDEX_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_XPM_INVALIDATE_SECTOR > - * Invalidate XPM sector > - */ > -#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107 > -#undef MC_CMD_0x107_PRIVILEGE_CTG > - > -#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_INVALIDATE_SECTOR_IN msgrequest */ > -#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_LEN 4 > -/* Sector index */ > -#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_INDEX_OFST 0 > -#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_INDEX_LEN 4 > - > -/* MC_CMD_XPM_INVALIDATE_SECTOR_OUT msgresponse */ > -#define MC_CMD_XPM_INVALIDATE_SECTOR_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_XPM_BLANK_CHECK > - * Blank-check XPM memory and report bad locations > - */ > -#define MC_CMD_XPM_BLANK_CHECK 0x108 > -#undef MC_CMD_0x108_PRIVILEGE_CTG > - > -#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_BLANK_CHECK_IN msgrequest */ > -#define MC_CMD_XPM_BLANK_CHECK_IN_LEN 8 > -/* Start address (byte) */ > -#define MC_CMD_XPM_BLANK_CHECK_IN_ADDR_OFST 0 > -#define MC_CMD_XPM_BLANK_CHECK_IN_ADDR_LEN 4 > -/* Count (bytes) */ > -#define MC_CMD_XPM_BLANK_CHECK_IN_COUNT_OFST 4 > -#define MC_CMD_XPM_BLANK_CHECK_IN_COUNT_LEN 4 > - > -/* MC_CMD_XPM_BLANK_CHECK_OUT msgresponse */ > -#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMIN 4 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX 252 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_LEN(num) (4+2*(num)) > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_NUM(len) (((len)-4)/2) > -/* Total number of bad (non-blank) locations */ > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_OFST 0 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_LEN 4 > -/* Addresses of bad locations (may be less than BAD_COUNT, if all cannot fit > - * into MCDI response) > - */ > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_OFST 4 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_LEN 2 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MINNUM 0 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM 124 > -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM_MCDI2 508 > - > - > -/***********************************/ > -/* MC_CMD_XPM_REPAIR > - * Blank-check and repair XPM memory > - */ > -#define MC_CMD_XPM_REPAIR 0x109 > -#undef MC_CMD_0x109_PRIVILEGE_CTG > - > -#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_REPAIR_IN msgrequest */ > -#define MC_CMD_XPM_REPAIR_IN_LEN 8 > -/* Start address (byte) */ > -#define MC_CMD_XPM_REPAIR_IN_ADDR_OFST 0 > -#define MC_CMD_XPM_REPAIR_IN_ADDR_LEN 4 > -/* Count (bytes) */ > -#define MC_CMD_XPM_REPAIR_IN_COUNT_OFST 4 > -#define MC_CMD_XPM_REPAIR_IN_COUNT_LEN 4 > - > -/* MC_CMD_XPM_REPAIR_OUT msgresponse */ > -#define MC_CMD_XPM_REPAIR_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_XPM_DECODER_TEST > - * Test XPM memory address decoders for gross manufacturing defects. Can only > - * be performed on an unprogrammed part. > - */ > -#define MC_CMD_XPM_DECODER_TEST 0x10a > -#undef MC_CMD_0x10a_PRIVILEGE_CTG > - > -#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_DECODER_TEST_IN msgrequest */ > -#define MC_CMD_XPM_DECODER_TEST_IN_LEN 0 > - > -/* MC_CMD_XPM_DECODER_TEST_OUT msgresponse */ > -#define MC_CMD_XPM_DECODER_TEST_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_XPM_WRITE_TEST > - * XPM memory write test. Test XPM write logic for gross manufacturing defects > - * by writing to a dedicated test row. There are 16 locations in the test row > - * and the test can only be performed on locations that have not been > - * previously used (i.e. can be run at most 16 times). The test will pick the > - * first available location to use, or fail with ENOSPC if none left. > - */ > -#define MC_CMD_XPM_WRITE_TEST 0x10b > -#undef MC_CMD_0x10b_PRIVILEGE_CTG > - > -#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_XPM_WRITE_TEST_IN msgrequest */ > -#define MC_CMD_XPM_WRITE_TEST_IN_LEN 0 > - > -/* MC_CMD_XPM_WRITE_TEST_OUT msgresponse */ > -#define MC_CMD_XPM_WRITE_TEST_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_EXEC_SIGNED > - * Check the CMAC of the contents of IMEM and DMEM against the value supplied > - * and if correct begin execution from the start of IMEM. The caller supplies a > - * key ID, the length of IMEM and DMEM to validate and the expected CMAC. CMAC > - * computation runs from the start of IMEM, and from the start of DMEM + 16k, > - * to match flash booting. The command will respond with EINVAL if the CMAC > - * does match, otherwise it will respond with success before it jumps to IMEM. > - */ > -#define MC_CMD_EXEC_SIGNED 0x10c > -#undef MC_CMD_0x10c_PRIVILEGE_CTG > - > -#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_EXEC_SIGNED_IN msgrequest */ > -#define MC_CMD_EXEC_SIGNED_IN_LEN 28 > -/* the length of code to include in the CMAC */ > -#define MC_CMD_EXEC_SIGNED_IN_CODELEN_OFST 0 > -#define MC_CMD_EXEC_SIGNED_IN_CODELEN_LEN 4 > -/* the length of date to include in the CMAC */ > -#define MC_CMD_EXEC_SIGNED_IN_DATALEN_OFST 4 > -#define MC_CMD_EXEC_SIGNED_IN_DATALEN_LEN 4 > -/* the XPM sector containing the key to use */ > -#define MC_CMD_EXEC_SIGNED_IN_KEYSECTOR_OFST 8 > -#define MC_CMD_EXEC_SIGNED_IN_KEYSECTOR_LEN 4 > -/* the expected CMAC value */ > -#define MC_CMD_EXEC_SIGNED_IN_CMAC_OFST 12 > -#define MC_CMD_EXEC_SIGNED_IN_CMAC_LEN 16 > - > -/* MC_CMD_EXEC_SIGNED_OUT msgresponse */ > -#define MC_CMD_EXEC_SIGNED_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_PREPARE_SIGNED > - * Prepare to upload a signed image. This will scrub the specified length of > - * the data region, which must be at least as large as the DATALEN supplied to > - * MC_CMD_EXEC_SIGNED. > - */ > -#define MC_CMD_PREPARE_SIGNED 0x10d > -#undef MC_CMD_0x10d_PRIVILEGE_CTG > - > -#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_PREPARE_SIGNED_IN msgrequest */ > -#define MC_CMD_PREPARE_SIGNED_IN_LEN 4 > -/* the length of data area to clear */ > -#define MC_CMD_PREPARE_SIGNED_IN_DATALEN_OFST 0 > -#define MC_CMD_PREPARE_SIGNED_IN_DATALEN_LEN 4 > - > -/* MC_CMD_PREPARE_SIGNED_OUT msgresponse */ > -#define MC_CMD_PREPARE_SIGNED_OUT_LEN 0 > - > - > /* TUNNEL_ENCAP_UDP_PORT_ENTRY structuredef */ > #define TUNNEL_ENCAP_UDP_PORT_ENTRY_LEN 4 > /* UDP port (the standard ports are named below but any port may be used) */ > @@ -23048,110 +21407,6 @@ > #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_WIDTH 1 > > > -/***********************************/ > -/* MC_CMD_RX_BALANCING > - * Configure a port upconverter to distribute the packets on both RX engines. > - * Packets are distributed based on a table with the destination vFIFO. The > - * index of the table is a hash of source and destination of IPV4 and VLAN > - * priority. > - */ > -#define MC_CMD_RX_BALANCING 0x118 > -#undef MC_CMD_0x118_PRIVILEGE_CTG > - > -#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_RX_BALANCING_IN msgrequest */ > -#define MC_CMD_RX_BALANCING_IN_LEN 16 > -/* The RX port whose upconverter table will be modified */ > -#define MC_CMD_RX_BALANCING_IN_PORT_OFST 0 > -#define MC_CMD_RX_BALANCING_IN_PORT_LEN 4 > -/* The VLAN priority associated to the table index and vFIFO */ > -#define MC_CMD_RX_BALANCING_IN_PRIORITY_OFST 4 > -#define MC_CMD_RX_BALANCING_IN_PRIORITY_LEN 4 > -/* The resulting bit of SRC^DST for indexing the table */ > -#define MC_CMD_RX_BALANCING_IN_SRC_DST_OFST 8 > -#define MC_CMD_RX_BALANCING_IN_SRC_DST_LEN 4 > -/* The RX engine to which the vFIFO in the table entry will point to */ > -#define MC_CMD_RX_BALANCING_IN_ENG_OFST 12 > -#define MC_CMD_RX_BALANCING_IN_ENG_LEN 4 > - > -/* MC_CMD_RX_BALANCING_OUT msgresponse */ > -#define MC_CMD_RX_BALANCING_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_NVRAM_PRIVATE_APPEND > - * Append a single TLV to the MC_USAGE_TLV partition. Returns MC_CMD_ERR_EEXIST > - * if the tag is already present. > - */ > -#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c > -#undef MC_CMD_0x11c_PRIVILEGE_CTG > - > -#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_NVRAM_PRIVATE_APPEND_IN msgrequest */ > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMIN 9 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX 252 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LEN(num) (8+1*(num)) > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_NUM(len) (((len)-8)/1) > -/* The tag to be appended */ > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_OFST 0 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_LEN 4 > -/* The length of the data */ > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENGTH_OFST 4 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENGTH_LEN 4 > -/* The data to be contained in the TLV structure */ > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_OFST 8 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_LEN 1 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MINNUM 1 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM 244 > -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM_MCDI2 1012 > - > -/* MC_CMD_NVRAM_PRIVATE_APPEND_OUT msgresponse */ > -#define MC_CMD_NVRAM_PRIVATE_APPEND_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_XPM_VERIFY_CONTENTS > - * Verify that the contents of the XPM memory is correct (Medford only). This > - * is used during manufacture to check that the XPM memory has been programmed > - * correctly at ATE. > - */ > -#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b > -#undef MC_CMD_0x11b_PRIVILEGE_CTG > - > -#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_XPM_VERIFY_CONTENTS_IN msgrequest */ > -#define MC_CMD_XPM_VERIFY_CONTENTS_IN_LEN 4 > -/* Data type to be checked */ > -#define MC_CMD_XPM_VERIFY_CONTENTS_IN_DATA_TYPE_OFST 0 > -#define MC_CMD_XPM_VERIFY_CONTENTS_IN_DATA_TYPE_LEN 4 > - > -/* MC_CMD_XPM_VERIFY_CONTENTS_OUT msgresponse */ > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMIN 12 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX 252 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LEN(num) (12+1*(num)) > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_NUM(len) (((len)-12)/1) > -/* Number of sectors found (test builds only) */ > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_OFST 0 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_LEN 4 > -/* Number of bytes found (test builds only) */ > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_BYTES_OFST 4 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_BYTES_LEN 4 > -/* Length of signature */ > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIG_LENGTH_OFST 8 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIG_LENGTH_LEN 4 > -/* Signature */ > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_OFST 12 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_LEN 1 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MINNUM 0 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM 240 > -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM_MCDI2 1008 > - > - > /***********************************/ > /* MC_CMD_SET_EVQ_TMR > * Update the timer load, timer reload and timer mode values for a given EVQ. > @@ -23242,595 +21497,25 @@ > #define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_MCDI_TMR_STEP_NS_LEN 4 > /* For timers updated using the bug35388 workaround, this is the time interval > * (in nanoseconds) for each increment of the timer load/reload count. The > - * requested duration of a timer is this value multiplied by the timer > - * load/reload count. This field is only meaningful if the bug35388 workaround > - * is enabled. > - */ > -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_OFST 24 > -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_LEN 4 > -/* For timers updated using the bug35388 workaround, this is the maximum value > - * allowed for timer load/reload counts. This field is only meaningful if the > - * bug35388 workaround is enabled. > - */ > -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_OFST 28 > -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_LEN 4 > -/* For timers updated using the bug35388 workaround, timer load/reload counts > - * not a multiple of this step size will be rounded in an implementation > - * defined manner. This field is only meaningful if the bug35388 workaround is > - * enabled. > - */ > -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_OFST 32 > -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_ALLOCATE_TX_VFIFO_CP > - * When we use the TX_vFIFO_ULL mode, we can allocate common pools using the > - * non used switch buffers. > - */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d > -#undef MC_CMD_0x11d_PRIVILEGE_CTG > - > -#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20 > -/* Desired instance. Must be set to a specific instance, which is a function > - * local queue index. The calling client must be the currently-assigned user of > - * this VI (see MC_CMD_SET_VI_USER). > - */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0 > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4 > -/* Will the common pool be used as TX_vFIFO_ULL (1) */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_MODE_OFST 4 > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_MODE_LEN 4 > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_ENABLED 0x1 /* enum */ > -/* enum: Using this interface without TX_vFIFO_ULL is not supported for now */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_DISABLED 0x0 > -/* Number of buffers to reserve for the common pool */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_SIZE_OFST 8 > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_SIZE_LEN 4 > -/* TX datapath to which the Common Pool is connected to. */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INGRESS_OFST 12 > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INGRESS_LEN 4 > -/* enum: Extracts information from function */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_USE_FUNCTION_VALUE -0x1 > -/* Network port or RX Engine to which the common pool connects. */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_EGRESS_OFST 16 > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_EGRESS_LEN 4 > -/* enum: Extracts information from function */ > -/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_USE_FUNCTION_VALUE -0x1 */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT0 0x0 /* enum */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT1 0x1 /* enum */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT2 0x2 /* enum */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT3 0x3 /* enum */ > -/* enum: To enable Switch loopback with Rx engine 0 */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_RX_ENGINE0 0x4 > -/* enum: To enable Switch loopback with Rx engine 1 */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_RX_ENGINE1 0x5 > - > -/* MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT msgresponse */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_LEN 4 > -/* ID of the common pool allocated */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_CP_ID_OFST 0 > -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_CP_ID_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO > - * When we use the TX_vFIFO_ULL mode, we can allocate vFIFOs using the > - * previously allocated common pools. > - */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e > -#undef MC_CMD_0x11e_PRIVILEGE_CTG > - > -#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN msgrequest */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_LEN 20 > -/* Common pool previously allocated to which the new vFIFO will be associated > - */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_CP_OFST 0 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_CP_LEN 4 > -/* Port or RX engine to associate the vFIFO egress */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_EGRESS_OFST 4 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_EGRESS_LEN 4 > -/* enum: Extracts information from common pool */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_USE_CP_VALUE -0x1 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT0 0x0 /* enum */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT1 0x1 /* enum */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT2 0x2 /* enum */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT3 0x3 /* enum */ > -/* enum: To enable Switch loopback with Rx engine 0 */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_RX_ENGINE0 0x4 > -/* enum: To enable Switch loopback with Rx engine 1 */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_RX_ENGINE1 0x5 > -/* Minimum number of buffers that the pool must have */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_SIZE_OFST 8 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_SIZE_LEN 4 > -/* enum: Do not check the space available */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_NO_MINIMUM 0x0 > -/* Will the vFIFO be used as TX_vFIFO_ULL */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_MODE_OFST 12 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_MODE_LEN 4 > -/* Network priority of the vFIFO,if applicable */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PRIORITY_OFST 16 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PRIORITY_LEN 4 > -/* enum: Search for the lowest unused priority */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_LOWEST_AVAILABLE -0x1 > - > -/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT msgresponse */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_LEN 8 > -/* Short vFIFO ID */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_VID_OFST 0 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_VID_LEN 4 > -/* Network priority of the vFIFO */ > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_PRIORITY_OFST 4 > -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_PRIORITY_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_TEARDOWN_TX_VFIFO_VF > - * This interface clears the configuration of the given vFIFO and leaves it > - * ready to be re-used. > - */ > -#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f > -#undef MC_CMD_0x11f_PRIVILEGE_CTG > - > -#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_TEARDOWN_TX_VFIFO_VF_IN msgrequest */ > -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_LEN 4 > -/* Short vFIFO ID */ > -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_VFIFO_OFST 0 > -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_VFIFO_LEN 4 > - > -/* MC_CMD_TEARDOWN_TX_VFIFO_VF_OUT msgresponse */ > -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_DEALLOCATE_TX_VFIFO_CP > - * This interface clears the configuration of the given common pool and leaves > - * it ready to be re-used. > - */ > -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121 > -#undef MC_CMD_0x121_PRIVILEGE_CTG > - > -#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN msgrequest */ > -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_LEN 4 > -/* Common pool ID given when pool allocated */ > -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_POOL_ID_OFST 0 > -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_POOL_ID_LEN 4 > - > -/* MC_CMD_DEALLOCATE_TX_VFIFO_CP_OUT msgresponse */ > -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS > - * This interface allows the host to find out how many common pool buffers are > - * not yet assigned. > - */ > -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124 > -#undef MC_CMD_0x124_PRIVILEGE_CTG > - > -#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_IN msgrequest */ > -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_IN_LEN 0 > - > -/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT msgresponse */ > -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_LEN 8 > -/* Available buffers for the ENG to NET vFIFOs. */ > -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_NET_OFST 0 > -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_NET_LEN 4 > -/* Available buffers for the ENG to ENG and NET to ENG vFIFOs. */ > -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_ENG_OFST 4 > -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_ENG_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_SUC_VERSION > - * Get the version of the SUC > - */ > -#define MC_CMD_SUC_VERSION 0x134 > -#undef MC_CMD_0x134_PRIVILEGE_CTG > - > -#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_SUC_VERSION_IN msgrequest */ > -#define MC_CMD_SUC_VERSION_IN_LEN 0 > - > -/* MC_CMD_SUC_VERSION_OUT msgresponse */ > -#define MC_CMD_SUC_VERSION_OUT_LEN 24 > -/* The SUC firmware version as four numbers - a.b.c.d */ > -#define MC_CMD_SUC_VERSION_OUT_VERSION_OFST 0 > -#define MC_CMD_SUC_VERSION_OUT_VERSION_LEN 4 > -#define MC_CMD_SUC_VERSION_OUT_VERSION_NUM 4 > -/* The date, in seconds since the Unix epoch, when the firmware image was > - * built. > - */ > -#define MC_CMD_SUC_VERSION_OUT_BUILD_DATE_OFST 16 > -#define MC_CMD_SUC_VERSION_OUT_BUILD_DATE_LEN 4 > -/* The ID of the SUC chip. This is specific to the platform but typically > - * indicates family, memory sizes etc. See SF-116728-SW for further details. > - */ > -#define MC_CMD_SUC_VERSION_OUT_CHIP_ID_OFST 20 > -#define MC_CMD_SUC_VERSION_OUT_CHIP_ID_LEN 4 > - > -/* MC_CMD_SUC_BOOT_VERSION_IN msgrequest: Get the version of the SUC boot > - * loader. > - */ > -#define MC_CMD_SUC_BOOT_VERSION_IN_LEN 4 > -#define MC_CMD_SUC_BOOT_VERSION_IN_MAGIC_OFST 0 > -#define MC_CMD_SUC_BOOT_VERSION_IN_MAGIC_LEN 4 > -/* enum: Requests the SUC boot version. */ > -#define MC_CMD_SUC_VERSION_GET_BOOT_VERSION 0xb007700b > - > -/* MC_CMD_SUC_BOOT_VERSION_OUT msgresponse */ > -#define MC_CMD_SUC_BOOT_VERSION_OUT_LEN 4 > -/* The SUC boot version */ > -#define MC_CMD_SUC_BOOT_VERSION_OUT_VERSION_OFST 0 > -#define MC_CMD_SUC_BOOT_VERSION_OUT_VERSION_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_GET_RX_PREFIX_ID > - * This command is part of the mechanism for configuring the format of the RX > - * packet prefix. It takes as input a bitmask of the fields the host would like > - * to be in the prefix. If the hardware supports RX prefixes with that > - * combination of fields, then this command returns a list of prefix-ids, > - * opaque identifiers suitable for use in the RX_PREFIX_ID field of a > - * MC_CMD_INIT_RXQ_V5_IN message. If the combination of fields is not > - * supported, returns ENOTSUP. If the firmware can't create any new prefix-ids > - * due to resource constraints, returns ENOSPC. > - */ > -#define MC_CMD_GET_RX_PREFIX_ID 0x13b > -#undef MC_CMD_0x13b_PRIVILEGE_CTG > - > -#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_RX_PREFIX_ID_IN msgrequest */ > -#define MC_CMD_GET_RX_PREFIX_ID_IN_LEN 8 > -/* Field bitmask. */ > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_LBN 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_LBN 2 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_LBN 3 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_LBN 4 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_LBN 5 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_LBN 6 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_LBN 7 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_LBN 7 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_LBN 8 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_LBN 9 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_LBN 10 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_WIDTH 1 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_LBN 11 > -#define MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_WIDTH 1 > - > -/* MC_CMD_GET_RX_PREFIX_ID_OUT msgresponse */ > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LENMIN 8 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX 252 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LEN(num) (4+4*(num)) > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_NUM(len) (((len)-4)/4) > -/* Number of prefix-ids returned */ > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_OFST 0 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_LEN 4 > -/* Opaque prefix identifiers which can be passed into MC_CMD_INIT_RXQ_V5 or > - * MC_CMD_QUERY_PREFIX_ID > - */ > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_OFST 4 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_LEN 4 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MINNUM 1 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM 62 > -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM_MCDI2 254 > - > -/* RX_PREFIX_FIELD_INFO structuredef: Information about a single RX prefix > - * field > - */ > -#define RX_PREFIX_FIELD_INFO_LEN 4 > -/* The offset of the field from the start of the prefix, in bits */ > -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_OFST 0 > -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_LEN 2 > -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_LBN 0 > -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_WIDTH 16 > -/* The width of the field, in bits */ > -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_OFST 2 > -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_LEN 1 > -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_LBN 16 > -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_WIDTH 8 > -/* The type of the field. These enum values are in the same order as the fields > - * in the MC_CMD_GET_RX_PREFIX_ID_IN bitmask > - */ > -#define RX_PREFIX_FIELD_INFO_TYPE_OFST 3 > -#define RX_PREFIX_FIELD_INFO_TYPE_LEN 1 > -#define RX_PREFIX_FIELD_INFO_LENGTH 0x0 /* enum */ > -#define RX_PREFIX_FIELD_INFO_RSS_HASH_VALID 0x1 /* enum */ > -#define RX_PREFIX_FIELD_INFO_USER_FLAG 0x2 /* enum */ > -#define RX_PREFIX_FIELD_INFO_CLASS 0x3 /* enum */ > -#define RX_PREFIX_FIELD_INFO_PARTIAL_TSTAMP 0x4 /* enum */ > -#define RX_PREFIX_FIELD_INFO_RSS_HASH 0x5 /* enum */ > -#define RX_PREFIX_FIELD_INFO_USER_MARK 0x6 /* enum */ > -#define RX_PREFIX_FIELD_INFO_INGRESS_MPORT 0x7 /* enum */ > -#define RX_PREFIX_FIELD_INFO_INGRESS_VPORT 0x7 /* enum */ > -#define RX_PREFIX_FIELD_INFO_CSUM_FRAME 0x8 /* enum */ > -#define RX_PREFIX_FIELD_INFO_VLAN_STRIP_TCI 0x9 /* enum */ > -#define RX_PREFIX_FIELD_INFO_VLAN_STRIPPED 0xa /* enum */ > -#define RX_PREFIX_FIELD_INFO_VSWITCH_STATUS 0xb /* enum */ > -#define RX_PREFIX_FIELD_INFO_TYPE_LBN 24 > -#define RX_PREFIX_FIELD_INFO_TYPE_WIDTH 8 > - > -/* RX_PREFIX_FIXED_RESPONSE structuredef: Information about an RX prefix in > - * which every field has a fixed offset and width > - */ > -#define RX_PREFIX_FIXED_RESPONSE_LENMIN 4 > -#define RX_PREFIX_FIXED_RESPONSE_LENMAX 252 > -#define RX_PREFIX_FIXED_RESPONSE_LENMAX_MCDI2 1020 > -#define RX_PREFIX_FIXED_RESPONSE_LEN(num) (4+4*(num)) > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_NUM(len) (((len)-4)/4) > -/* Length of the RX prefix in bytes */ > -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_OFST 0 > -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LEN 1 > -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LBN 0 > -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_WIDTH 8 > -/* Number of fields present in the prefix */ > -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_OFST 1 > -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LEN 1 > -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LBN 8 > -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_WIDTH 8 > -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_OFST 2 > -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_LEN 2 > -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_LBN 16 > -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_WIDTH 16 > -/* Array of RX_PREFIX_FIELD_INFO structures, of length FIELD_COUNT */ > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_OFST 4 > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_LEN 4 > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_MINNUM 0 > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM 62 > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM_MCDI2 254 > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_LBN 32 > -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_QUERY_RX_PREFIX_ID > - * This command takes an RX prefix id (obtained from MC_CMD_GET_RX_PREFIX_ID) > - * and returns a description of the RX prefix of packets delievered to an RXQ > - * created with that prefix id > - */ > -#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c > -#undef MC_CMD_0x13c_PRIVILEGE_CTG > - > -#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_QUERY_RX_PREFIX_ID_IN msgrequest */ > -#define MC_CMD_QUERY_RX_PREFIX_ID_IN_LEN 4 > -/* Prefix id to query */ > -#define MC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_OFST 0 > -#define MC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_LEN 4 > - > -/* MC_CMD_QUERY_RX_PREFIX_ID_OUT msgresponse */ > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMIN 4 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX 252 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LEN(num) (4+1*(num)) > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_NUM(len) (((len)-4)/1) > -/* An enum describing the structure of this response. */ > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_OFST 0 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_LEN 1 > -/* enum: The response is of format RX_PREFIX_FIXED_RESPONSE */ > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_FIXED 0x0 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_OFST 1 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_LEN 3 > -/* The response. Its format is as defined by the RESPONSE_TYPE value */ > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_OFST 4 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_LEN 1 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MINNUM 0 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM 248 > -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM_MCDI2 1016 > - > - > -/***********************************/ > -/* MC_CMD_BUNDLE > - * A command to perform various bundle-related operations on insecure cards. > - */ > -#define MC_CMD_BUNDLE 0x13d > -#undef MC_CMD_0x13d_PRIVILEGE_CTG > - > -#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE > - > -/* MC_CMD_BUNDLE_IN msgrequest */ > -#define MC_CMD_BUNDLE_IN_LEN 4 > -/* Sub-command code */ > -#define MC_CMD_BUNDLE_IN_OP_OFST 0 > -#define MC_CMD_BUNDLE_IN_OP_LEN 4 > -/* enum: Get the current host access mode set on component partitions. */ > -#define MC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_GET 0x0 > -/* enum: Set the host access mode set on component partitions. */ > -#define MC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_SET 0x1 > - > -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN msgrequest: Retrieve the current > - * access mode on component partitions such as MC_FIRMWARE, SUC_FIRMWARE and > - * EXPANSION_UEFI. This command only works on engineering (insecure) cards. On > - * secure adapters, this command returns MC_CMD_ERR_EPERM. > - */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_LEN 4 > -/* Sub-command code. Must be OP_COMPONENT_ACCESS_GET. */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_OFST 0 > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_LEN 4 > - > -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT msgresponse: Returns the access > - * control mode. > - */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_LEN 4 > -/* Access mode of component partitions. */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_OFST 0 > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_LEN 4 > -/* enum: Component partitions are read-only from the host. */ > -#define MC_CMD_BUNDLE_COMPONENTS_READ_ONLY 0x0 > -/* enum: Component partitions can read read-from written-to by the host. */ > -#define MC_CMD_BUNDLE_COMPONENTS_READ_WRITE 0x1 > - > -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN msgrequest: The component > - * partitions such as MC_FIRMWARE, SUC_FIRMWARE, EXPANSION_UEFI are set as > - * read-only on firmware built with bundle support. This command marks these > - * partitions as read/writeable. The access status set by this command does not > - * persist across MC reboots. This command only works on engineering (insecure) > - * cards. On secure adapters, this command returns MC_CMD_ERR_EPERM. > - */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_LEN 8 > -/* Sub-command code. Must be OP_COMPONENT_ACCESS_SET. */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_OFST 0 > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_LEN 4 > -/* Access mode of component partitions. */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_OFST 4 > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT/ACCESS_MODE */ > - > -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT msgresponse */ > -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_GET_VPD > - * Read all VPD starting from a given address > + * requested duration of a timer is this value multiplied by the timer > + * load/reload count. This field is only meaningful if the bug35388 workaround > + * is enabled. > */ > -#define MC_CMD_GET_VPD 0x165 > -#undef MC_CMD_0x165_PRIVILEGE_CTG > - > -#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_VPD_IN msgresponse */ > -#define MC_CMD_GET_VPD_IN_LEN 4 > -/* VPD address to start from. In case VPD is longer than MCDI buffer > - * (unlikely), user can make multiple calls with different starting addresses. > +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_OFST 24 > +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_LEN 4 > +/* For timers updated using the bug35388 workaround, this is the maximum value > + * allowed for timer load/reload counts. This field is only meaningful if the > + * bug35388 workaround is enabled. > */ > -#define MC_CMD_GET_VPD_IN_ADDR_OFST 0 > -#define MC_CMD_GET_VPD_IN_ADDR_LEN 4 > - > -/* MC_CMD_GET_VPD_OUT msgresponse */ > -#define MC_CMD_GET_VPD_OUT_LENMIN 0 > -#define MC_CMD_GET_VPD_OUT_LENMAX 252 > -#define MC_CMD_GET_VPD_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_GET_VPD_OUT_LEN(num) (0+1*(num)) > -#define MC_CMD_GET_VPD_OUT_DATA_NUM(len) (((len)-0)/1) > -/* VPD data returned. */ > -#define MC_CMD_GET_VPD_OUT_DATA_OFST 0 > -#define MC_CMD_GET_VPD_OUT_DATA_LEN 1 > -#define MC_CMD_GET_VPD_OUT_DATA_MINNUM 0 > -#define MC_CMD_GET_VPD_OUT_DATA_MAXNUM 252 > -#define MC_CMD_GET_VPD_OUT_DATA_MAXNUM_MCDI2 1020 > - > - > -/***********************************/ > -/* MC_CMD_GET_NCSI_INFO > - * Provide information about the NC-SI stack > - */ > -#define MC_CMD_GET_NCSI_INFO 0x167 > -#undef MC_CMD_0x167_PRIVILEGE_CTG > - > -#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_NCSI_INFO_IN msgrequest */ > -#define MC_CMD_GET_NCSI_INFO_IN_LEN 8 > -/* Operation to be performed */ > -#define MC_CMD_GET_NCSI_INFO_IN_OP_OFST 0 > -#define MC_CMD_GET_NCSI_INFO_IN_OP_LEN 4 > -/* enum: Information on the link settings. */ > -#define MC_CMD_GET_NCSI_INFO_IN_OP_LINK 0x0 > -/* enum: Statistics associated with the channel */ > -#define MC_CMD_GET_NCSI_INFO_IN_OP_STATISTICS 0x1 > -/* The NC-SI channel on which the operation is to be performed */ > -#define MC_CMD_GET_NCSI_INFO_IN_CHANNEL_OFST 4 > -#define MC_CMD_GET_NCSI_INFO_IN_CHANNEL_LEN 4 > - > -/* MC_CMD_GET_NCSI_INFO_LINK_OUT msgresponse */ > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_LEN 12 > -/* Settings as received from BMC. */ > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_OFST 0 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_LEN 4 > -/* Advertised capabilities applied to channel. */ > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_OFST 4 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_LEN 4 > -/* General status */ > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_OFST 8 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_LEN 4 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_OFST 8 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_LBN 0 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_WIDTH 2 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_OFST 8 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_LBN 2 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_WIDTH 1 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_OFST 8 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_LBN 3 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_WIDTH 1 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_OFST 8 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_LBN 4 > -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_WIDTH 1 > - > -/* MC_CMD_GET_NCSI_INFO_STATISTICS_OUT msgresponse */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_LEN 28 > -/* The number of NC-SI commands received. */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_OFST 0 > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_LEN 4 > -/* The number of NC-SI commands dropped. */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_OFST 4 > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_LEN 4 > -/* The number of invalid NC-SI commands received. */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_OFST 8 > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_LEN 4 > -/* The number of checksum errors seen. */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_OFST 12 > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_LEN 4 > -/* The number of NC-SI requests received. */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_OFST 16 > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_LEN 4 > -/* The number of NC-SI responses sent (includes AENs) */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_OFST 20 > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_LEN 4 > -/* The number of NC-SI AENs sent */ > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_OFST 24 > -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_LEN 4 > +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_OFST 28 > +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_LEN 4 > +/* For timers updated using the bug35388 workaround, timer load/reload counts > + * not a multiple of this step size will be rounded in an implementation > + * defined manner. This field is only meaningful if the bug35388 workaround is > + * enabled. > + */ > +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_OFST 32 > +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_LEN 4 > > /* CLIENT_HANDLE structuredef: A client is an abstract entity that can make > * requests of the device and that can own resources managed by the device. > @@ -23848,59 +21533,10 @@ > #define CLIENT_HANDLE_OPAQUE_LBN 0 > #define CLIENT_HANDLE_OPAQUE_WIDTH 32 > > -/* CLOCK_INFO structuredef: Information about a single hardware clock */ > -#define CLOCK_INFO_LEN 28 > -/* Enumeration that uniquely identifies the clock */ > -#define CLOCK_INFO_CLOCK_ID_OFST 0 > -#define CLOCK_INFO_CLOCK_ID_LEN 2 > -/* enum: The Riverhead CMC (card MC) */ > -#define CLOCK_INFO_CLOCK_CMC 0x0 > -/* enum: The Riverhead NMC (network MC) */ > -#define CLOCK_INFO_CLOCK_NMC 0x1 > -/* enum: The Riverhead SDNET slice main logic */ > -#define CLOCK_INFO_CLOCK_SDNET 0x2 > -/* enum: The Riverhead SDNET LUT */ > -#define CLOCK_INFO_CLOCK_SDNET_LUT 0x3 > -/* enum: The Riverhead SDNET control logic */ > -#define CLOCK_INFO_CLOCK_SDNET_CTRL 0x4 > -/* enum: The Riverhead Streaming SubSystem */ > -#define CLOCK_INFO_CLOCK_SSS 0x5 > -/* enum: The Riverhead network MAC and associated CSR registers */ > -#define CLOCK_INFO_CLOCK_MAC 0x6 > -#define CLOCK_INFO_CLOCK_ID_LBN 0 > -#define CLOCK_INFO_CLOCK_ID_WIDTH 16 > -/* Assorted flags */ > -#define CLOCK_INFO_FLAGS_OFST 2 > -#define CLOCK_INFO_FLAGS_LEN 2 > -#define CLOCK_INFO_SETTABLE_OFST 2 > -#define CLOCK_INFO_SETTABLE_LBN 0 > -#define CLOCK_INFO_SETTABLE_WIDTH 1 > -#define CLOCK_INFO_FLAGS_LBN 16 > -#define CLOCK_INFO_FLAGS_WIDTH 16 > -/* The frequency in HZ */ > -#define CLOCK_INFO_FREQUENCY_OFST 4 > -#define CLOCK_INFO_FREQUENCY_LEN 8 > -#define CLOCK_INFO_FREQUENCY_LO_OFST 4 > -#define CLOCK_INFO_FREQUENCY_LO_LEN 4 > -#define CLOCK_INFO_FREQUENCY_LO_LBN 32 > -#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32 > -#define CLOCK_INFO_FREQUENCY_HI_OFST 8 > -#define CLOCK_INFO_FREQUENCY_HI_LEN 4 > -#define CLOCK_INFO_FREQUENCY_HI_LBN 64 > -#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32 > -#define CLOCK_INFO_FREQUENCY_LBN 32 > -#define CLOCK_INFO_FREQUENCY_WIDTH 64 > -/* Human-readable ASCII name for clock, with NUL termination */ > -#define CLOCK_INFO_NAME_OFST 12 > -#define CLOCK_INFO_NAME_LEN 1 > -#define CLOCK_INFO_NAME_NUM 16 > -#define CLOCK_INFO_NAME_LBN 96 > -#define CLOCK_INFO_NAME_WIDTH 8 > - > /* SCHED_CREDIT_CHECK_RESULT structuredef */ > #define SCHED_CREDIT_CHECK_RESULT_LEN 16 > -/* The instance of the scheduler. Refer to XN-200389-AW for the location of > - * these schedulers in the hardware. > +/* The instance of the scheduler. Refer to XN-200389-AW (snic/hnic) and > + * XN-200425-TC (cdx) for the location of these schedulers in the hardware. > */ > #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0 > #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1 > @@ -23914,6 +21550,16 @@ > #define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */ > #define SCHED_CREDIT_CHECK_RESULT_HUB_NET_B 0x8 /* enum */ > #define SCHED_CREDIT_CHECK_RESULT_HUB_NET_REPLAY 0x9 /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_ADAPTER_C2H_C 0xa /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_A2_H2C_C 0xb /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_A3_SOFT_ADAPTOR_C 0xc /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_A4_DPU_WRITE_C 0xd /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_JRC_RRU 0xe /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_CDM_SINK 0xf /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_PCIE_SINK 0x10 /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_UPORT_SINK 0x11 /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_PSX_SINK 0x12 /* enum */ > +#define SCHED_CREDIT_CHECK_RESULT_A5_DPU_READ_C 0x13 /* enum */ > #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0 > #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8 > /* The type of node that this result refers to. */ > @@ -23923,6 +21569,10 @@ > #define SCHED_CREDIT_CHECK_RESULT_DEST 0x0 > /* enum: Source node */ > #define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1 > +/* enum: Destination node credit type 1 (new to the Keystone schedulers, see > + * SF-120268-TC) > + */ > +#define SCHED_CREDIT_CHECK_RESULT_DEST_CREDIT1 0x2 > #define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8 > #define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8 > /* Level of node in scheduler hierarchy (level 0 is the bottom of the > @@ -23949,592 +21599,6 @@ > #define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32 > > > -/***********************************/ > -/* MC_CMD_GET_CLOCKS_INFO > - * Get information about the device clocks > - */ > -#define MC_CMD_GET_CLOCKS_INFO 0x166 > -#undef MC_CMD_0x166_PRIVILEGE_CTG > - > -#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_CLOCKS_INFO_IN msgrequest */ > -#define MC_CMD_GET_CLOCKS_INFO_IN_LEN 0 > - > -/* MC_CMD_GET_CLOCKS_INFO_OUT msgresponse */ > -#define MC_CMD_GET_CLOCKS_INFO_OUT_LENMIN 0 > -#define MC_CMD_GET_CLOCKS_INFO_OUT_LENMAX 252 > -#define MC_CMD_GET_CLOCKS_INFO_OUT_LENMAX_MCDI2 1008 > -#define MC_CMD_GET_CLOCKS_INFO_OUT_LEN(num) (0+28*(num)) > -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_NUM(len) (((len)-0)/28) > -/* An array of CLOCK_INFO structures. */ > -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_OFST 0 > -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_LEN 28 > -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MINNUM 0 > -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM 9 > -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM_MCDI2 36 > - > - > -/***********************************/ > -/* MC_CMD_VNIC_ENCAP_RULE_ADD > - * Add a rule for detecting encapsulations in the VNIC stage. Currently this > - * only affects checksum validation in VNIC RX - on TX the send descriptor > - * explicitly specifies encapsulation. These rules are per-VNIC, i.e. only > - * apply to the current driver. If a rule matches, then the packet is > - * considered to have the corresponding encapsulation type, and the inner > - * packet is parsed. It is up to the driver to ensure that overlapping rules > - * are not inserted. (If a packet would match multiple rules, a random one of > - * them will be used.) A rule with the exact same match criteria may not be > - * inserted twice (EALREADY). Only a limited number MATCH_FLAGS values are > - * supported, use MC_CMD_GET_PARSER_DISP_INFO with OP > - * OP_GET_SUPPORTED_VNIC_ENCAP_RULE_MATCHES to get a list of supported > - * combinations. Each driver may only have a limited set of active rules - > - * returns ENOSPC if the caller's table is full. > - */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d > -#undef MC_CMD_0x16d_PRIVILEGE_CTG > - > -#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_VNIC_ENCAP_RULE_ADD_IN msgrequest */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_LEN 36 > -/* Set to MAE_MPORT_SELECTOR_ASSIGNED. In the future this may be relaxed. */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_OFST 0 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_LEN 4 > -/* Any non-zero bits other than the ones named below or an unsupported > - * combination will cause the NIC to return EOPNOTSUPP. In the future more > - * flags may be added. > - */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_OFST 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_LEN 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_OFST 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_LBN 0 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_WIDTH 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_OFST 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_LBN 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_WIDTH 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_OFST 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_LBN 2 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_WIDTH 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_OFST 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_LBN 3 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_WIDTH 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_OFST 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_LBN 4 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_WIDTH 1 > -/* Only if MATCH_ETHER_TYPE is set. Ethertype value as bytes in network order. > - * Currently only IPv4 (0x0800) and IPv6 (0x86DD) ethertypes may be used. > - */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_OFST 8 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_LEN 2 > -/* Only if MATCH_OUTER_VLAN is set. VID value as bytes in network order. > - * (Deprecated) > - */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_LBN 80 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WIDTH 12 > -/* Only if MATCH_OUTER_VLAN is set. Aligned wrapper for OUTER_VLAN_VID. */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_OFST 10 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_LEN 2 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_OFST 10 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_LBN 0 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_WIDTH 12 > -/* Only if MATCH_DST_IP is set. IP address as bytes in network order. In the > - * case of IPv4, the IP should be in the first 4 bytes and all other bytes > - * should be zero. > - */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_OFST 12 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_LEN 16 > -/* Only if MATCH_IP_PROTO is set. Currently only UDP proto (17) may be used. */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_OFST 28 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_LEN 1 > -/* Actions that should be applied to packets match the rule. */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_OFST 29 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_LEN 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_OFST 29 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_LBN 0 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_WIDTH 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_OFST 29 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_LBN 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_WIDTH 1 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_OFST 29 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_LBN 2 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_WIDTH 1 > -/* Only if MATCH_DST_PORT is set. Port number as bytes in network order. */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_OFST 30 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_LEN 2 > -/* Resulting encapsulation type, as per MAE_MCDI_ENCAP_TYPE enumeration. */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_OFST 32 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_LEN 4 > - > -/* MC_CMD_VNIC_ENCAP_RULE_ADD_OUT msgresponse */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_LEN 4 > -/* Handle to inserted rule. Used for removing the rule. */ > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_OFST 0 > -#define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_VNIC_ENCAP_RULE_REMOVE > - * Remove a VNIC encapsulation rule. Packets which would have previously > - * matched the rule will then be considered as unencapsulated. Returns EALREADY > - * if the input HANDLE doesn't correspond to an existing rule. > - */ > -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e > -#undef MC_CMD_0x16e_PRIVILEGE_CTG > - > -#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN msgrequest */ > -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_LEN 4 > -/* Handle which was returned by MC_CMD_VNIC_ENCAP_RULE_ADD. */ > -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_OFST 0 > -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_LEN 4 > - > -/* MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT msgresponse */ > -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT_LEN 0 > - > -/* UUID structuredef: An RFC4122 standard UUID. The values here are stored in > - * the endianness specified by the RFC; users should ignore the broken-out > - * fields and instead do straight memory copies to ensure correct ordering. > - */ > -#define UUID_LEN 16 > -#define UUID_TIME_LOW_OFST 0 > -#define UUID_TIME_LOW_LEN 4 > -#define UUID_TIME_LOW_LBN 0 > -#define UUID_TIME_LOW_WIDTH 32 > -#define UUID_TIME_MID_OFST 4 > -#define UUID_TIME_MID_LEN 2 > -#define UUID_TIME_MID_LBN 32 > -#define UUID_TIME_MID_WIDTH 16 > -#define UUID_TIME_HI_LBN 52 > -#define UUID_TIME_HI_WIDTH 12 > -#define UUID_VERSION_LBN 48 > -#define UUID_VERSION_WIDTH 4 > -#define UUID_RESERVED_LBN 64 > -#define UUID_RESERVED_WIDTH 2 > -#define UUID_CLK_SEQ_LBN 66 > -#define UUID_CLK_SEQ_WIDTH 14 > -#define UUID_NODE_OFST 10 > -#define UUID_NODE_LEN 6 > -#define UUID_NODE_LBN 80 > -#define UUID_NODE_WIDTH 48 > - > - > -/***********************************/ > -/* MC_CMD_PLUGIN_ALLOC > - * Create a handle to a datapath plugin's extension. This involves finding a > - * currently-loaded plugin offering the given functionality (as identified by > - * the UUID) and allocating a handle to track the usage of it. Plugin > - * functionality is identified by 'extension' rather than any other identifier > - * so that a single plugin bitfile may offer more than one piece of independent > - * functionality. If two bitfiles are loaded which both offer the same > - * extension, then the metadata is interrogated further to determine which is > - * the newest and that is the one opened. See SF-123625-SW for architectural > - * detail on datapath plugins. > - */ > -#define MC_CMD_PLUGIN_ALLOC 0x1ad > -#undef MC_CMD_0x1ad_PRIVILEGE_CTG > - > -#define MC_CMD_0x1ad_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_PLUGIN_ALLOC_IN msgrequest */ > -#define MC_CMD_PLUGIN_ALLOC_IN_LEN 24 > -/* The functionality requested of the plugin, as a UUID structure */ > -#define MC_CMD_PLUGIN_ALLOC_IN_UUID_OFST 0 > -#define MC_CMD_PLUGIN_ALLOC_IN_UUID_LEN 16 > -/* Additional options for opening the handle */ > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAGS_OFST 16 > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAGS_LEN 4 > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_OFST 16 > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_LBN 0 > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_WIDTH 1 > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_OFST 16 > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_LBN 1 > -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_WIDTH 1 > -/* Load the extension only if it is in the specified administrative group. > - * Specify ANY to load the extension wherever it is found (if there are > - * multiple choices then the extension with the highest MINOR_VER/PATCH_VER > - * will be loaded). See MC_CMD_PLUGIN_GET_META_GLOBAL for a description of > - * administrative groups. > - */ > -#define MC_CMD_PLUGIN_ALLOC_IN_ADMIN_GROUP_OFST 20 > -#define MC_CMD_PLUGIN_ALLOC_IN_ADMIN_GROUP_LEN 2 > -/* enum: Load the extension from any ADMIN_GROUP. */ > -#define MC_CMD_PLUGIN_ALLOC_IN_ANY 0xffff > -/* Reserved */ > -#define MC_CMD_PLUGIN_ALLOC_IN_RESERVED_OFST 22 > -#define MC_CMD_PLUGIN_ALLOC_IN_RESERVED_LEN 2 > - > -/* MC_CMD_PLUGIN_ALLOC_OUT msgresponse */ > -#define MC_CMD_PLUGIN_ALLOC_OUT_LEN 4 > -/* Unique identifier of this usage */ > -#define MC_CMD_PLUGIN_ALLOC_OUT_HANDLE_OFST 0 > -#define MC_CMD_PLUGIN_ALLOC_OUT_HANDLE_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_PLUGIN_FREE > - * Delete a handle to a plugin's extension. > - */ > -#define MC_CMD_PLUGIN_FREE 0x1ae > -#undef MC_CMD_0x1ae_PRIVILEGE_CTG > - > -#define MC_CMD_0x1ae_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_PLUGIN_FREE_IN msgrequest */ > -#define MC_CMD_PLUGIN_FREE_IN_LEN 4 > -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ > -#define MC_CMD_PLUGIN_FREE_IN_HANDLE_OFST 0 > -#define MC_CMD_PLUGIN_FREE_IN_HANDLE_LEN 4 > - > -/* MC_CMD_PLUGIN_FREE_OUT msgresponse */ > -#define MC_CMD_PLUGIN_FREE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_PLUGIN_GET_META_GLOBAL > - * Returns the global metadata applying to the whole plugin extension. See the > - * other metadata calls for subtypes of data. > - */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL 0x1af > -#undef MC_CMD_0x1af_PRIVILEGE_CTG > - > -#define MC_CMD_0x1af_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_PLUGIN_GET_META_GLOBAL_IN msgrequest */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_IN_LEN 4 > -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_IN_HANDLE_OFST 0 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_IN_HANDLE_LEN 4 > - > -/* MC_CMD_PLUGIN_GET_META_GLOBAL_OUT msgresponse */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_LEN 36 > -/* Unique identifier of this plugin extension. This is identical to the value > - * which was requested when the handle was allocated. > - */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_UUID_OFST 0 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_UUID_LEN 16 > -/* semver sub-version of this plugin extension */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MINOR_VER_OFST 16 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MINOR_VER_LEN 2 > -/* semver micro-version of this plugin extension */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PATCH_VER_OFST 18 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PATCH_VER_LEN 2 > -/* Number of different messages which can be sent to this extension */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_NUM_MSGS_OFST 20 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_NUM_MSGS_LEN 4 > -/* Byte offset within the VI window of the plugin's mapped CSR window. */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_OFFSET_OFST 24 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_OFFSET_LEN 2 > -/* Number of bytes mapped through to the plugin's CSRs. 0 if that feature was > - * not requested by the plugin (in which case MAPPED_CSR_OFFSET and > - * MAPPED_CSR_FLAGS are ignored). > - */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_SIZE_OFST 26 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_SIZE_LEN 2 > -/* Flags indicating how to perform the CSR window mapping. */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAGS_OFST 28 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAGS_LEN 4 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_OFST 28 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_LBN 0 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_WIDTH 1 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_OFST 28 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_LBN 1 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_WIDTH 1 > -/* Identifier of the set of extensions which all change state together. > - * Extensions having the same ADMIN_GROUP will always load and unload at the > - * same time. ADMIN_GROUP values themselves are arbitrary (but they contain a > - * generation number as an implementation detail to ensure that they're not > - * reused rapidly). > - */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_ADMIN_GROUP_OFST 32 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_ADMIN_GROUP_LEN 1 > -/* Bitshift in MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY's MASK parameters > - * corresponding to this extension, i.e. set the bit 1<<PRIVILEGE_BIT to permit > - * access to this extension. > - */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PRIVILEGE_BIT_OFST 33 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PRIVILEGE_BIT_LEN 1 > -/* Reserved */ > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_RESERVED_OFST 34 > -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_RESERVED_LEN 2 > - > - > -/***********************************/ > -/* MC_CMD_PLUGIN_GET_META_PUBLISHER > - * Returns metadata supplied by the plugin author which describes this > - * extension in a human-readable way. Contrast with > - * MC_CMD_PLUGIN_GET_META_GLOBAL, which returns information needed for software > - * to operate. > - */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER 0x1b0 > -#undef MC_CMD_0x1b0_PRIVILEGE_CTG > - > -#define MC_CMD_0x1b0_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_PLUGIN_GET_META_PUBLISHER_IN msgrequest */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_LEN 12 > -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_HANDLE_OFST 0 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_HANDLE_LEN 4 > -/* Category of data to return */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_SUBTYPE_OFST 4 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_SUBTYPE_LEN 4 > -/* enum: Top-level information about the extension. The returned data is an > - * array of key/value pairs using the keys in RFC5013 (Dublin Core) to describe > - * the extension. The data is a back-to-back list of zero-terminated strings; > - * the even-numbered fields (0,2,4,...) are keys and their following odd- > - * numbered fields are the corresponding values. Both keys and values are > - * nominally UTF-8. Per RFC5013, the same key may be repeated any number of > - * times. Note that all information (including the key/value structure itself > - * and the UTF-8 encoding) may have been provided by the plugin author, so > - * callers must be cautious about parsing it. Callers should parse only the > - * top-level structure to separate out the keys and values; the contents of the > - * values is not expected to be machine-readable. > - */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_EXTENSION_KVS 0x0 > -/* Byte position of the data to be returned within the full data block of the > - * given SUBTYPE. > - */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_OFFSET_OFST 8 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_OFFSET_LEN 4 > - > -/* MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT msgresponse */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMIN 4 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMAX 252 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LEN(num) (4+1*(num)) > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_NUM(len) (((len)-4)/1) > -/* Full length of the data block of the requested SUBTYPE, in bytes. */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_TOTAL_SIZE_OFST 0 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_TOTAL_SIZE_LEN 4 > -/* The information requested by SUBTYPE. */ > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_OFST 4 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_LEN 1 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MINNUM 0 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MAXNUM 248 > -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MAXNUM_MCDI2 1016 > - > - > -/***********************************/ > -/* MC_CMD_PLUGIN_GET_META_MSG > - * Returns the simple metadata for a specific plugin request message. This > - * supplies information necessary for the host to know how to build an > - * MC_CMD_PLUGIN_REQ request. > - */ > -#define MC_CMD_PLUGIN_GET_META_MSG 0x1b1 > -#undef MC_CMD_0x1b1_PRIVILEGE_CTG > - > -#define MC_CMD_0x1b1_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_PLUGIN_GET_META_MSG_IN msgrequest */ > -#define MC_CMD_PLUGIN_GET_META_MSG_IN_LEN 8 > -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ > -#define MC_CMD_PLUGIN_GET_META_MSG_IN_HANDLE_OFST 0 > -#define MC_CMD_PLUGIN_GET_META_MSG_IN_HANDLE_LEN 4 > -/* Unique message ID to obtain */ > -#define MC_CMD_PLUGIN_GET_META_MSG_IN_ID_OFST 4 > -#define MC_CMD_PLUGIN_GET_META_MSG_IN_ID_LEN 4 > - > -/* MC_CMD_PLUGIN_GET_META_MSG_OUT msgresponse */ > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_LEN 44 > -/* Unique message ID. This is the same value as the input parameter; it exists > - * to allow future MCDI extensions which enumerate all messages. > - */ > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_ID_OFST 0 > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_ID_LEN 4 > -/* Packed index number of this message, assigned by the MC to give each message > - * a unique ID in an array to allow for more efficient storage/management. > - */ > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_INDEX_OFST 4 > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_INDEX_LEN 4 > -/* Short human-readable codename for this message. This is conventionally > - * formatted as a C identifier in the basic ASCII character set with any spare > - * bytes at the end set to 0, however this convention is not enforced by the MC > - * so consumers must check for all potential malformations before using it for > - * a trusted purpose. > - */ > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_NAME_OFST 8 > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_NAME_LEN 32 > -/* Number of bytes of data which must be passed from the host kernel to the MC > - * for this message's payload, and which are passed back again in the response. > - * The MC's plugin metadata loader will have validated that the number of bytes > - * specified here will fit in to MC_CMD_PLUGIN_REQ_IN_DATA in a single MCDI > - * message. > - */ > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_DATA_SIZE_OFST 40 > -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_DATA_SIZE_LEN 4 > - > -/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe > - * an individual extension. > - */ > -#define PLUGIN_EXTENSION_LEN 20 > -#define PLUGIN_EXTENSION_UUID_OFST 0 > -#define PLUGIN_EXTENSION_UUID_LEN 16 > -#define PLUGIN_EXTENSION_UUID_LBN 0 > -#define PLUGIN_EXTENSION_UUID_WIDTH 128 > -#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16 > -#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1 > -#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128 > -#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8 > -#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136 > -#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1 > -#define PLUGIN_EXTENSION_RESERVED_LBN 137 > -#define PLUGIN_EXTENSION_RESERVED_WIDTH 23 > - > - > -/***********************************/ > -/* MC_CMD_PLUGIN_GET_ALL > - * Returns a list of all plugin extensions currently loaded and available. The > - * UUIDs returned can be passed to MC_CMD_PLUGIN_ALLOC in order to obtain more > - * detailed metadata via the MC_CMD_PLUGIN_GET_META_* family of requests. The > - * ADMIN_GROUP field collects how extensions are grouped in to units which are > - * loaded/unloaded together; extensions with the same value are in the same > - * group. > - */ > -#define MC_CMD_PLUGIN_GET_ALL 0x1b2 > -#undef MC_CMD_0x1b2_PRIVILEGE_CTG > - > -#define MC_CMD_0x1b2_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_PLUGIN_GET_ALL_IN msgrequest */ > -#define MC_CMD_PLUGIN_GET_ALL_IN_LEN 4 > -/* Additional options for querying. Note that if neither FLAG_INCLUDE_ENABLED > - * nor FLAG_INCLUDE_DISABLED are specified then the result set will be empty. > - */ > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAGS_OFST 0 > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAGS_LEN 4 > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_OFST 0 > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_LBN 0 > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_WIDTH 1 > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_OFST 0 > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_LBN 1 > -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_WIDTH 1 > - > -/* MC_CMD_PLUGIN_GET_ALL_OUT msgresponse */ > -#define MC_CMD_PLUGIN_GET_ALL_OUT_LENMIN 0 > -#define MC_CMD_PLUGIN_GET_ALL_OUT_LENMAX 240 > -#define MC_CMD_PLUGIN_GET_ALL_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_PLUGIN_GET_ALL_OUT_LEN(num) (0+20*(num)) > -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_NUM(len) (((len)-0)/20) > -/* The list of available plugin extensions, as an array of PLUGIN_EXTENSION > - * structs. > - */ > -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_OFST 0 > -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_LEN 20 > -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MINNUM 0 > -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MAXNUM 12 > -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MAXNUM_MCDI2 51 > - > - > -/***********************************/ > -/* MC_CMD_PLUGIN_REQ > - * Send a command to a plugin. A plugin may define an arbitrary number of > - * 'messages' which it allows applications on the host system to send, each > - * identified by a 32-bit ID. > - */ > -#define MC_CMD_PLUGIN_REQ 0x1b3 > -#undef MC_CMD_0x1b3_PRIVILEGE_CTG > - > -#define MC_CMD_0x1b3_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_PLUGIN_REQ_IN msgrequest */ > -#define MC_CMD_PLUGIN_REQ_IN_LENMIN 8 > -#define MC_CMD_PLUGIN_REQ_IN_LENMAX 252 > -#define MC_CMD_PLUGIN_REQ_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_PLUGIN_REQ_IN_LEN(num) (8+1*(num)) > -#define MC_CMD_PLUGIN_REQ_IN_DATA_NUM(len) (((len)-8)/1) > -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ > -#define MC_CMD_PLUGIN_REQ_IN_HANDLE_OFST 0 > -#define MC_CMD_PLUGIN_REQ_IN_HANDLE_LEN 4 > -/* Message ID defined by the plugin author */ > -#define MC_CMD_PLUGIN_REQ_IN_ID_OFST 4 > -#define MC_CMD_PLUGIN_REQ_IN_ID_LEN 4 > -/* Data blob being the parameter to the message. This must be of the length > - * specified by MC_CMD_PLUGIN_GET_META_MSG_IN_MCDI_PARAM_SIZE. > - */ > -#define MC_CMD_PLUGIN_REQ_IN_DATA_OFST 8 > -#define MC_CMD_PLUGIN_REQ_IN_DATA_LEN 1 > -#define MC_CMD_PLUGIN_REQ_IN_DATA_MINNUM 0 > -#define MC_CMD_PLUGIN_REQ_IN_DATA_MAXNUM 244 > -#define MC_CMD_PLUGIN_REQ_IN_DATA_MAXNUM_MCDI2 1012 > - > -/* MC_CMD_PLUGIN_REQ_OUT msgresponse */ > -#define MC_CMD_PLUGIN_REQ_OUT_LENMIN 0 > -#define MC_CMD_PLUGIN_REQ_OUT_LENMAX 252 > -#define MC_CMD_PLUGIN_REQ_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_PLUGIN_REQ_OUT_LEN(num) (0+1*(num)) > -#define MC_CMD_PLUGIN_REQ_OUT_DATA_NUM(len) (((len)-0)/1) > -/* The input data, as transformed and/or updated by the plugin's eBPF. Will be > - * the same size as the input DATA parameter. > - */ > -#define MC_CMD_PLUGIN_REQ_OUT_DATA_OFST 0 > -#define MC_CMD_PLUGIN_REQ_OUT_DATA_LEN 1 > -#define MC_CMD_PLUGIN_REQ_OUT_DATA_MINNUM 0 > -#define MC_CMD_PLUGIN_REQ_OUT_DATA_MAXNUM 252 > -#define MC_CMD_PLUGIN_REQ_OUT_DATA_MAXNUM_MCDI2 1020 > - > -/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR > - * space that maps to a contiguous region of TRGT_ADDR space. Addresses > - * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 << > - * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE + > - * TRGT_ADDR_BASE. > - */ > -#define DESC_ADDR_REGION_LEN 32 > -/* The start of the region in DESC_ADDR space. */ > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0 > -#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64 > -/* The start of the region in TRGT_ADDR space. Drivers can set this via > - * MC_CMD_SET_DESC_ADDR_REGIONS. > - */ > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64 > -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64 > -/* The size of the region. */ > -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16 > -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4 > -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128 > -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32 > -/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver > - * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2. > - */ > -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20 > -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4 > -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160 > -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32 > -#define DESC_ADDR_REGION_RSVD_OFST 24 > -#define DESC_ADDR_REGION_RSVD_LEN 8 > -#define DESC_ADDR_REGION_RSVD_LO_OFST 24 > -#define DESC_ADDR_REGION_RSVD_LO_LEN 4 > -#define DESC_ADDR_REGION_RSVD_LO_LBN 192 > -#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32 > -#define DESC_ADDR_REGION_RSVD_HI_OFST 28 > -#define DESC_ADDR_REGION_RSVD_HI_LEN 4 > -#define DESC_ADDR_REGION_RSVD_HI_LBN 224 > -#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32 > -#define DESC_ADDR_REGION_RSVD_LBN 192 > -#define DESC_ADDR_REGION_RSVD_WIDTH 64 > - > - > /***********************************/ > /* MC_CMD_GET_DESC_ADDR_INFO > * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space. > @@ -24835,122 +21899,6 @@ > #define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_GET_BOARD_ATTR > - * Retrieve physical build-level board attributes as configured at > - * manufacturing stage. Fields originate from EEPROM and per-platform constants > - * in firmware. Fields are used in development to identify/ differentiate > - * boards based on build levels/parameters, and also in manufacturing to cross > - * check "what was programmed in manufacturing" is same as "what firmware > - * thinks has been programmed" as there are two layers to translation within > - * firmware before the attributes reach this MCDI handler. Some parameters are > - * retrieved as part of other commands and therefore not replicated here. See > - * GET_VERSION_OUT. > - */ > -#define MC_CMD_GET_BOARD_ATTR 0x1c6 > -#undef MC_CMD_0x1c6_PRIVILEGE_CTG > - > -#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */ > -#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0 > - > -/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */ > -#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16 > -/* Defines board capabilities and validity of attributes returned in this > - * response-message. > - */ > -#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0 > -#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2 > -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4 > -#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4 > -#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4 > -#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0 > -#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4 > -#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4 > -#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16 > -#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8 > -/* enum: The FPGA voltage on the adapter can be set to low */ > -#define MC_CMD_FPGA_VOLTAGE_LOW 0x0 > -/* enum: The FPGA voltage on the adapter can be set to regular */ > -#define MC_CMD_FPGA_VOLTAGE_REG 0x1 > -/* enum: The FPGA voltage on the adapter can be set to high */ > -#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2 > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4 > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24 > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8 > -/* An array of cage types on the board */ > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8 > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1 > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8 > -/* enum: The cages are not known */ > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0 > -/* enum: The cages are SFP/SFP+ */ > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1 > -/* enum: The cages are QSFP/QSFP+ */ > -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2 > - > - > -/***********************************/ > -/* MC_CMD_GET_SOC_STATE > - * Retrieve current state of the System-on-Chip. This command is valid when > - * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set. > - */ > -#define MC_CMD_GET_SOC_STATE 0x1c7 > -#undef MC_CMD_0x1c7_PRIVILEGE_CTG > - > -#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_GET_SOC_STATE_IN msgrequest */ > -#define MC_CMD_GET_SOC_STATE_IN_LEN 0 > - > -/* MC_CMD_GET_SOC_STATE_OUT msgresponse */ > -#define MC_CMD_GET_SOC_STATE_OUT_LEN 12 > -/* Status flags for the SoC */ > -#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0 > -#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4 > -#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0 > -#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0 > -#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1 > -#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0 > -#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1 > -#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1 > -#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0 > -#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2 > -#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1 > -/* Status fields for the SoC */ > -#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4 > -#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4 > -#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4 > -#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0 > -#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8 > -/* enum: Power on (set by SUC on power up) */ > -#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0 > -/* enum: Running bootloader */ > -#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1 > -/* enum: Bootloader has started OS. OS is booting */ > -#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2 > -/* enum: OS is running */ > -#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3 > -/* enum: Maintenance OS is running */ > -#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4 > -/* Number of SoC resets since power on */ > -#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8 > -#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4 > - > - > /***********************************/ > /* MC_CMD_CHECK_SCHEDULER_CREDITS > * For debugging purposes. For each source and destination node in the hardware > @@ -25009,76 +21957,6 @@ > #define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62 > > > -/***********************************/ > -/* MC_CMD_TXQ_STATS > - * Query per-TXQ statistics. > - */ > -#define MC_CMD_TXQ_STATS 0x1d5 > -#undef MC_CMD_0x1d5_PRIVILEGE_CTG > - > -#define MC_CMD_0x1d5_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_TXQ_STATS_IN msgrequest */ > -#define MC_CMD_TXQ_STATS_IN_LEN 8 > -/* Instance of TXQ to retrieve statistics for */ > -#define MC_CMD_TXQ_STATS_IN_INSTANCE_OFST 0 > -#define MC_CMD_TXQ_STATS_IN_INSTANCE_LEN 4 > -/* Flags for the request */ > -#define MC_CMD_TXQ_STATS_IN_FLAGS_OFST 4 > -#define MC_CMD_TXQ_STATS_IN_FLAGS_LEN 4 > -#define MC_CMD_TXQ_STATS_IN_CLEAR_OFST 4 > -#define MC_CMD_TXQ_STATS_IN_CLEAR_LBN 0 > -#define MC_CMD_TXQ_STATS_IN_CLEAR_WIDTH 1 > - > -/* MC_CMD_TXQ_STATS_OUT msgresponse */ > -#define MC_CMD_TXQ_STATS_OUT_LENMIN 0 > -#define MC_CMD_TXQ_STATS_OUT_LENMAX 248 > -#define MC_CMD_TXQ_STATS_OUT_LENMAX_MCDI2 1016 > -#define MC_CMD_TXQ_STATS_OUT_LEN(num) (0+8*(num)) > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_NUM(len) (((len)-0)/8) > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_OFST 0 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LEN 8 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_OFST 0 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LEN 4 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LBN 0 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_WIDTH 32 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_OFST 4 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LEN 4 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LBN 32 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_WIDTH 32 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MINNUM 0 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM 31 > -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM_MCDI2 127 > -#define MC_CMD_TXQ_STATS_CTPIO_MAX_FILL 0x0 /* enum */ > - > -/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are > - * defined in SF-120734-TC with more information in SF-122717-TC. > - */ > -#define FUNCTION_PERSONALITY_LEN 4 > -#define FUNCTION_PERSONALITY_ID_OFST 0 > -#define FUNCTION_PERSONALITY_ID_LEN 4 > -/* enum: Function has no assigned personality */ > -#define FUNCTION_PERSONALITY_NULL 0x0 > -/* enum: Function has an EF100-style function control window and VI windows > - * with both EF100 and vDPA doorbells. > - */ > -#define FUNCTION_PERSONALITY_EF100 0x1 > -/* enum: Function has virtio net device configuration registers and doorbells > - * for virtio queue pairs. > - */ > -#define FUNCTION_PERSONALITY_VIRTIO_NET 0x2 > -/* enum: Function has virtio block device configuration registers and a > - * doorbell for a single virtqueue. > - */ > -#define FUNCTION_PERSONALITY_VIRTIO_BLK 0x3 > -/* enum: Function is a Xilinx acceleration device - management function */ > -#define FUNCTION_PERSONALITY_ACCEL_MGMT 0x4 > -/* enum: Function is a Xilinx acceleration device - user function */ > -#define FUNCTION_PERSONALITY_ACCEL_USR 0x5 > -#define FUNCTION_PERSONALITY_ID_LBN 0 > -#define FUNCTION_PERSONALITY_ID_WIDTH 32 > - > - > /***********************************/ > /* MC_CMD_VIRTIO_GET_FEATURES > * Get a list of the virtio features supported by the device. > @@ -25161,37 +22039,6 @@ > #define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_VIRTIO_GET_CAPABILITIES > - * Get virtio capabilities supported by the device. Returns general virtio > - * capabilities and limitations of the hardware / firmware implementation > - * (hardware device as a whole), rather than that of individual configured > - * virtio devices. At present, only the absolute maximum number of queues > - * allowed on multi-queue devices is returned. Response is expected to be > - * extended as necessary in the future. > - */ > -#define MC_CMD_VIRTIO_GET_CAPABILITIES 0x1d3 > -#undef MC_CMD_0x1d3_PRIVILEGE_CTG > - > -#define MC_CMD_0x1d3_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_VIRTIO_GET_CAPABILITIES_IN msgrequest */ > -#define MC_CMD_VIRTIO_GET_CAPABILITIES_IN_LEN 4 > -/* Type of device to get capabilities for. Matches the device id as defined by > - * the virtio spec. > - */ > -#define MC_CMD_VIRTIO_GET_CAPABILITIES_IN_DEVICE_ID_OFST 0 > -#define MC_CMD_VIRTIO_GET_CAPABILITIES_IN_DEVICE_ID_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_IN/DEVICE_ID */ > - > -/* MC_CMD_VIRTIO_GET_CAPABILITIES_OUT msgresponse */ > -#define MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_LEN 4 > -/* Maximum number of queues supported for a single device instance */ > -#define MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_MAX_QUEUES_OFST 0 > -#define MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_MAX_QUEUES_LEN 4 > - > - > /***********************************/ > /* MC_CMD_VIRTIO_INIT_QUEUE > * Create a virtio virtqueue. Fails with EALREADY if the queue already exists. > @@ -25474,866 +22321,6 @@ > #define PCIE_FUNCTION_INTF_LBN 32 > #define PCIE_FUNCTION_INTF_WIDTH 32 > > -/* QUEUE_ID structuredef: Structure representing an absolute queue identifier > - * (absolute VI number + VI relative queue number). On Keystone, a VI can > - * contain multiple queues (at present, up to 2), each with separate controls > - * for direction. This structure is required to uniquely identify the absolute > - * source queue for descriptor proxy functions. > - */ > -#define QUEUE_ID_LEN 4 > -/* Absolute VI number */ > -#define QUEUE_ID_ABS_VI_OFST 0 > -#define QUEUE_ID_ABS_VI_LEN 2 > -#define QUEUE_ID_ABS_VI_LBN 0 > -#define QUEUE_ID_ABS_VI_WIDTH 16 > -/* Relative queue number within the VI */ > -#define QUEUE_ID_REL_QUEUE_LBN 16 > -#define QUEUE_ID_REL_QUEUE_WIDTH 1 > -#define QUEUE_ID_RESERVED_LBN 17 > -#define QUEUE_ID_RESERVED_WIDTH 15 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_CREATE > - * Descriptor proxy functions are abstract devices that forward all request > - * submitted to the host PCIe function (descriptors submitted to Virtio or > - * EF100 queues) to be handled on another function (most commonly on the > - * embedded Application Processor), via EF100 descriptor proxy, memory-to- > - * memory and descriptor-to-completion mechanisms. Primary user is Virtio-blk > - * subsystem, see SF-122927-TC. This function allocates a new descriptor proxy > - * function on the host and assigns a user-defined label. The actual function > - * configuration is not persisted until the caller configures it with > - * MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN and commits with > - * MC_CMD_DESC_PROXY_FUNC_COMMIT_IN. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172 > -#undef MC_CMD_0x172_PRIVILEGE_CTG > - > -#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_CREATE_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LEN 52 > -/* PCIe Function ID to allocate (as struct PCIE_FUNCTION). Set to > - * {PF_ANY,VF_ANY,interface} for "any available function" Set to > - * {PF_ANY,VF_NULL,interface} for "any available PF" > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4 > -/* The personality to set. The meanings of the personalities are defined in > - * SF-120734-TC with more information in SF-122717-TC. At present, we only > - * support proxying for VIRTIO_BLK > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_PERSONALITY_OFST 8 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_PERSONALITY_LEN 4 > -/* Enum values, see field(s): */ > -/* FUNCTION_PERSONALITY/ID */ > -/* User-defined label (zero-terminated ASCII string) to uniquely identify the > - * function > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LABEL_OFST 12 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LABEL_LEN 40 > - > -/* MC_CMD_DESC_PROXY_FUNC_CREATE_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_LEN 12 > -/* Handle to the descriptor proxy function */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_HANDLE_LEN 4 > -/* Allocated function ID (as struct PCIE_FUNCTION) */ > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8 > -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_DESTROY > - * Remove an existing descriptor proxy function. Underlying function > - * personality and configuration reverts back to factory default. Function > - * configuration is committed immediately to specified store and any function > - * ownership is released. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173 > -#undef MC_CMD_0x173_PRIVILEGE_CTG > - > -#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_DESTROY_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LEN 44 > -/* User-defined label (zero-terminated ASCII string) to uniquely identify the > - * function > - */ > -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LABEL_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LABEL_LEN 40 > -/* Store from which to remove function configuration */ > -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_STORE_OFST 40 > -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_STORE_LEN 4 > -/* Enum values, see field(s): */ > -/* MC_CMD_DESC_PROXY_FUNC_COMMIT/MC_CMD_DESC_PROXY_FUNC_COMMIT_IN/STORE */ > - > -/* MC_CMD_DESC_PROXY_FUNC_DESTROY_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_OUT_LEN 0 > - > -/* VIRTIO_BLK_CONFIG structuredef: Virtio block device configuration. See > - * Virtio specification v1.1, Sections 5.2.3 and 6 for definition of feature > - * bits. See Virtio specification v1.1, Section 5.2.4 (struct > - * virtio_blk_config) for definition of remaining configuration fields > - */ > -#define VIRTIO_BLK_CONFIG_LEN 68 > -/* Virtio block device features to advertise, per Virtio 1.1, 5.2.3 and 6 */ > -#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0 > -#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8 > -#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0 > -#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4 > -#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0 > -#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32 > -#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4 > -#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4 > -#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32 > -#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_LBN 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_LBN 2 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_LBN 4 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_LBN 5 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_LBN 6 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_LBN 7 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_LBN 9 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_LBN 10 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_LBN 11 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_LBN 12 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_LBN 13 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_LBN 14 > -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_LBN 28 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_LBN 29 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_LBN 32 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_LBN 33 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_LBN 34 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_LBN 35 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_LBN 36 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_LBN 37 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_OFST 0 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_LBN 38 > -#define VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_WIDTH 1 > -#define VIRTIO_BLK_CONFIG_FEATURES_LBN 0 > -#define VIRTIO_BLK_CONFIG_FEATURES_WIDTH 64 > -/* The capacity of the device (expressed in 512-byte sectors) */ > -#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8 > -#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8 > -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8 > -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4 > -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64 > -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32 > -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12 > -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4 > -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96 > -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32 > -#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64 > -#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64 > -/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is > - * set. > - */ > -#define VIRTIO_BLK_CONFIG_SIZE_MAX_OFST 16 > -#define VIRTIO_BLK_CONFIG_SIZE_MAX_LEN 4 > -#define VIRTIO_BLK_CONFIG_SIZE_MAX_LBN 128 > -#define VIRTIO_BLK_CONFIG_SIZE_MAX_WIDTH 32 > -/* Maximum number of segments in a request. Only valid when > - * VIRTIO_BLK_F_SEG_MAX is set. > - */ > -#define VIRTIO_BLK_CONFIG_SEG_MAX_OFST 20 > -#define VIRTIO_BLK_CONFIG_SEG_MAX_LEN 4 > -#define VIRTIO_BLK_CONFIG_SEG_MAX_LBN 160 > -#define VIRTIO_BLK_CONFIG_SEG_MAX_WIDTH 32 > -/* Disk-style geometry - cylinders. Only valid when VIRTIO_BLK_F_GEOMETRY is > - * set. > - */ > -#define VIRTIO_BLK_CONFIG_CYLINDERS_OFST 24 > -#define VIRTIO_BLK_CONFIG_CYLINDERS_LEN 2 > -#define VIRTIO_BLK_CONFIG_CYLINDERS_LBN 192 > -#define VIRTIO_BLK_CONFIG_CYLINDERS_WIDTH 16 > -/* Disk-style geometry - heads. Only valid when VIRTIO_BLK_F_GEOMETRY is set. > - */ > -#define VIRTIO_BLK_CONFIG_HEADS_OFST 26 > -#define VIRTIO_BLK_CONFIG_HEADS_LEN 1 > -#define VIRTIO_BLK_CONFIG_HEADS_LBN 208 > -#define VIRTIO_BLK_CONFIG_HEADS_WIDTH 8 > -/* Disk-style geometry - sectors. Only valid when VIRTIO_BLK_F_GEOMETRY is set. > - */ > -#define VIRTIO_BLK_CONFIG_SECTORS_OFST 27 > -#define VIRTIO_BLK_CONFIG_SECTORS_LEN 1 > -#define VIRTIO_BLK_CONFIG_SECTORS_LBN 216 > -#define VIRTIO_BLK_CONFIG_SECTORS_WIDTH 8 > -/* Block size of disk. Only valid when VIRTIO_BLK_F_BLK_SIZE is set. */ > -#define VIRTIO_BLK_CONFIG_BLK_SIZE_OFST 28 > -#define VIRTIO_BLK_CONFIG_BLK_SIZE_LEN 4 > -#define VIRTIO_BLK_CONFIG_BLK_SIZE_LBN 224 > -#define VIRTIO_BLK_CONFIG_BLK_SIZE_WIDTH 32 > -/* Block topology - number of logical blocks per physical block (log2). Only > - * valid when VIRTIO_BLK_F_TOPOLOGY is set. > - */ > -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_OFST 32 > -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_LEN 1 > -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_LBN 256 > -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_WIDTH 8 > -/* Block topology - offset of first aligned logical block. Only valid when > - * VIRTIO_BLK_F_TOPOLOGY is set. > - */ > -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_OFST 33 > -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_LEN 1 > -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_LBN 264 > -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_WIDTH 8 > -/* Block topology - suggested minimum I/O size in blocks. Only valid when > - * VIRTIO_BLK_F_TOPOLOGY is set. > - */ > -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_OFST 34 > -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_LEN 2 > -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_LBN 272 > -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_WIDTH 16 > -/* Block topology - optimal (suggested maximum) I/O size in blocks. Only valid > - * when VIRTIO_BLK_F_TOPOLOGY is set. > - */ > -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_OFST 36 > -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_LEN 4 > -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_LBN 288 > -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_WIDTH 32 > -/* Unused, set to zero. Note that virtio_blk_config.writeback is volatile and > - * not carried in config data. > - */ > -#define VIRTIO_BLK_CONFIG_UNUSED0_OFST 40 > -#define VIRTIO_BLK_CONFIG_UNUSED0_LEN 2 > -#define VIRTIO_BLK_CONFIG_UNUSED0_LBN 320 > -#define VIRTIO_BLK_CONFIG_UNUSED0_WIDTH 16 > -/* Number of queues. Only valid if the VIRTIO_BLK_F_MQ feature is negotiated. > - */ > -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_OFST 42 > -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_LEN 2 > -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_LBN 336 > -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_WIDTH 16 > -/* Maximum discard sectors size, in 512-byte units. Only valid if > - * VIRTIO_BLK_F_DISCARD is set. > - */ > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_OFST 44 > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_LEN 4 > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_LBN 352 > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_WIDTH 32 > -/* Maximum discard segment number. Only valid if VIRTIO_BLK_F_DISCARD is set. > - */ > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_OFST 48 > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_LEN 4 > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_LBN 384 > -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_WIDTH 32 > -/* Discard sector alignment, in 512-byte units. Only valid if > - * VIRTIO_BLK_F_DISCARD is set. > - */ > -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_OFST 52 > -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_LEN 4 > -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_LBN 416 > -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_WIDTH 32 > -/* Maximum write zeroes sectors size, in 512-byte units. Only valid if > - * VIRTIO_BLK_F_WRITE_ZEROES is set. > - */ > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_OFST 56 > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_LEN 4 > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_LBN 448 > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_WIDTH 32 > -/* Maximum write zeroes segment number. Only valid if VIRTIO_BLK_F_WRITE_ZEROES > - * is set. > - */ > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_OFST 60 > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_LEN 4 > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_LBN 480 > -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_WIDTH 32 > -/* Write zeroes request can result in deallocating one or more sectors. Only > - * valid if VIRTIO_BLK_F_WRITE_ZEROES is set. > - */ > -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_OFST 64 > -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_LEN 1 > -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_LBN 512 > -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_WIDTH 8 > -/* Unused, set to zero. */ > -#define VIRTIO_BLK_CONFIG_UNUSED1_OFST 65 > -#define VIRTIO_BLK_CONFIG_UNUSED1_LEN 3 > -#define VIRTIO_BLK_CONFIG_UNUSED1_LBN 520 > -#define VIRTIO_BLK_CONFIG_UNUSED1_WIDTH 24 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET > - * Set configuration for an existing descriptor proxy function. Configuration > - * data must match function personality. The actual function configuration is > - * not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174 > -#undef MC_CMD_0x174_PRIVILEGE_CTG > - > -#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMIN 20 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMAX 252 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LEN(num) (20+1*(num)) > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_NUM(len) (((len)-20)/1) > -/* Handle to descriptor proxy function (as returned by > - * MC_CMD_DESC_PROXY_FUNC_OPEN) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_HANDLE_LEN 4 > -/* Reserved for future extension, set to zero. */ > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_RESERVED_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_RESERVED_LEN 16 > -/* Configuration data. Format of configuration data is determined implicitly > - * from function personality referred to by HANDLE. Currently, only supported > - * format is VIRTIO_BLK_CONFIG. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_OFST 20 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_LEN 1 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MINNUM 0 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MAXNUM 232 > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MAXNUM_MCDI2 1000 > - > -/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_COMMIT > - * Commit function configuration to non-volatile or volatile store. Once > - * configuration is applied to hardware (which may happen immediately or on > - * next function/device reset) a DESC_PROXY_FUNC_CONFIG_SET MCDI event will be > - * delivered to callers MCDI event queue. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175 > -#undef MC_CMD_0x175_PRIVILEGE_CTG > - > -#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_LEN 8 > -/* Handle to descriptor proxy function (as returned by > - * MC_CMD_DESC_PROXY_FUNC_OPEN) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_HANDLE_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_STORE_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_STORE_LEN 4 > -/* enum: Store into non-volatile (dynamic) config */ > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_NON_VOLATILE 0x0 > -/* enum: Store into volatile (ephemeral) config */ > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_VOLATILE 0x1 > - > -/* MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_LEN 4 > -/* Generation count to be delivered in an event once configuration becomes live > - */ > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_CONFIG_GENERATION_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_CONFIG_GENERATION_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_OPEN > - * Retrieve a handle for an existing descriptor proxy function. Returns an > - * integer handle, valid until function is deallocated, MC rebooted or power- > - * cycle. Returns ENODEV if no function with given label exists. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176 > -#undef MC_CMD_0x176_PRIVILEGE_CTG > - > -#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_OPEN_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LEN 40 > -/* User-defined label (zero-terminated ASCII string) to uniquely identify the > - * function > - */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LABEL_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LABEL_LEN 40 > - > -/* MC_CMD_DESC_PROXY_FUNC_OPEN_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMIN 40 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMAX 252 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LEN(num) (40+1*(num)) > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_NUM(len) (((len)-40)/1) > -/* Handle to the descriptor proxy function */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_HANDLE_LEN 4 > -/* PCIe Function ID (as struct PCIE_FUNCTION) */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4 > -/* Function personality */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4 > -/* Enum values, see field(s): */ > -/* FUNCTION_PERSONALITY/ID */ > -/* Function configuration state */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_STATUS_OFST 16 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_STATUS_LEN 4 > -/* enum: Function configuration is visible to the host (live) */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LIVE 0x0 > -/* enum: Function configuration is pending reset */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PENDING 0x1 > -/* enum: Function configuration is missing (created, but no configuration > - * committed) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_UNCONFIGURED 0x2 > -/* Generation count to be delivered in an event once the configuration becomes > - * live (if status is "pending") > - */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_GENERATION_OFST 20 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_GENERATION_LEN 4 > -/* Reserved for future extension, set to zero. */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_RESERVED_OFST 24 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_RESERVED_LEN 16 > -/* Configuration data corresponding to function personality. Currently, only > - * supported format is VIRTIO_BLK_CONFIG. Not valid if status is UNCONFIGURED. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_OFST 40 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_LEN 1 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MINNUM 0 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MAXNUM 212 > -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MAXNUM_MCDI2 980 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_CLOSE > - * Releases a handle for an open descriptor proxy function. If proxying was > - * enabled on the device, the caller is expected to gracefully stop it using > - * MC_CMD_DESC_PROXY_FUNC_DISABLE prior to calling this function. Closing an > - * active device without disabling proxying will result in forced close, which > - * will put the device into a failed state and signal the host driver of the > - * error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1 > -#undef MC_CMD_0x1a1_PRIVILEGE_CTG > - > -#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_CLOSE_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_LEN 4 > -/* Handle to the descriptor proxy function */ > -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_HANDLE_LEN 4 > - > -/* MC_CMD_DESC_PROXY_FUNC_CLOSE_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_OUT_LEN 0 > - > -/* DESC_PROXY_FUNC_MAP structuredef */ > -#define DESC_PROXY_FUNC_MAP_LEN 52 > -/* PCIe function ID (as struct PCIE_FUNCTION) */ > -#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0 > -#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8 > -#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0 > -#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4 > -#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0 > -#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32 > -#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4 > -#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4 > -#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32 > -#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32 > -#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0 > -#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64 > -#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0 > -#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2 > -#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0 > -#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16 > -#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2 > -#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2 > -#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16 > -#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16 > -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4 > -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4 > -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32 > -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32 > -/* Function personality */ > -#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8 > -#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4 > -/* Enum values, see field(s): */ > -/* FUNCTION_PERSONALITY/ID */ > -#define DESC_PROXY_FUNC_MAP_PERSONALITY_LBN 64 > -#define DESC_PROXY_FUNC_MAP_PERSONALITY_WIDTH 32 > -/* User-defined label (zero-terminated ASCII string) to uniquely identify the > - * function > - */ > -#define DESC_PROXY_FUNC_MAP_LABEL_OFST 12 > -#define DESC_PROXY_FUNC_MAP_LABEL_LEN 40 > -#define DESC_PROXY_FUNC_MAP_LABEL_LBN 96 > -#define DESC_PROXY_FUNC_MAP_LABEL_WIDTH 320 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_ENUM > - * Enumerate existing descriptor proxy functions > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177 > -#undef MC_CMD_0x177_PRIVILEGE_CTG > - > -#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_ENUM_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_IN_LEN 4 > -/* Starting index, set to 0 on first request. See > - * MC_CMD_DESC_PROXY_FUNC_ENUM_OUT/FLAGS. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_IN_START_IDX_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_IN_START_IDX_LEN 4 > - > -/* MC_CMD_DESC_PROXY_FUNC_ENUM_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMIN 4 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMAX 212 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMAX_MCDI2 992 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LEN(num) (4+52*(num)) > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_NUM(len) (((len)-4)/52) > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FLAGS_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FLAGS_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_LBN 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_WIDTH 1 > -/* Function map, as array of DESC_PROXY_FUNC_MAP */ > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_LEN 52 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MINNUM 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM 4 > -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM_MCDI2 19 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_ENABLE > - * Enable descriptor proxying for function into target event queue. Returns VI > - * allocation info for the proxy source function, so that the caller can map > - * absolute VI IDs from descriptor proxy events back to the originating > - * function. This is a legacy function that only supports single queue proxy > - * devices. It is also limited in that it can only be called after host driver > - * attach (once VI allocation is known) and will return MC_CMD_ERR_ENOTCONN > - * otherwise. For new code, see MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE which > - * supports multi-queue devices and has no dependency on host driver attach. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178 > -#undef MC_CMD_0x178_PRIVILEGE_CTG > - > -#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_LEN 8 > -/* Handle to descriptor proxy function (as returned by > - * MC_CMD_DESC_PROXY_FUNC_OPEN) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_HANDLE_LEN 4 > -/* Descriptor proxy sink queue (caller function relative). Must be extended > - * width event queue > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_TARGET_EVQ_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_TARGET_EVQ_LEN 4 > - > -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_LEN 8 > -/* The number of VIs allocated on the function */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_COUNT_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_COUNT_LEN 4 > -/* The base absolute VI number allocated to the function. */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_BASE_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_BASE_LEN 4 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE > - * Enable descriptor proxying for a source queue on a host function into target > - * event queue. Source queue number is a relative virtqueue number on the > - * source function (0 to max_virtqueues-1). For a multi-queue device, the > - * caller must enable all source queues individually. To retrieve absolute VI > - * information for the source function (so that VI IDs from descriptor proxy > - * events can be mapped back to source function / queue) see > - * MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE 0x1d0 > -#undef MC_CMD_0x1d0_PRIVILEGE_CTG > - > -#define MC_CMD_0x1d0_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_LEN 12 > -/* Handle to descriptor proxy function (as returned by > - * MC_CMD_DESC_PROXY_FUNC_OPEN) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_HANDLE_LEN 4 > -/* Source relative queue number to enable proxying on */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_SOURCE_QUEUE_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_SOURCE_QUEUE_LEN 4 > -/* Descriptor proxy sink queue (caller function relative). Must be extended > - * width event queue > - */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_TARGET_EVQ_OFST 8 > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_TARGET_EVQ_LEN 4 > - > -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_DISABLE > - * Disable descriptor proxying for function. For multi-queue functions, > - * disables all queues. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179 > -#undef MC_CMD_0x179_PRIVILEGE_CTG > - > -#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_LEN 4 > -/* Handle to descriptor proxy function (as returned by > - * MC_CMD_DESC_PROXY_FUNC_OPEN) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_HANDLE_LEN 4 > - > -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE > - * Disable descriptor proxying for a specific source queue on a function. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE 0x1d1 > -#undef MC_CMD_0x1d1_PRIVILEGE_CTG > - > -#define MC_CMD_0x1d1_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_LEN 8 > -/* Handle to descriptor proxy function (as returned by > - * MC_CMD_DESC_PROXY_FUNC_OPEN) > - */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_HANDLE_LEN 4 > -/* Source relative queue number to disable proxying on */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_SOURCE_QUEUE_OFST 4 > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_SOURCE_QUEUE_LEN 4 > - > -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_OUT_LEN 0 > - > - > -/***********************************/ > -/* MC_CMD_DESC_PROXY_GET_VI_INFO > - * Returns absolute VI allocation information for the descriptor proxy source > - * function referenced by HANDLE, so that the caller can map absolute VI IDs > - * from descriptor proxy events back to the originating function and queue. The > - * call is only valid after the host driver for the source function has > - * attached (after receiving a driver attach event for the descriptor proxy > - * function) and will fail with ENOTCONN otherwise. > - */ > -#define MC_CMD_DESC_PROXY_GET_VI_INFO 0x1d2 > -#undef MC_CMD_0x1d2_PRIVILEGE_CTG > - > -#define MC_CMD_0x1d2_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_DESC_PROXY_GET_VI_INFO_IN msgrequest */ > -#define MC_CMD_DESC_PROXY_GET_VI_INFO_IN_LEN 4 > -/* Handle to descriptor proxy function (as returned by > - * MC_CMD_DESC_PROXY_FUNC_OPEN) > - */ > -#define MC_CMD_DESC_PROXY_GET_VI_INFO_IN_HANDLE_OFST 0 > -#define MC_CMD_DESC_PROXY_GET_VI_INFO_IN_HANDLE_LEN 4 > - > -/* MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT msgresponse */ > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMIN 0 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMAX 252 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LEN(num) (0+4*(num)) > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_NUM(len) (((len)-0)/4) > -/* VI information (VI ID + VI relative queue number) for each of the source > - * queues (in order from 0 to max_virtqueues-1), as array of QUEUE_ID > - * structures. > - */ > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_LEN 4 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MINNUM 0 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM 63 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM_MCDI2 255 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_OFST 0 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_LEN 2 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_LBN 16 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_WIDTH 1 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_RESERVED_LBN 17 > -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_RESERVED_WIDTH 15 > - > - > -/***********************************/ > -/* MC_CMD_GET_ADDR_SPC_ID > - * Get Address space identifier for use in mem2mem descriptors for a given > - * target. See SF-120734-TC for details on ADDR_SPC_IDs and mem2mem > - * descriptors. > - */ > -#define MC_CMD_GET_ADDR_SPC_ID 0x1a0 > -#undef MC_CMD_0x1a0_PRIVILEGE_CTG > - > -#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN > - > -/* MC_CMD_GET_ADDR_SPC_ID_IN msgrequest */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_LEN 16 > -/* Resource type to get ADDR_SPC_ID for */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_TYPE_OFST 0 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_TYPE_LEN 4 > -/* enum: Address space ID for host/AP memory DMA over the same interface this > - * MCDI was called on > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_SELF 0x0 > -/* enum: Address space ID for host/AP memory DMA via PCI interface and function > - * specified by FUNC > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_PCI_FUNC 0x1 > -/* enum: Address space ID for host/AP memory DMA via PCI interface and function > - * specified by FUNC with PASID value specified by PASID > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_PCI_FUNC_PASID 0x2 > -/* enum: Address space ID for host/AP memory DMA via PCI interface and function > - * specified by FUNC with PASID value of relative VI specified by VI > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_REL_VI 0x3 > -/* enum: Address space ID for host/AP memory DMA via PCI interface, function > - * and PASID value of absolute VI specified by VI > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_ABS_VI 0x4 > -/* enum: Address space ID for host memory DMA via PCI interface and function of > - * descriptor proxy function specified by HANDLE > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_DESC_PROXY_HANDLE 0x5 > -/* enum: Address space ID for DMA to/from MC memory */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_MC_MEM 0x6 > -/* enum: Address space ID for DMA to/from other SmartNIC memory (on-chip, DDR) > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_NIC_MEM 0x7 > -/* PCIe Function ID (as struct PCIE_FUNCTION). Only valid if TYPE is PCI_FUNC, > - * PCI_FUNC_PASID or REL_VI. > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4 > -/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4 > -/* Relative or absolute VI number. Only valid if TYPE is REL_VI or ABS_VI */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_VI_OFST 12 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_VI_LEN 4 > -/* Descriptor proxy function handle. Only valid if TYPE is DESC_PROXY_HANDLE. > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_IN_HANDLE_OFST 4 > -#define MC_CMD_GET_ADDR_SPC_ID_IN_HANDLE_LEN 4 > - > -/* MC_CMD_GET_ADDR_SPC_ID_OUT msgresponse */ > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_LEN 8 > -/* Address Space ID for the requested target. Only the lower 36 bits are valid > - * in the current SmartNIC implementation. > - */ > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32 > -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32 > - > > /***********************************/ > /* MC_CMD_GET_CLIENT_HANDLE > @@ -26359,7 +22346,8 @@ > * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or > * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer > * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a > - * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF > + * VF on the calling interface - INTF=..., PF=PF_NULL, VF=VF_NULL to refer to > + * the named interface itself - INTF=..., PF=..., VF=VF_NULL to refer to a PF > * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named > * interface where ... refers to a small integer for the VF/PF fields, and to > * values from the PCIE_INTERFACE enum for for the INTF field. It's only > @@ -26380,6 +22368,7 @@ > * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER. > */ > #define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff > +/* See structuredef: PCIE_FUNCTION */ > #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4 > #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2 > #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6 > @@ -27350,7 +23339,7 @@ > /* MAE_MPORT_SELECTOR structuredef: MPORTS are identified by an opaque unsigned > * integer value (mport_id) that is guaranteed to be representable within > * 32-bits or within any NIC interface field that needs store the value > - * (whichever is narrowers). This selector structure provides a stable way to > + * (whichever is narrower). This selector structure provides a stable way to > * refer to m-ports. > */ > #define MAE_MPORT_SELECTOR_LEN 4 > @@ -27425,10 +23414,22 @@ > #define MAE_MPORT_SELECTOR_FLAT_WIDTH 32 > > /* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or > - * virtual network port by MAE port and link end > + * virtual network port by MAE port and link end. Intended to be used by > + * network port MCDI commands. Setting FLAT to MAE_LINK_ENDPOINT_COMPAT is > + * equivalent to using the previous version of the command. Not all possible > + * combinations of MPORT_END and MPORT_SELECTOR in MAE_LINK_ENDPOINT_SELECTOR > + * will work in all circumstances. 1. Some will always work (e.g. a VF can > + * always address its logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), > + * 2. Some are not meaningful and will always fail with EINVAL (e.g. attempting > + * to address the VNIC end of a link to a physical port), 3. Some are > + * meaningful but require the MCDI client to have the required permission and > + * fail with EPERM otherwise (e.g. trying to set the MAC on a VF the caller > + * cannot administer), and 4. Some could be implementation-specific and fail > + * with ENOTSUP if not available (no examples exist right now). See > + * SF-123581-TC section 4.3 for more details. > */ > #define MAE_LINK_ENDPOINT_SELECTOR_LEN 8 > -/* The MAE MPORT of interest */ > +/* Identifier for the MAE MPORT of interest */ > #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0 > #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4 > #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0 > @@ -27829,6 +23830,8 @@ > #define MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_MAXNUM_MCDI2 253 > /* enum: A counter ID that is guaranteed never to represent a real counter */ > #define MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_NULL 0xffffffff > +/* Other enum values, see field(s): */ > +/* MAE_COUNTER_ID */ > > > /***********************************/ > @@ -28266,6 +24269,24 @@ > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0 > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14 > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_LBN 15 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_LBN 16 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_LBN 18 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_LBN 19 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_LBN 20 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_WIDTH 1 > /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4 > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2 > @@ -28291,19 +24312,23 @@ > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_OFST 20 > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_LEN 4 > /* Allows an action set to trigger several counter updates. Set to > - * COUNTER_LIST_ID_NULL to request no counter action. > + * MAE_COUNTER_ID_NULL to request no counter action. > */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_OFST 24 > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_LEN 4 > +/* Enum values, see field(s): */ > +/* MAE_COUNTER_ID */ > /* If a driver only wished to update one counter within this action set, then > * it can supply a COUNTER_ID instead of allocating a single-element counter > * list. The ID must have been allocated with COUNTER_TYPE=AR. This field > - * should be set to COUNTER_ID_NULL if this behaviour is not required. It is > - * not valid to supply a non-NULL value for both COUNTER_LIST_ID and > + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It > + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and > * COUNTER_ID. > */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_OFST 28 > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_LEN 4 > +/* Enum values, see field(s): */ > +/* MAE_COUNTER_ID */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_OFST 32 > #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_LEN 4 > /* Set to MAC_ID_NULL to request no source MAC replacement. */ > @@ -28347,6 +24372,24 @@ > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_LBN 15 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_LBN 16 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_LBN 18 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_LBN 19 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_LBN 20 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_WIDTH 1 > /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2 > @@ -28372,19 +24415,23 @@ > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4 > /* Allows an action set to trigger several counter updates. Set to > - * COUNTER_LIST_ID_NULL to request no counter action. > + * MAE_COUNTER_ID_NULL to request no counter action. > */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4 > +/* Enum values, see field(s): */ > +/* MAE_COUNTER_ID */ > /* If a driver only wished to update one counter within this action set, then > * it can supply a COUNTER_ID instead of allocating a single-element counter > * list. The ID must have been allocated with COUNTER_TYPE=AR. This field > - * should be set to COUNTER_ID_NULL if this behaviour is not required. It is > - * not valid to supply a non-NULL value for both COUNTER_LIST_ID and > + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It > + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and > * COUNTER_ID. > */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4 > +/* Enum values, see field(s): */ > +/* MAE_COUNTER_ID */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4 > /* Set to MAC_ID_NULL to request no source MAC replacement. */ > @@ -28437,6 +24484,172 @@ > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6 > #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1 > > +/* MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN msgrequest: Only supported if > + * MAE_ACTION_SET_ALLOC_V3_SUPPORTED is advertised in > + * MC_CMD_GET_CAPABILITIES_V10_OUT. > + */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LEN 53 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_LEN 4 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_LBN 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_WIDTH 2 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_LBN 4 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_WIDTH 2 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_LBN 8 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_LBN 9 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_LBN 10 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_LBN 11 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_LBN 12 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_LBN 13 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_LBN 14 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_LBN 15 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_LBN 16 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_LBN 18 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_LBN 19 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_OFST 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_LBN 20 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_WIDTH 1 > +/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_OFST 4 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_LEN 2 > +/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_OFST 6 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_LEN 2 > +/* If VLAN_PUSH == 2, inner TCI value to be inserted. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_OFST 8 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_LEN 2 > +/* If VLAN_PUSH == 2, inner TPID value to be inserted. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_OFST 10 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_LEN 2 > +/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_OFST 12 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_LEN 4 > +/* Set to ENCAP_HEADER_ID_NULL to request no encap action */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_OFST 16 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_LEN 4 > +/* An m-port selector identifying the m-port that the modified packet should be > + * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the > + * packet. > + */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_OFST 20 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_LEN 4 > +/* Allows an action set to trigger several counter updates. Set to > + * MAE_COUNTER_ID_NULL to request no counter action. > + */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_OFST 24 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_LEN 4 > +/* Enum values, see field(s): */ > +/* MAE_COUNTER_ID */ > +/* If a driver only wished to update one counter within this action set, then > + * it can supply a COUNTER_ID instead of allocating a single-element counter > + * list. The ID must have been allocated with COUNTER_TYPE=AR. This field > + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It > + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and > + * COUNTER_ID. > + */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_OFST 28 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_LEN 4 > +/* Enum values, see field(s): */ > +/* MAE_COUNTER_ID */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_OFST 32 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_LEN 4 > +/* Set to MAC_ID_NULL to request no source MAC replacement. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_OFST 36 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_LEN 4 > +/* Set to MAC_ID_NULL to request no destination MAC replacement. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_OFST 40 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_LEN 4 > +/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_OFST 44 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_LEN 4 > +/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits > + * within IPv4 and IPv6 headers. > + */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_OFST 48 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_LEN 2 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_OFST 48 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_LBN 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_OFST 48 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_LBN 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_OFST 48 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_LBN 2 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_OFST 48 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_LBN 3 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_WIDTH 6 > +/* Actions for modifying the Explicit Congestion Notification (ECN) bits within > + * IPv4 and IPv6 headers. > + */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_OFST 50 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_LEN 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_OFST 50 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_LBN 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_OFST 50 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_LBN 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_OFST 50 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_LBN 2 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_OFST 50 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_LBN 3 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_WIDTH 2 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_OFST 50 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_LBN 5 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_OFST 50 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_LBN 6 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_WIDTH 1 > +/* Actions for overwriting CH_ROUTE subfields. */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_OFST 51 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_LEN 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_OFST 51 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_LBN 0 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_OFST 51 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_LBN 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_OFST 51 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_LBN 2 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_WIDTH 1 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_OFST 51 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_LBN 3 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_WIDTH 1 > +/* Override outgoing CH_VC to network port for DO_SET_NET_CHAN action. Cannot > + * be used in conjunction with DO_SET_SRC_MPORT action. > + */ > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_OFST 52 > +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_LEN 1 > + > /* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */ > #define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4 > /* The MSB of the AS_ID is guaranteed to be clear if the ID is not > @@ -28680,58 +24893,6 @@ > #define MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM 32 > #define MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM_MCDI2 32 > > - > -/***********************************/ > -/* MC_CMD_MAE_OUTER_RULE_UPDATE > - * Atomically change the response of an Outer Rule. > - */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE 0x17d > -#undef MC_CMD_0x17d_PRIVILEGE_CTG > - > -#define MC_CMD_0x17d_PRIVILEGE_CTG SRIOV_CTG_MAE > - > -/* MC_CMD_MAE_OUTER_RULE_UPDATE_IN msgrequest */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_LEN 16 > -/* ID of outer rule to update */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_OFST 0 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_LEN 4 > -/* Packets matching the rule will be parsed with this encapsulation. */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_OFST 4 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_LEN 4 > -/* Enum values, see field(s): */ > -/* MAE_MCDI_ENCAP_TYPE */ > -/* This field controls the actions that are performed when a rule is hit. */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_OFST 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_LEN 4 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_OFST 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_LBN 0 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_WIDTH 1 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_OFST 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_LBN 1 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_WIDTH 2 > -/* Enum values, see field(s): */ > -/* MAE_CT_VNI_MODE */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_OFST 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_LBN 3 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_WIDTH 1 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_OFST 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_LBN 4 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_WIDTH 1 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_OFST 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_LBN 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_WIDTH 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_OFST 8 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_LBN 16 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_WIDTH 16 > -/* ID of counter to increment when the rule is hit. Only used if the DO_COUNT > - * flag is set. The ID must have been allocated with COUNTER_TYPE=OR. > - */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_OFST 12 > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_LEN 4 > - > -/* MC_CMD_MAE_OUTER_RULE_UPDATE_OUT msgresponse */ > -#define MC_CMD_MAE_OUTER_RULE_UPDATE_OUT_LEN 0 > - > /* MAE_ACTION_RULE_RESPONSE structuredef */ > #define MAE_ACTION_RULE_RESPONSE_LEN 16 > #define MAE_ACTION_RULE_RESPONSE_ASL_ID_OFST 0 > @@ -29122,142 +25283,6 @@ > #define MAE_MPORT_DESC_VNIC_PLUGIN_TBD_LBN 352 > #define MAE_MPORT_DESC_VNIC_PLUGIN_TBD_WIDTH 32 > > -/* MAE_MPORT_DESC_V2 structuredef */ > -#define MAE_MPORT_DESC_V2_LEN 56 > -#define MAE_MPORT_DESC_V2_MPORT_ID_OFST 0 > -#define MAE_MPORT_DESC_V2_MPORT_ID_LEN 4 > -#define MAE_MPORT_DESC_V2_MPORT_ID_LBN 0 > -#define MAE_MPORT_DESC_V2_MPORT_ID_WIDTH 32 > -/* Reserved for future purposes, contains information independent of caller */ > -#define MAE_MPORT_DESC_V2_FLAGS_OFST 4 > -#define MAE_MPORT_DESC_V2_FLAGS_LEN 4 > -#define MAE_MPORT_DESC_V2_FLAGS_LBN 32 > -#define MAE_MPORT_DESC_V2_FLAGS_WIDTH 32 > -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_OFST 8 > -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_LEN 4 > -#define MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_OFST 8 > -#define MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_LBN 0 > -#define MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_WIDTH 1 > -#define MAE_MPORT_DESC_V2_CAN_DELIVER_TO_OFST 8 > -#define MAE_MPORT_DESC_V2_CAN_DELIVER_TO_LBN 1 > -#define MAE_MPORT_DESC_V2_CAN_DELIVER_TO_WIDTH 1 > -#define MAE_MPORT_DESC_V2_CAN_DELETE_OFST 8 > -#define MAE_MPORT_DESC_V2_CAN_DELETE_LBN 2 > -#define MAE_MPORT_DESC_V2_CAN_DELETE_WIDTH 1 > -#define MAE_MPORT_DESC_V2_IS_ZOMBIE_OFST 8 > -#define MAE_MPORT_DESC_V2_IS_ZOMBIE_LBN 3 > -#define MAE_MPORT_DESC_V2_IS_ZOMBIE_WIDTH 1 > -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_LBN 64 > -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_WIDTH 32 > -/* Not the ideal name; it's really the type of thing connected to the m-port */ > -#define MAE_MPORT_DESC_V2_MPORT_TYPE_OFST 12 > -#define MAE_MPORT_DESC_V2_MPORT_TYPE_LEN 4 > -/* enum: Connected to a MAC... */ > -#define MAE_MPORT_DESC_V2_MPORT_TYPE_NET_PORT 0x0 > -/* enum: Adds metadata and delivers to another m-port */ > -#define MAE_MPORT_DESC_V2_MPORT_TYPE_ALIAS 0x1 > -/* enum: Connected to a VNIC. */ > -#define MAE_MPORT_DESC_V2_MPORT_TYPE_VNIC 0x2 > -#define MAE_MPORT_DESC_V2_MPORT_TYPE_LBN 96 > -#define MAE_MPORT_DESC_V2_MPORT_TYPE_WIDTH 32 > -/* 128-bit value available to drivers for m-port identification. */ > -#define MAE_MPORT_DESC_V2_UUID_OFST 16 > -#define MAE_MPORT_DESC_V2_UUID_LEN 16 > -#define MAE_MPORT_DESC_V2_UUID_LBN 128 > -#define MAE_MPORT_DESC_V2_UUID_WIDTH 128 > -/* Big wadge of space reserved for other common properties */ > -#define MAE_MPORT_DESC_V2_RESERVED_OFST 32 > -#define MAE_MPORT_DESC_V2_RESERVED_LEN 8 > -#define MAE_MPORT_DESC_V2_RESERVED_LO_OFST 32 > -#define MAE_MPORT_DESC_V2_RESERVED_LO_LEN 4 > -#define MAE_MPORT_DESC_V2_RESERVED_LO_LBN 256 > -#define MAE_MPORT_DESC_V2_RESERVED_LO_WIDTH 32 > -#define MAE_MPORT_DESC_V2_RESERVED_HI_OFST 36 > -#define MAE_MPORT_DESC_V2_RESERVED_HI_LEN 4 > -#define MAE_MPORT_DESC_V2_RESERVED_HI_LBN 288 > -#define MAE_MPORT_DESC_V2_RESERVED_HI_WIDTH 32 > -#define MAE_MPORT_DESC_V2_RESERVED_LBN 256 > -#define MAE_MPORT_DESC_V2_RESERVED_WIDTH 64 > -/* Logical port index. Only valid when type NET Port. */ > -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_OFST 40 > -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_LEN 4 > -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_LBN 320 > -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_WIDTH 32 > -/* The m-port delivered to */ > -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_OFST 40 > -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_LEN 4 > -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_LBN 320 > -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_WIDTH 32 > -/* The type of thing that owns the VNIC */ > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_OFST 40 > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_LEN 4 > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_FUNCTION 0x1 /* enum */ > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_PLUGIN 0x2 /* enum */ > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_LBN 320 > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_WIDTH 32 > -/* The PCIe interface on which the function lives. CJK: We need an enumeration > - * of interfaces that we extend as new interface (types) appear. This belongs > - * elsewhere and should be referenced from here > - */ > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_OFST 44 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_LEN 4 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_LBN 352 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_WIDTH 32 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_OFST 48 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_LEN 2 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_LBN 384 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_WIDTH 16 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_OFST 50 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_LEN 2 > -/* enum: Indicates that the function is a PF */ > -#define MAE_MPORT_DESC_V2_VF_IDX_NULL 0xffff > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_LBN 400 > -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_WIDTH 16 > -/* Reserved. Should be ignored for now. */ > -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_OFST 44 > -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_LEN 4 > -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_LBN 352 > -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_WIDTH 32 > -/* A client handle for the VNIC's owner. Only valid for type VNIC. */ > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_OFST 52 > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_LEN 4 > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_LBN 416 > -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_WIDTH 32 > - > - > -/***********************************/ > -/* MC_CMD_MAE_MPORT_ENUMERATE > - * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command > - * will be removed at some future point. > - */ > -#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c > -#undef MC_CMD_0x17c_PRIVILEGE_CTG > - > -#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_MAE_MPORT_ENUMERATE_IN msgrequest */ > -#define MC_CMD_MAE_MPORT_ENUMERATE_IN_LEN 0 > - > -/* MC_CMD_MAE_MPORT_ENUMERATE_OUT msgresponse */ > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMIN 8 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMAX 252 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMAX_MCDI2 1020 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LEN(num) (8+1*(num)) > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_NUM(len) (((len)-8)/1) > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_COUNT_OFST 0 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_COUNT_LEN 4 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_SIZEOF_MPORT_DESC_OFST 4 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_SIZEOF_MPORT_DESC_LEN 4 > -/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may > - * grow in future version of this command. Drivers should use a stride of > - * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present. > - */ > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_OFST 8 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_LEN 1 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MINNUM 0 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244 > -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012 > - > > /***********************************/ > /* MC_CMD_MAE_MPORT_READ_JOURNAL > @@ -29569,73 +25594,6 @@ > #define MC_CMD_TABLE_INSERT_OUT_LEN 0 > > > -/***********************************/ > -/* MC_CMD_TABLE_UPDATE > - * Update an existing entry in a table with a new response value. May return > - * EINVAL for unknown table ID or other bad request parameters, ENOENT if the > - * entry does not already exist, or EPERM if the operation is not permitted. In > - * case of an error, the additional MCDI error argument field returns the raw > - * error code from the underlying CAM driver. > - */ > -#define MC_CMD_TABLE_UPDATE 0x1ce > -#undef MC_CMD_0x1ce_PRIVILEGE_CTG > - > -#define MC_CMD_0x1ce_PRIVILEGE_CTG SRIOV_CTG_GENERAL > - > -/* MC_CMD_TABLE_UPDATE_IN msgrequest */ > -#define MC_CMD_TABLE_UPDATE_IN_LENMIN 16 > -#define MC_CMD_TABLE_UPDATE_IN_LENMAX 252 > -#define MC_CMD_TABLE_UPDATE_IN_LENMAX_MCDI2 1020 > -#define MC_CMD_TABLE_UPDATE_IN_LEN(num) (12+4*(num)) > -#define MC_CMD_TABLE_UPDATE_IN_DATA_NUM(len) (((len)-12)/4) > -/* Table identifier. */ > -#define MC_CMD_TABLE_UPDATE_IN_TABLE_ID_OFST 0 > -#define MC_CMD_TABLE_UPDATE_IN_TABLE_ID_LEN 4 > -/* Enum values, see field(s): */ > -/* TABLE_ID */ > -/* Width in bits of supplied key data (must match table properties). */ > -#define MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_OFST 4 > -#define MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_LEN 2 > -/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM > - * when allocated MASK_ID is used instead). > - */ > -#define MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_OFST 6 > -#define MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_LEN 2 > -/* Width in bits of supplied response data (for INSERT and UPDATE operations > - * this must match the table properties; for DELETE operations, no response > - * data is required and this must be 0). > - */ > -#define MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_OFST 8 > -#define MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_LEN 2 > -/* Mask ID for STCAM table - used instead of mask data if the table descriptor > - * reports ALLOC_MASKS==1. Otherwise set to 0. > - */ > -#define MC_CMD_TABLE_UPDATE_IN_MASK_ID_OFST 6 > -#define MC_CMD_TABLE_UPDATE_IN_MASK_ID_LEN 2 > -/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */ > -#define MC_CMD_TABLE_UPDATE_IN_PRIORITY_OFST 8 > -#define MC_CMD_TABLE_UPDATE_IN_PRIORITY_LEN 2 > -/* (32-bit alignment padding - set to 0) */ > -#define MC_CMD_TABLE_UPDATE_IN_RESERVED_OFST 10 > -#define MC_CMD_TABLE_UPDATE_IN_RESERVED_LEN 2 > -/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0) > - * data values. Each of these items is logically treated as a single wide N-bit > - * value, in which the individual fields have been placed within that value per > - * the LBN and WIDTH information from the table field descriptors. The wide > - * N-bit value is padded with 0 bits at the MSB end if necessary to make a > - * multiple of 32 bits. The value is then packed into this command as a > - * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc. > - */ > -#define MC_CMD_TABLE_UPDATE_IN_DATA_OFST 12 > -#define MC_CMD_TABLE_UPDATE_IN_DATA_LEN 4 > -#define MC_CMD_TABLE_UPDATE_IN_DATA_MINNUM 1 > -#define MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM 60 > -#define MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM_MCDI2 252 > - > -/* MC_CMD_TABLE_UPDATE_OUT msgresponse */ > -#define MC_CMD_TABLE_UPDATE_OUT_LEN 0 > - > - > /***********************************/ > /* MC_CMD_TABLE_DELETE > * Delete an existing entry in a table. May return EINVAL for unknown table ID > @@ -29702,5 +25660,124 @@ > /* MC_CMD_TABLE_DELETE_OUT msgresponse */ > #define MC_CMD_TABLE_DELETE_OUT_LEN 0 > > +/* MC_CMD_QUEUE_HANDLE structuredef: On X4, to distinguish between full- > + * featured (X2-style) VIs and low-latency (X3-style) queues, we use the top > + * bits of the queue handle to specify the queue type in all MCDI calls which > + * refer to VIs/queues. These bits should be masked off when indexing into a > + * queue in the BAR. > + */ > +#define MC_CMD_QUEUE_HANDLE_LEN 4 > +/* Combined queue number and type. This is the ID returned by and passed into > + * MCDI calls that use queues. > + */ > +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_OFST 0 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_LEN 4 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_NUM_OFST 0 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_NUM_LBN 0 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_NUM_WIDTH 24 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_OFST 0 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LBN 24 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_WIDTH 8 > +/* enum: Indicates that the queue instance is a full-featured VI */ > +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_FF_VI 0x0 > +/* enum: Indicates that the queue instance is a LL TXQ */ > +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_TXQ 0x1 > +/* enum: Indicates that the queue instance is a LL RXQ */ > +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_RXQ 0x2 > +/* enum: Indicates that the queue instance is a LL EVQ */ > +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_EVQ 0x3 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_LBN 0 > +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_WIDTH 32 > + > + > +/***********************************/ > +/* MC_CMD_ALLOC_LL_QUEUES > + * Allocate low latency (X3-style) queues for current PCI function. Can be > + * called more than once if desired to allocate more queues. > + */ > +#define MC_CMD_ALLOC_LL_QUEUES 0x1dd > +#undef MC_CMD_0x1dd_PRIVILEGE_CTG > + > +#define MC_CMD_0x1dd_PRIVILEGE_CTG SRIOV_CTG_GENERAL > + > +/* MC_CMD_ALLOC_LL_QUEUES_IN msgrequest */ > +#define MC_CMD_ALLOC_LL_QUEUES_IN_LEN 24 > +/* The minimum number of TXQs that is acceptable */ > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_TXQ_COUNT_OFST 0 > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_TXQ_COUNT_LEN 4 > +/* The maximum number of TXQs that would be useful */ > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_TXQ_COUNT_OFST 4 > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_TXQ_COUNT_LEN 4 > +/* The minimum number of RXQs that is acceptable */ > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_RXQ_COUNT_OFST 8 > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_RXQ_COUNT_LEN 4 > +/* The maximum number of RXQs that would be useful */ > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_RXQ_COUNT_OFST 12 > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_RXQ_COUNT_LEN 4 > +/* The minimum number of EVQs that is acceptable */ > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_EVQ_COUNT_OFST 16 > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_EVQ_COUNT_LEN 4 > +/* The maximum number of EVQs that would be useful */ > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_EVQ_COUNT_OFST 20 > +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_EVQ_COUNT_LEN 4 > + > +/* MC_CMD_ALLOC_LL_QUEUES_OUT msgresponse */ > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LENMIN 16 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LENMAX 252 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LENMAX_MCDI2 1020 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LEN(num) (12+4*(num)) > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_NUM(len) (((len)-12)/4) > +/* The number of TXQs allocated in this request */ > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_TXQ_COUNT_OFST 0 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_TXQ_COUNT_LEN 4 > +/* The number of RXQs allocated in this request */ > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_RXQ_COUNT_OFST 4 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_RXQ_COUNT_LEN 4 > +/* The number of EVQs allocated in this request */ > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_EVQ_COUNT_OFST 8 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_EVQ_COUNT_LEN 4 > +/* A list of allocated queues, returned as MC_CMD_QUEUE_HANDLEs, not > + * necessarily contiguous. TXQs are first in the list, followed by RXQs then > + * EVQs. The type of each queue is indicated by the top bits (see the > + * QUEUE_TYPE enum) > + */ > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_OFST 12 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_LEN 4 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MINNUM 1 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MAXNUM 60 > +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MAXNUM_MCDI2 252 > + > + > +/***********************************/ > +/* MC_CMD_FREE_LL_QUEUES > + * Free low latency (X3-style) queues for current PCI function. > + */ > +#define MC_CMD_FREE_LL_QUEUES 0x1de > +#undef MC_CMD_0x1de_PRIVILEGE_CTG > + > +#define MC_CMD_0x1de_PRIVILEGE_CTG SRIOV_CTG_GENERAL > + > +/* MC_CMD_FREE_LL_QUEUES_IN msgrequest */ > +#define MC_CMD_FREE_LL_QUEUES_IN_LENMIN 8 > +#define MC_CMD_FREE_LL_QUEUES_IN_LENMAX 252 > +#define MC_CMD_FREE_LL_QUEUES_IN_LENMAX_MCDI2 1020 > +#define MC_CMD_FREE_LL_QUEUES_IN_LEN(num) (4+4*(num)) > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_NUM(len) (((len)-4)/4) > +/* The number of queues to free. */ > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUE_COUNT_OFST 0 > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUE_COUNT_LEN 4 > +/* A list of queues to free, as a list of MC_CMD_QUEUE_HANDLEs. They must have > + * all been previously allocated by MC_CMD_ALLOC_LL_QUEUES. The type of each > + * queue should be indicated by the top bits. > + */ > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_OFST 4 > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_LEN 4 > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MINNUM 1 > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MAXNUM 62 > +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MAXNUM_MCDI2 254 > + > +/* MC_CMD_FREE_LL_QUEUES_OUT msgresponse */ > +#define MC_CMD_FREE_LL_QUEUES_OUT_LEN 0 > + > > #endif /* MCDI_PCOL_H */ > -- > 2.17.1 > >
On 02/12/2024 17:12, alejandro.lucero-palau@amd.com wrote: > From: Alejandro Lucero <alucerop@amd.com> > > The script used to generate these now includes CXL definitions. > > Signed-off-by: Alejandro Lucero <alucerop@amd.com> Reviewed-by: Edward Cree <ecree.xilinx@gmail.com> Thanks.
diff --git a/drivers/net/ethernet/sfc/mcdi_pcol.h b/drivers/net/ethernet/sfc/mcdi_pcol.h index cd297e19cddc..5338b430bc31 100644 --- a/drivers/net/ethernet/sfc/mcdi_pcol.h +++ b/drivers/net/ethernet/sfc/mcdi_pcol.h @@ -72,19 +72,19 @@ * | \------- Error * \------------------------------ Resync (always set) * - * The client writes it's request into MC shared memory, and rings the - * doorbell. Each request is completed by either by the MC writing + * The client writes its request into MC shared memory, and rings the + * doorbell. Each request is completed either by the MC writing * back into shared memory, or by writing out an event. * * All MCDI commands support completion by shared memory response. Each * request may also contain additional data (accounted for by HEADER.LEN), - * and some response's may also contain additional data (again, accounted + * and some responses may also contain additional data (again, accounted * for by HEADER.LEN). * * Some MCDI commands support completion by event, in which any associated * response data is included in the event. * - * The protocol requires one response to be delivered for every request, a + * The protocol requires one response to be delivered for every request; a * request should not be sent unless the response for the previous request * has been received (either by polling shared memory, or by receiving * an event). @@ -321,7 +321,7 @@ /* enum: The requesting client is not a function */ #define MC_CMD_ERR_CLIENT_NOT_FN 0x100c /* enum: The requested operation might require the command to be passed between - * MCs, and thetransport doesn't support that. Should only ever been seen over + * MCs, and the transport doesn't support that. Should only ever been seen over * the UART. */ #define MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d @@ -358,7 +358,7 @@ * sub-variant switching. */ #define MC_CMD_ERR_FILTERS_PRESENT 0x1014 -/* enum: The clock whose frequency you've attempted to set set doesn't exist on +/* enum: The clock whose frequency you've attempted to set doesn't exist on * this NIC */ #define MC_CMD_ERR_NO_CLOCK 0x1015 @@ -387,25 +387,6 @@ */ #define MC_CMD_ERR_PIOBUFS_PRESENT 0x101b -/* MC_CMD_RESOURCE_SPECIFIER enum */ -/* enum: Any */ -#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff -#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */ - -/* MC_CMD_FPGA_FLASH_INDEX enum */ -#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */ -#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */ - -/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */ -/* enum: Legacy mode as described in XN-200039-TC. */ -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0 -/* enum: Switchdev mode as described in XN-200039-TC. */ -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1 -/* enum: Bootstrap mode as described in XN-200039-TC. */ -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2 -/* enum: Link-mode change is in-progress as described in XN-200039-TC. */ -#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf - /* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe * interfaces. There is a need to refer to interfaces explicitly from drivers * (for example, a management driver on one interface administering a function @@ -424,6 +405,14 @@ * an on-NIC ARM module is expected to be connected. */ #define PCIE_INTERFACE_NIC_EMBEDDED 0x1 +/* enum: The PCIe logical interface 0. It is an alias for HOST_PRIMARY. */ +#define PCIE_INTERFACE_PCIE_HOST_INTF_0 0x0 +/* enum: The PCIe logical interface 1. */ +#define PCIE_INTERFACE_PCIE_HOST_INTF_1 0x2 +/* enum: The PCIe logical interface 2. */ +#define PCIE_INTERFACE_PCIE_HOST_INTF_2 0x3 +/* enum: The PCIe logical interface 3. */ +#define PCIE_INTERFACE_PCIE_HOST_INTF_3 0x4 /* enum: For MCDI commands issued over a PCIe interface, this value is * translated into the interface over which the command was issued. Not * meaningful for other MCDI transports. @@ -640,7 +629,11 @@ * be allocated by different counter blocks, so e.g. AR counter 42 is different * from CT counter 42. Generation counts are also type-specific. This value is * also present in the header of streaming counter packets, in the IDENTIFIER - * field (see packetiser packet format definitions). + * field (see packetiser packet format definitions). Also note that LACP + * counter IDs are not allocated individually, instead the counter IDs are + * directly tied to the LACP balance table indices. These in turn are allocated + * in large contiguous blocks as a LAG config. Calling MAE_COUNTER_ALLOC/FREE + * with an LACP counter type will return EPERM. */ /* enum: Action Rule counters - can be referenced in AR response. */ #define MAE_COUNTER_TYPE_AR 0x0 @@ -648,6 +641,14 @@ #define MAE_COUNTER_TYPE_CT 0x1 /* enum: Outer Rule counters - can be referenced in OR response. */ #define MAE_COUNTER_TYPE_OR 0x2 +/* enum: LACP counters - linked to LACP balance table entries. */ +#define MAE_COUNTER_TYPE_LACP 0x3 + +/* MAE_COUNTER_ID enum: ID of allocated counter or counter list. */ +/* enum: A counter ID that is guaranteed never to represent a real counter or + * counter list. + */ +#define MAE_COUNTER_ID_NULL 0xffffffff /* TABLE_ID enum: Unique IDs for tables. The 32-bit ID values have been * structured with bits [31:24] reserved (0), [23:16] indicating which major @@ -656,7 +657,9 @@ * variations of the same table. (All of the tables currently defined within * the streaming engines are listed here, but this does not imply that they are * all supported - MC_CMD_TABLE_LIST returns the list of actually supported - * tables.) + * tables.) The DPU offload engines' enumerators follow a deliberate pattern: + * 0x01010000 + is_dpu_net * 0x10000 + is_wr_or_tx * 0x8000 + is_lite_pipe * + * 0x1000 + oe_engine_type * 0x100 + oe_instance_within_pipe * 0x10 */ /* enum: Outer_Rule_Table in the MAE - refer to SF-123102-TC. */ #define TABLE_ID_OUTER_RULE_TABLE 0x10000 @@ -694,45 +697,70 @@ #define TABLE_ID_RSS_CONTEXT_TABLE 0x20200 /* enum: Indirection_Table in VNIC Rx - refer to SF-123102-TC. */ #define TABLE_ID_INDIRECTION_TABLE 0x20300 - -/* TABLE_COMPRESSED_VLAN enum: Compressed VLAN TPID as used by some field - * types; can be calculated by (((ether_type_msb >> 2) & 0x4) ^ 0x4) | - * (ether_type_msb & 0x3); - */ -#define TABLE_COMPRESSED_VLAN_TPID_8100 0x5 /* enum */ -#define TABLE_COMPRESSED_VLAN_TPID_88A8 0x4 /* enum */ -#define TABLE_COMPRESSED_VLAN_TPID_9100 0x1 /* enum */ -#define TABLE_COMPRESSED_VLAN_TPID_9200 0x2 /* enum */ -#define TABLE_COMPRESSED_VLAN_TPID_9300 0x3 /* enum */ - -/* TABLE_NAT_DIR enum: NAT direction. */ -#define TABLE_NAT_DIR_SOURCE 0x0 /* enum */ -#define TABLE_NAT_DIR_DEST 0x1 /* enum */ - -/* TABLE_RSS_KEY_MODE enum: Defines how the value for Toeplitz hashing for RSS - * is constructed as a concatenation (indicated here by "++") of packet header - * fields. - */ -/* enum: IP src addr ++ IP dst addr */ -#define TABLE_RSS_KEY_MODE_SA_DA 0x0 -/* enum: IP src addr ++ IP dst addr ++ TCP/UDP src port ++ TCP/UDP dst port */ -#define TABLE_RSS_KEY_MODE_SA_DA_SP_DP 0x1 -/* enum: IP src addr */ -#define TABLE_RSS_KEY_MODE_SA 0x2 -/* enum: IP dst addr */ -#define TABLE_RSS_KEY_MODE_DA 0x3 -/* enum: IP src addr ++ TCP/UDP src port */ -#define TABLE_RSS_KEY_MODE_SA_SP 0x4 -/* enum: IP dest addr ++ TCP dest port */ -#define TABLE_RSS_KEY_MODE_DA_DP 0x5 -/* enum: Nothing (produces input of 0, resulting in output hash of 0) */ -#define TABLE_RSS_KEY_MODE_NONE 0x7 - -/* TABLE_RSS_SPREAD_MODE enum: RSS spreading mode. */ -/* enum: RSS uses Indirection_Table lookup. */ -#define TABLE_RSS_SPREAD_MODE_INDIRECTION 0x0 -/* enum: RSS uses even spreading calculation. */ -#define TABLE_RSS_SPREAD_MODE_EVEN 0x1 +/* enum: DPU.host read pipe first CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_RD_CRC0_OE_PROFILE 0x1010000 +/* enum: DPU.host read pipe second CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_RD_CRC1_OE_PROFILE 0x1010010 +/* enum: DPU.host write pipe first CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_WR_CRC0_OE_PROFILE 0x1018000 +/* enum: DPU.host write pipe second CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_WR_CRC1_OE_PROFILE 0x1018010 +/* enum: DPU.net 'full' receive pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_CRC0_OE_PROFILE 0x1020000 +/* enum: DPU.net 'full' receive pipe first checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_CSUM0_OE_PROFILE 0x1020100 +/* enum: DPU.net 'full' receive pipe second checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_CSUM1_OE_PROFILE 0x1020110 +/* enum: DPU.net 'full' receive pipe AES-GCM offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_AES_GCM0_OE_PROFILE 0x1020200 +/* enum: DPU.net 'lite' receive pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RXLITE_CRC0_OE_PROFILE 0x1021000 +/* enum: DPU.net 'lite' receive pipe checksum offload engine profiles - refer + * to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RXLITE_CSUM0_OE_PROFILE 0x1021100 +/* enum: DPU.net 'full' transmit pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_CRC0_OE_PROFILE 0x1028000 +/* enum: DPU.net 'full' transmit pipe first checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_CSUM0_OE_PROFILE 0x1028100 +/* enum: DPU.net 'full' transmit pipe second checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_CSUM1_OE_PROFILE 0x1028110 +/* enum: DPU.net 'full' transmit pipe AES-GCM offload engine profiles - refer + * to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_AES_GCM0_OE_PROFILE 0x1028200 +/* enum: DPU.net 'lite' transmit pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TXLITE_CRC0_OE_PROFILE 0x1029000 +/* enum: DPU.net 'lite' transmit pipe checksum offload engine profiles - refer + * to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TXLITE_CSUM0_OE_PROFILE 0x1029100 /* TABLE_FIELD_ID enum: Unique IDs for fields. Related concepts have been * loosely grouped together into blocks with gaps for expansion, but the values @@ -1026,6 +1054,16 @@ #define TABLE_FIELD_ID_BAL_TBL_BASE_DIV64 0xde /* enum: Length of balance table region: 0=>64, 1=>128, 2=>256. */ #define TABLE_FIELD_ID_BAL_TBL_LEN_ID 0xdf +/* enum: LACP LAG ID (i.e. the low 3 bits of LACP LAG mport ID), indexing + * LACP_LAG_Config_Table. Refer to SF-123102-TC. + */ +#define TABLE_FIELD_ID_LACP_LAG_ID 0xe0 +/* enum: Address in LACP_Balance_Table. The balance table is partitioned + * between LAGs according to the settings in LACP_LAG_Config_Table and then + * indexed by the LACP hash, providing the mapping to destination mports. Refer + * to SF-123102-TC. + */ +#define TABLE_FIELD_ID_BAL_TBL_ADDR 0xe1 /* enum: UDP port to match for UDP-based encapsulations; required to be 0 for * other encapsulation types. */ @@ -1082,6 +1120,55 @@ #define TABLE_FIELD_ID_INDIR_TBL_LEN_ID 0x105 /* enum: An offset to be applied to the base destination queue ID. */ #define TABLE_FIELD_ID_INDIR_OFFSET 0x106 +/* enum: DPU offload engine profile ID to address. */ +#define TABLE_FIELD_ID_OE_PROFILE 0x3e8 +/* enum: Width of the CRC to calculate - see CRC_VARIANT enum. */ +#define TABLE_FIELD_ID_CRC_VARIANT 0x3f2 +/* enum: If set, reflect the bits of each input byte, bit 7 is LSB, bit 0 is + * MSB. If clear, bit 7 is MSB, bit 0 is LSB. + */ +#define TABLE_FIELD_ID_CRC_REFIN 0x3f3 +/* enum: If set, reflect the bits of each output byte, bit 7 is LSB, bit 0 is + * MSB. If clear, bit 7 is MSB, bit 0 is LSB. + */ +#define TABLE_FIELD_ID_CRC_REFOUT 0x3f4 +/* enum: If set, invert every bit of the output value. */ +#define TABLE_FIELD_ID_CRC_INVOUT 0x3f5 +/* enum: The CRC polynomial to use for checksumming, in normal form. */ +#define TABLE_FIELD_ID_CRC_POLY 0x3f6 +/* enum: Operation for the checksum engine to perform - see DPU_CSUM_OP enum. + */ +#define TABLE_FIELD_ID_CSUM_OP 0x410 +/* enum: Byte offset of checksum relative to region_start (for VALIDATE_* + * operations only). + */ +#define TABLE_FIELD_ID_CSUM_OFFSET 0x411 +/* enum: Indicates there is additional data on OPR bus that needs to be + * incorporated into the payload checksum. + */ +#define TABLE_FIELD_ID_CSUM_OPR_ADDITIONAL_DATA 0x412 +/* enum: Log2 data size of additional data on OPR bus. */ +#define TABLE_FIELD_ID_CSUM_OPR_DATA_SIZE_LOG2 0x413 +/* enum: 4 byte offset of where to find the additional data on the OPR bus. */ +#define TABLE_FIELD_ID_CSUM_OPR_4B_OFF 0x414 +/* enum: Operation type for the AES-GCM core - see GCM_OP_CODE enum. */ +#define TABLE_FIELD_ID_GCM_OP_CODE 0x41a +/* enum: Key length - AES_KEY_LEN enum. */ +#define TABLE_FIELD_ID_GCM_KEY_LEN 0x41b +/* enum: OPR 4 byte offset for ICV or GHASH output (only in BULK_* mode) or + * IPSEC descrypt output. + */ +#define TABLE_FIELD_ID_GCM_OPR_4B_OFFSET 0x41c +/* enum: If OP_CODE is BULK_*, indicates Emit GHASH (Fragment mode). Else, + * indicates IPSEC-ESN mode. + */ +#define TABLE_FIELD_ID_GCM_EMIT_GHASH_ISESN 0x41d +/* enum: Replay Protection Enable. */ +#define TABLE_FIELD_ID_GCM_REPLAY_PROTECT_EN 0x41e +/* enum: IPSEC Encrypt ESP trailer NEXT_HEADER byte. */ +#define TABLE_FIELD_ID_GCM_NEXT_HDR 0x41f +/* enum: Replay Window Size. */ +#define TABLE_FIELD_ID_GCM_REPLAY_WIN_SIZE 0x420 /* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100 * platforms @@ -1138,6 +1225,24 @@ #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_OFST 0 #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN 24 #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_WIDTH 8 +#define MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_OFST 0 +#define MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_LBN 0 +#define MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_WIDTH 24 +#define MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_OFST 0 +#define MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_LBN 24 +#define MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_WIDTH 7 +#define MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_OFST 0 +#define MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_LBN 31 +#define MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_WIDTH 1 +#define MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_OFST 0 +#define MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_LBN 0 +#define MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_WIDTH 24 +#define MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_OFST 0 +#define MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_LBN 24 +#define MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_WIDTH 7 +#define MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_OFST 0 +#define MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_LBN 31 +#define MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_WIDTH 1 #define MCDI_EVENT_SENSOREVT_MONITOR_OFST 0 #define MCDI_EVENT_SENSOREVT_MONITOR_LBN 0 #define MCDI_EVENT_SENSOREVT_MONITOR_WIDTH 8 @@ -1237,7 +1342,7 @@ #define MCDI_EVENT_AOE_FPGA_LOAD_FAILED 0xe /* enum: Notify that invalid flash type detected */ #define MCDI_EVENT_AOE_INVALID_FPGA_FLASH_TYPE 0xf -/* enum: Notify that the attempt to run FPGA Controller firmware timedout */ +/* enum: Notify that the attempt to run FPGA Controller firmware timed out */ #define MCDI_EVENT_AOE_FC_RUN_TIMEDOUT 0x10 /* enum: Failure to probe one or more FPGA boot flash chips */ #define MCDI_EVENT_AOE_FPGA_BOOT_FLASH_INVALID 0x11 @@ -1255,7 +1360,7 @@ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_WIDTH 8 /* enum: FC Assert happened, but the register information is not available */ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_SEEN 0x0 -/* enum: The register information for FC Assert is ready for readinng by driver +/* enum: The register information for FC Assert is ready for reading by driver */ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_DATA_READY 0x1 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_OFST 0 @@ -1364,6 +1469,12 @@ #define MCDI_EVENT_MODULECHANGE_SEQ_OFST 0 #define MCDI_EVENT_MODULECHANGE_SEQ_LBN 30 #define MCDI_EVENT_MODULECHANGE_SEQ_WIDTH 2 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_OFST 0 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_LBN 0 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_WIDTH 16 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_OFST 0 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_LBN 16 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_WIDTH 16 #define MCDI_EVENT_DATA_LBN 0 #define MCDI_EVENT_DATA_WIDTH 32 /* Alias for PTP_DATA. */ @@ -1500,6 +1611,31 @@ * change to the journal. */ #define MCDI_EVENT_CODE_MPORT_JOURNAL_CHANGE 0x27 +/* enum: Notification that a source queue is enabled and attached to its proxy + * sink queue. SRC field contains the handle of the affected descriptor proxy + * function. DATA field contains the relative source queue number and absolute + * VI ID. + */ +#define MCDI_EVENT_CODE_DESC_PROXY_FUNC_QUEUE_START 0x28 +/* enum: Notification of a change in link state and/or link speed of a network + * port link. This event applies to a network port identified by a handle, + * PORT_HANDLE, which is discovered by the driver using the MC_CMD_ENUM_PORTS + * command. + */ +#define MCDI_EVENT_CODE_PORT_LINKCHANGE 0x29 +/* enum: Notification of a change in the state of an MDI (external connector) + * of a network port. This typically corresponds to module plug/unplug for + * modular interfaces (e.g., SFP/QSFP and similar) or cable connect/disconnect. + * This event applies to a network port identified by a handle, PORT_HANDLE, + * which is discovered by the driver using the MC_CMD_ENUM_PORTS command. + */ +#define MCDI_EVENT_CODE_PORT_MODULECHANGE 0x2a +/* enum: Notification that the port enumeration journal has changed since it + * was last read and updates can be read using the MC_CMD_ENUM_PORTS command. + * The firmware may moderate the events so that an event is not sent for every + * change to the journal. + */ +#define MCDI_EVENT_CODE_ENUM_PORTS_CHANGE 0x2b /* enum: Artificial event generated by host and posted via MC for test * purposes. */ @@ -1512,6 +1648,14 @@ #define MCDI_EVENT_LINKCHANGE_DATA_LEN 4 #define MCDI_EVENT_LINKCHANGE_DATA_LBN 0 #define MCDI_EVENT_LINKCHANGE_DATA_WIDTH 32 +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_OFST 0 +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_LEN 4 +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_LBN 0 +#define MCDI_EVENT_PORT_LINKCHANGE_DATA_WIDTH 32 +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_OFST 0 +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_LEN 4 +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_LBN 0 +#define MCDI_EVENT_PORT_MODULECHANGE_DATA_WIDTH 32 #define MCDI_EVENT_SENSOREVT_DATA_OFST 0 #define MCDI_EVENT_SENSOREVT_DATA_LEN 4 #define MCDI_EVENT_SENSOREVT_DATA_LBN 0 @@ -1668,247 +1812,6 @@ #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_LBN 0 #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_WIDTH 32 -/* FCDI_EVENT structuredef */ -#define FCDI_EVENT_LEN 8 -#define FCDI_EVENT_CONT_LBN 32 -#define FCDI_EVENT_CONT_WIDTH 1 -#define FCDI_EVENT_LEVEL_LBN 33 -#define FCDI_EVENT_LEVEL_WIDTH 3 -/* enum: Info. */ -#define FCDI_EVENT_LEVEL_INFO 0x0 -/* enum: Warning. */ -#define FCDI_EVENT_LEVEL_WARN 0x1 -/* enum: Error. */ -#define FCDI_EVENT_LEVEL_ERR 0x2 -/* enum: Fatal. */ -#define FCDI_EVENT_LEVEL_FATAL 0x3 -#define FCDI_EVENT_DATA_OFST 0 -#define FCDI_EVENT_DATA_LEN 4 -#define FCDI_EVENT_LINK_STATE_STATUS_OFST 0 -#define FCDI_EVENT_LINK_STATE_STATUS_LBN 0 -#define FCDI_EVENT_LINK_STATE_STATUS_WIDTH 1 -#define FCDI_EVENT_LINK_DOWN 0x0 /* enum */ -#define FCDI_EVENT_LINK_UP 0x1 /* enum */ -#define FCDI_EVENT_DATA_LBN 0 -#define FCDI_EVENT_DATA_WIDTH 32 -#define FCDI_EVENT_SRC_LBN 36 -#define FCDI_EVENT_SRC_WIDTH 8 -#define FCDI_EVENT_EV_CODE_LBN 60 -#define FCDI_EVENT_EV_CODE_WIDTH 4 -#define FCDI_EVENT_CODE_LBN 44 -#define FCDI_EVENT_CODE_WIDTH 8 -/* enum: The FC was rebooted. */ -#define FCDI_EVENT_CODE_REBOOT 0x1 -/* enum: Bad assert. */ -#define FCDI_EVENT_CODE_ASSERT 0x2 -/* enum: DDR3 test result. */ -#define FCDI_EVENT_CODE_DDR_TEST_RESULT 0x3 -/* enum: Link status. */ -#define FCDI_EVENT_CODE_LINK_STATE 0x4 -/* enum: A timed read is ready to be serviced. */ -#define FCDI_EVENT_CODE_TIMED_READ 0x5 -/* enum: One or more PPS IN events */ -#define FCDI_EVENT_CODE_PPS_IN 0x6 -/* enum: Tick event from PTP clock */ -#define FCDI_EVENT_CODE_PTP_TICK 0x7 -/* enum: ECC error counters */ -#define FCDI_EVENT_CODE_DDR_ECC_STATUS 0x8 -/* enum: Current status of PTP */ -#define FCDI_EVENT_CODE_PTP_STATUS 0x9 -/* enum: Port id config to map MC-FC port idx */ -#define FCDI_EVENT_CODE_PORT_CONFIG 0xa -/* enum: Boot result or error code */ -#define FCDI_EVENT_CODE_BOOT_RESULT 0xb -#define FCDI_EVENT_REBOOT_SRC_LBN 36 -#define FCDI_EVENT_REBOOT_SRC_WIDTH 8 -#define FCDI_EVENT_REBOOT_FC_FW 0x0 /* enum */ -#define FCDI_EVENT_REBOOT_FC_BOOTLOADER 0x1 /* enum */ -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_OFST 0 -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LEN 4 -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LBN 0 -#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_WIDTH 32 -#define FCDI_EVENT_ASSERT_TYPE_LBN 36 -#define FCDI_EVENT_ASSERT_TYPE_WIDTH 8 -#define FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_LBN 36 -#define FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_WIDTH 8 -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_OFST 0 -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LEN 4 -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LBN 0 -#define FCDI_EVENT_DDR_TEST_RESULT_RESULT_WIDTH 32 -#define FCDI_EVENT_LINK_STATE_DATA_OFST 0 -#define FCDI_EVENT_LINK_STATE_DATA_LEN 4 -#define FCDI_EVENT_LINK_STATE_DATA_LBN 0 -#define FCDI_EVENT_LINK_STATE_DATA_WIDTH 32 -#define FCDI_EVENT_PTP_STATE_OFST 0 -#define FCDI_EVENT_PTP_STATE_LEN 4 -#define FCDI_EVENT_PTP_UNDEFINED 0x0 /* enum */ -#define FCDI_EVENT_PTP_SETUP_FAILED 0x1 /* enum */ -#define FCDI_EVENT_PTP_OPERATIONAL 0x2 /* enum */ -#define FCDI_EVENT_PTP_STATE_LBN 0 -#define FCDI_EVENT_PTP_STATE_WIDTH 32 -#define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_LBN 36 -#define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_WIDTH 8 -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_OFST 0 -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LEN 4 -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LBN 0 -#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_WIDTH 32 -/* Index of MC port being referred to */ -#define FCDI_EVENT_PORT_CONFIG_SRC_LBN 36 -#define FCDI_EVENT_PORT_CONFIG_SRC_WIDTH 8 -/* FC Port index that matches the MC port index in SRC */ -#define FCDI_EVENT_PORT_CONFIG_DATA_OFST 0 -#define FCDI_EVENT_PORT_CONFIG_DATA_LEN 4 -#define FCDI_EVENT_PORT_CONFIG_DATA_LBN 0 -#define FCDI_EVENT_PORT_CONFIG_DATA_WIDTH 32 -#define FCDI_EVENT_BOOT_RESULT_OFST 0 -#define FCDI_EVENT_BOOT_RESULT_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_AOE/MC_CMD_AOE_OUT_INFO/FC_BOOT_RESULT */ -#define FCDI_EVENT_BOOT_RESULT_LBN 0 -#define FCDI_EVENT_BOOT_RESULT_WIDTH 32 - -/* FCDI_EXTENDED_EVENT_PPS structuredef: Extended FCDI event to send PPS events - * to the MC. Note that this structure | is overlayed over a normal FCDI event - * such that bits 32-63 containing | event code, level, source etc remain the - * same. In this case the data | field of the header is defined to be the - * number of timestamps - */ -#define FCDI_EXTENDED_EVENT_PPS_LENMIN 16 -#define FCDI_EXTENDED_EVENT_PPS_LENMAX 248 -#define FCDI_EXTENDED_EVENT_PPS_LENMAX_MCDI2 1016 -#define FCDI_EXTENDED_EVENT_PPS_LEN(num) (8+8*(num)) -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_NUM(len) (((len)-8)/8) -/* Number of timestamps following */ -#define FCDI_EXTENDED_EVENT_PPS_COUNT_OFST 0 -#define FCDI_EXTENDED_EVENT_PPS_COUNT_LEN 4 -#define FCDI_EXTENDED_EVENT_PPS_COUNT_LBN 0 -#define FCDI_EXTENDED_EVENT_PPS_COUNT_WIDTH 32 -/* Seconds field of a timestamp record */ -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_OFST 8 -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_LEN 4 -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_LBN 64 -#define FCDI_EXTENDED_EVENT_PPS_SECONDS_WIDTH 32 -/* Nanoseconds field of a timestamp record */ -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_OFST 12 -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LEN 4 -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LBN 96 -#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_WIDTH 32 -/* Timestamp records comprising the event */ -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LBN 64 -#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_WIDTH 64 - -/* MUM_EVENT structuredef */ -#define MUM_EVENT_LEN 8 -#define MUM_EVENT_CONT_LBN 32 -#define MUM_EVENT_CONT_WIDTH 1 -#define MUM_EVENT_LEVEL_LBN 33 -#define MUM_EVENT_LEVEL_WIDTH 3 -/* enum: Info. */ -#define MUM_EVENT_LEVEL_INFO 0x0 -/* enum: Warning. */ -#define MUM_EVENT_LEVEL_WARN 0x1 -/* enum: Error. */ -#define MUM_EVENT_LEVEL_ERR 0x2 -/* enum: Fatal. */ -#define MUM_EVENT_LEVEL_FATAL 0x3 -#define MUM_EVENT_DATA_OFST 0 -#define MUM_EVENT_DATA_LEN 4 -#define MUM_EVENT_SENSOR_ID_OFST 0 -#define MUM_EVENT_SENSOR_ID_LBN 0 -#define MUM_EVENT_SENSOR_ID_WIDTH 8 -/* Enum values, see field(s): */ -/* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ -#define MUM_EVENT_SENSOR_STATE_OFST 0 -#define MUM_EVENT_SENSOR_STATE_LBN 8 -#define MUM_EVENT_SENSOR_STATE_WIDTH 8 -#define MUM_EVENT_PORT_PHY_READY_OFST 0 -#define MUM_EVENT_PORT_PHY_READY_LBN 0 -#define MUM_EVENT_PORT_PHY_READY_WIDTH 1 -#define MUM_EVENT_PORT_PHY_LINK_UP_OFST 0 -#define MUM_EVENT_PORT_PHY_LINK_UP_LBN 1 -#define MUM_EVENT_PORT_PHY_LINK_UP_WIDTH 1 -#define MUM_EVENT_PORT_PHY_TX_LOL_OFST 0 -#define MUM_EVENT_PORT_PHY_TX_LOL_LBN 2 -#define MUM_EVENT_PORT_PHY_TX_LOL_WIDTH 1 -#define MUM_EVENT_PORT_PHY_RX_LOL_OFST 0 -#define MUM_EVENT_PORT_PHY_RX_LOL_LBN 3 -#define MUM_EVENT_PORT_PHY_RX_LOL_WIDTH 1 -#define MUM_EVENT_PORT_PHY_TX_LOS_OFST 0 -#define MUM_EVENT_PORT_PHY_TX_LOS_LBN 4 -#define MUM_EVENT_PORT_PHY_TX_LOS_WIDTH 1 -#define MUM_EVENT_PORT_PHY_RX_LOS_OFST 0 -#define MUM_EVENT_PORT_PHY_RX_LOS_LBN 5 -#define MUM_EVENT_PORT_PHY_RX_LOS_WIDTH 1 -#define MUM_EVENT_PORT_PHY_TX_FAULT_OFST 0 -#define MUM_EVENT_PORT_PHY_TX_FAULT_LBN 6 -#define MUM_EVENT_PORT_PHY_TX_FAULT_WIDTH 1 -#define MUM_EVENT_DATA_LBN 0 -#define MUM_EVENT_DATA_WIDTH 32 -#define MUM_EVENT_SRC_LBN 36 -#define MUM_EVENT_SRC_WIDTH 8 -#define MUM_EVENT_EV_CODE_LBN 60 -#define MUM_EVENT_EV_CODE_WIDTH 4 -#define MUM_EVENT_CODE_LBN 44 -#define MUM_EVENT_CODE_WIDTH 8 -/* enum: The MUM was rebooted. */ -#define MUM_EVENT_CODE_REBOOT 0x1 -/* enum: Bad assert. */ -#define MUM_EVENT_CODE_ASSERT 0x2 -/* enum: Sensor failure. */ -#define MUM_EVENT_CODE_SENSOR 0x3 -/* enum: Link fault has been asserted, or has cleared. */ -#define MUM_EVENT_CODE_QSFP_LASI_INTERRUPT 0x4 -#define MUM_EVENT_SENSOR_DATA_OFST 0 -#define MUM_EVENT_SENSOR_DATA_LEN 4 -#define MUM_EVENT_SENSOR_DATA_LBN 0 -#define MUM_EVENT_SENSOR_DATA_WIDTH 32 -#define MUM_EVENT_PORT_PHY_FLAGS_OFST 0 -#define MUM_EVENT_PORT_PHY_FLAGS_LEN 4 -#define MUM_EVENT_PORT_PHY_FLAGS_LBN 0 -#define MUM_EVENT_PORT_PHY_FLAGS_WIDTH 32 -#define MUM_EVENT_PORT_PHY_COPPER_LEN_OFST 0 -#define MUM_EVENT_PORT_PHY_COPPER_LEN_LEN 4 -#define MUM_EVENT_PORT_PHY_COPPER_LEN_LBN 0 -#define MUM_EVENT_PORT_PHY_COPPER_LEN_WIDTH 32 -#define MUM_EVENT_PORT_PHY_CAPS_OFST 0 -#define MUM_EVENT_PORT_PHY_CAPS_LEN 4 -#define MUM_EVENT_PORT_PHY_CAPS_LBN 0 -#define MUM_EVENT_PORT_PHY_CAPS_WIDTH 32 -#define MUM_EVENT_PORT_PHY_TECH_OFST 0 -#define MUM_EVENT_PORT_PHY_TECH_LEN 4 -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_UNKNOWN 0x0 /* enum */ -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_OPTICAL 0x1 /* enum */ -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE 0x2 /* enum */ -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE_EQUALIZED 0x3 /* enum */ -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LIMITING 0x4 /* enum */ -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LINEAR 0x5 /* enum */ -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_BASE_T 0x6 /* enum */ -#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_LOOPBACK_PASSIVE 0x7 /* enum */ -#define MUM_EVENT_PORT_PHY_TECH_LBN 0 -#define MUM_EVENT_PORT_PHY_TECH_WIDTH 32 -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_LBN 36 -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_WIDTH 4 -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_FLAGS 0x0 /* enum */ -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_COPPER_LEN 0x1 /* enum */ -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_CAPS 0x2 /* enum */ -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_TECH 0x3 /* enum */ -#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_MAX 0x4 /* enum */ -#define MUM_EVENT_PORT_PHY_SRC_PORT_NO_LBN 40 -#define MUM_EVENT_PORT_PHY_SRC_PORT_NO_WIDTH 4 - /***********************************/ /* MC_CMD_READ32 @@ -1968,90 +1871,6 @@ #define MC_CMD_WRITE32_OUT_LEN 0 -/***********************************/ -/* MC_CMD_COPYCODE - * Copy MC code between two locations and jump. Note - this command really - * belongs to INSECURE category but is required by shmboot. The command handler - * has additional checks to reject insecure calls. - */ -#define MC_CMD_COPYCODE 0x3 -#undef MC_CMD_0x3_PRIVILEGE_CTG - -#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_COPYCODE_IN msgrequest */ -#define MC_CMD_COPYCODE_IN_LEN 16 -/* Source address - * - * The main image should be entered via a copy of a single word from and to a - * magic address, which controls various aspects of the boot. The magic address - * is a bitfield, with each bit as documented below. - */ -#define MC_CMD_COPYCODE_IN_SRC_ADDR_OFST 0 -#define MC_CMD_COPYCODE_IN_SRC_ADDR_LEN 4 -/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT (see below) */ -#define MC_CMD_COPYCODE_HUNT_NO_MAGIC_ADDR 0x10000 -/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT and - * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED (see below) - */ -#define MC_CMD_COPYCODE_HUNT_NO_DATAPATH_MAGIC_ADDR 0x1d0d0 -/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT, - * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED and BOOT_MAGIC_IGNORE_CONFIG (see - * below) - */ -#define MC_CMD_COPYCODE_HUNT_IGNORE_CONFIG_MAGIC_ADDR 0x1badc -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_OFST 0 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_LBN 17 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_WIDTH 1 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_OFST 0 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_LBN 2 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_WIDTH 1 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_OFST 0 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_LBN 3 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_WIDTH 1 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_OFST 0 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_LBN 4 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_WIDTH 1 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_OFST 0 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_LBN 5 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_WIDTH 1 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_OFST 0 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_LBN 6 -#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_WIDTH 1 -/* Destination address */ -#define MC_CMD_COPYCODE_IN_DEST_ADDR_OFST 4 -#define MC_CMD_COPYCODE_IN_DEST_ADDR_LEN 4 -#define MC_CMD_COPYCODE_IN_NUMWORDS_OFST 8 -#define MC_CMD_COPYCODE_IN_NUMWORDS_LEN 4 -/* Address of where to jump after copy. */ -#define MC_CMD_COPYCODE_IN_JUMP_OFST 12 -#define MC_CMD_COPYCODE_IN_JUMP_LEN 4 -/* enum: Control should return to the caller rather than jumping */ -#define MC_CMD_COPYCODE_JUMP_NONE 0x1 - -/* MC_CMD_COPYCODE_OUT msgresponse */ -#define MC_CMD_COPYCODE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_SET_FUNC - * Select function for function-specific commands. - */ -#define MC_CMD_SET_FUNC 0x4 -#undef MC_CMD_0x4_PRIVILEGE_CTG - -#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_SET_FUNC_IN msgrequest */ -#define MC_CMD_SET_FUNC_IN_LEN 4 -/* Set function */ -#define MC_CMD_SET_FUNC_IN_FUNC_OFST 0 -#define MC_CMD_SET_FUNC_IN_FUNC_LEN 4 - -/* MC_CMD_SET_FUNC_OUT msgresponse */ -#define MC_CMD_SET_FUNC_OUT_LEN 0 - - /***********************************/ /* MC_CMD_GET_BOOT_STATUS * Get the instruction address from which the MC booted. @@ -2259,6 +2078,7 @@ /* Log destination */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_OFST 0 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_LEN 4 +/* enum property: bitmask */ /* enum: UART. */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_UART 0x1 /* enum: Event queue. */ @@ -2304,6 +2124,9 @@ /* MC_CMD_GET_VERSION_OUT msgresponse */ #define MC_CMD_GET_VERSION_OUT_LEN 32 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2326,6 +2149,9 @@ /* MC_CMD_GET_VERSION_EXT_OUT msgresponse */ #define MC_CMD_GET_VERSION_EXT_OUT_LEN 48 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2356,6 +2182,9 @@ * (depending on which components exist on a particular adapter) */ #define MC_CMD_GET_VERSION_V2_OUT_LEN 304 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2495,6 +2324,9 @@ * (depending on which components exist on a particular adapter) */ #define MC_CMD_GET_VERSION_V3_OUT_LEN 328 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2641,6 +2473,9 @@ * version information */ #define MC_CMD_GET_VERSION_V4_OUT_LEN 392 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2803,6 +2638,9 @@ * and board version information */ #define MC_CMD_GET_VERSION_V5_OUT_LEN 424 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -3065,8 +2903,11 @@ * subscribers. */ #define MC_CMD_PTP_OP_SET_SYNC_STATUS 0x1b -/* enum: Above this for future use. */ -#define MC_CMD_PTP_OP_MAX 0x1c +/* enum: X4 and later adapters should use this instead of + * PTP_OP_TIME_EVENT_SUBSCRIBE. Subscribe to receive periodic time events + * indicating the current NIC time + */ +#define MC_CMD_PTP_OP_TIME_EVENT_SUBSCRIBE_V2 0x1c /* MC_CMD_PTP_IN_ENABLE msgrequest */ #define MC_CMD_PTP_IN_ENABLE_LEN 16 @@ -3507,6 +3348,22 @@ #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_OFST 12 #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_LEN 4 +/* MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2 msgrequest */ +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_LEN 16 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_CMD_LEN 4 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ +/* Event queue ID */ +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_QUEUE_ID_OFST 8 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_QUEUE_ID_LEN 4 +/* Space for flags. */ +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_FLAGS_OFST 12 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_FLAGS_LEN 4 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_OFST 12 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_LBN 31 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_WIDTH 1 + /* MC_CMD_PTP_IN_MANFTEST_PPS msgrequest */ #define MC_CMD_PTP_IN_MANFTEST_PPS_LEN 12 /* MC_CMD_PTP_IN_CMD_OFST 0 */ @@ -3940,151 +3797,6 @@ #define MC_CMD_PTP_OUT_SET_SYNC_STATUS_LEN 0 -/***********************************/ -/* MC_CMD_CSR_READ32 - * Read 32bit words from the indirect memory map. - */ -#define MC_CMD_CSR_READ32 0xc -#undef MC_CMD_0xc_PRIVILEGE_CTG - -#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_CSR_READ32_IN msgrequest */ -#define MC_CMD_CSR_READ32_IN_LEN 12 -/* Address */ -#define MC_CMD_CSR_READ32_IN_ADDR_OFST 0 -#define MC_CMD_CSR_READ32_IN_ADDR_LEN 4 -#define MC_CMD_CSR_READ32_IN_STEP_OFST 4 -#define MC_CMD_CSR_READ32_IN_STEP_LEN 4 -#define MC_CMD_CSR_READ32_IN_NUMWORDS_OFST 8 -#define MC_CMD_CSR_READ32_IN_NUMWORDS_LEN 4 - -/* MC_CMD_CSR_READ32_OUT msgresponse */ -#define MC_CMD_CSR_READ32_OUT_LENMIN 4 -#define MC_CMD_CSR_READ32_OUT_LENMAX 252 -#define MC_CMD_CSR_READ32_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_CSR_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4) -/* The last dword is the status, not a value read */ -#define MC_CMD_CSR_READ32_OUT_BUFFER_OFST 0 -#define MC_CMD_CSR_READ32_OUT_BUFFER_LEN 4 -#define MC_CMD_CSR_READ32_OUT_BUFFER_MINNUM 1 -#define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM 63 -#define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM_MCDI2 255 - - -/***********************************/ -/* MC_CMD_CSR_WRITE32 - * Write 32bit dwords to the indirect memory map. - */ -#define MC_CMD_CSR_WRITE32 0xd -#undef MC_CMD_0xd_PRIVILEGE_CTG - -#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_CSR_WRITE32_IN msgrequest */ -#define MC_CMD_CSR_WRITE32_IN_LENMIN 12 -#define MC_CMD_CSR_WRITE32_IN_LENMAX 252 -#define MC_CMD_CSR_WRITE32_IN_LENMAX_MCDI2 1020 -#define MC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num)) -#define MC_CMD_CSR_WRITE32_IN_BUFFER_NUM(len) (((len)-8)/4) -/* Address */ -#define MC_CMD_CSR_WRITE32_IN_ADDR_OFST 0 -#define MC_CMD_CSR_WRITE32_IN_ADDR_LEN 4 -#define MC_CMD_CSR_WRITE32_IN_STEP_OFST 4 -#define MC_CMD_CSR_WRITE32_IN_STEP_LEN 4 -#define MC_CMD_CSR_WRITE32_IN_BUFFER_OFST 8 -#define MC_CMD_CSR_WRITE32_IN_BUFFER_LEN 4 -#define MC_CMD_CSR_WRITE32_IN_BUFFER_MINNUM 1 -#define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM 61 -#define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM_MCDI2 253 - -/* MC_CMD_CSR_WRITE32_OUT msgresponse */ -#define MC_CMD_CSR_WRITE32_OUT_LEN 4 -#define MC_CMD_CSR_WRITE32_OUT_STATUS_OFST 0 -#define MC_CMD_CSR_WRITE32_OUT_STATUS_LEN 4 - - -/***********************************/ -/* MC_CMD_HP - * These commands are used for HP related features. They are grouped under one - * MCDI command to avoid creating too many MCDI commands. - */ -#define MC_CMD_HP 0x54 -#undef MC_CMD_0x54_PRIVILEGE_CTG - -#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_HP_IN msgrequest */ -#define MC_CMD_HP_IN_LEN 16 -/* HP OCSD sub-command. When address is not NULL, request activation of OCSD at - * the specified address with the specified interval.When address is NULL, - * INTERVAL is interpreted as a command: 0: stop OCSD / 1: Report OCSD current - * state / 2: (debug) Show temperature reported by one of the supported - * sensors. - */ -#define MC_CMD_HP_IN_SUBCMD_OFST 0 -#define MC_CMD_HP_IN_SUBCMD_LEN 4 -/* enum: OCSD (Option Card Sensor Data) sub-command. */ -#define MC_CMD_HP_IN_OCSD_SUBCMD 0x0 -/* enum: Last known valid HP sub-command. */ -#define MC_CMD_HP_IN_LAST_SUBCMD 0x0 -/* The address to the array of sensor fields. (Or NULL to use a sub-command.) - */ -#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4 -#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8 -#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4 -#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4 -#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32 -#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32 -#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8 -#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4 -#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64 -#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32 -/* The requested update interval, in seconds. (Or the sub-command if ADDR is - * NULL.) - */ -#define MC_CMD_HP_IN_OCSD_INTERVAL_OFST 12 -#define MC_CMD_HP_IN_OCSD_INTERVAL_LEN 4 - -/* MC_CMD_HP_OUT msgresponse */ -#define MC_CMD_HP_OUT_LEN 4 -#define MC_CMD_HP_OUT_OCSD_STATUS_OFST 0 -#define MC_CMD_HP_OUT_OCSD_STATUS_LEN 4 -/* enum: OCSD stopped for this card. */ -#define MC_CMD_HP_OUT_OCSD_STOPPED 0x1 -/* enum: OCSD was successfully started with the address provided. */ -#define MC_CMD_HP_OUT_OCSD_STARTED 0x2 -/* enum: OCSD was already started for this card. */ -#define MC_CMD_HP_OUT_OCSD_ALREADY_STARTED 0x3 - - -/***********************************/ -/* MC_CMD_STACKINFO - * Get stack information. - */ -#define MC_CMD_STACKINFO 0xf -#undef MC_CMD_0xf_PRIVILEGE_CTG - -#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_STACKINFO_IN msgrequest */ -#define MC_CMD_STACKINFO_IN_LEN 0 - -/* MC_CMD_STACKINFO_OUT msgresponse */ -#define MC_CMD_STACKINFO_OUT_LENMIN 12 -#define MC_CMD_STACKINFO_OUT_LENMAX 252 -#define MC_CMD_STACKINFO_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_STACKINFO_OUT_LEN(num) (0+12*(num)) -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_NUM(len) (((len)-0)/12) -/* (thread ptr, stack size, free space) for each thread in system */ -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_OFST 0 -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_LEN 12 -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MINNUM 1 -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM 21 -#define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM_MCDI2 85 - - /***********************************/ /* MC_CMD_MDIO_READ * MDIO register read. @@ -4181,176 +3893,6 @@ /* MC_CMD_MDIO_STATUS_GOOD 0x8 */ -/***********************************/ -/* MC_CMD_DBI_WRITE - * Write DBI register(s). - */ -#define MC_CMD_DBI_WRITE 0x12 -#undef MC_CMD_0x12_PRIVILEGE_CTG - -#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_DBI_WRITE_IN msgrequest */ -#define MC_CMD_DBI_WRITE_IN_LENMIN 12 -#define MC_CMD_DBI_WRITE_IN_LENMAX 252 -#define MC_CMD_DBI_WRITE_IN_LENMAX_MCDI2 1020 -#define MC_CMD_DBI_WRITE_IN_LEN(num) (0+12*(num)) -#define MC_CMD_DBI_WRITE_IN_DBIWROP_NUM(len) (((len)-0)/12) -/* Each write op consists of an address (offset 0), byte enable/VF/CS2 (offset - * 32) and value (offset 64). See MC_CMD_DBIWROP_TYPEDEF. - */ -#define MC_CMD_DBI_WRITE_IN_DBIWROP_OFST 0 -#define MC_CMD_DBI_WRITE_IN_DBIWROP_LEN 12 -#define MC_CMD_DBI_WRITE_IN_DBIWROP_MINNUM 1 -#define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM 21 -#define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM_MCDI2 85 - -/* MC_CMD_DBI_WRITE_OUT msgresponse */ -#define MC_CMD_DBI_WRITE_OUT_LEN 0 - -/* MC_CMD_DBIWROP_TYPEDEF structuredef */ -#define MC_CMD_DBIWROP_TYPEDEF_LEN 12 -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_OFST 0 -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LEN 4 -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LBN 0 -#define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_WIDTH 32 -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_OFST 4 -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_LEN 4 -#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_OFST 4 -#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_LBN 16 -#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_WIDTH 16 -#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_OFST 4 -#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_LBN 15 -#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_WIDTH 1 -#define MC_CMD_DBIWROP_TYPEDEF_CS2_OFST 4 -#define MC_CMD_DBIWROP_TYPEDEF_CS2_LBN 14 -#define MC_CMD_DBIWROP_TYPEDEF_CS2_WIDTH 1 -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_LBN 32 -#define MC_CMD_DBIWROP_TYPEDEF_PARMS_WIDTH 32 -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_OFST 8 -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_LEN 4 -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_LBN 64 -#define MC_CMD_DBIWROP_TYPEDEF_VALUE_WIDTH 32 - - -/***********************************/ -/* MC_CMD_PORT_READ32 - * Read a 32-bit register from the indirect port register map. The port to - * access is implied by the Shared memory channel used. - */ -#define MC_CMD_PORT_READ32 0x14 - -/* MC_CMD_PORT_READ32_IN msgrequest */ -#define MC_CMD_PORT_READ32_IN_LEN 4 -/* Address */ -#define MC_CMD_PORT_READ32_IN_ADDR_OFST 0 -#define MC_CMD_PORT_READ32_IN_ADDR_LEN 4 - -/* MC_CMD_PORT_READ32_OUT msgresponse */ -#define MC_CMD_PORT_READ32_OUT_LEN 8 -/* Value */ -#define MC_CMD_PORT_READ32_OUT_VALUE_OFST 0 -#define MC_CMD_PORT_READ32_OUT_VALUE_LEN 4 -/* Status */ -#define MC_CMD_PORT_READ32_OUT_STATUS_OFST 4 -#define MC_CMD_PORT_READ32_OUT_STATUS_LEN 4 - - -/***********************************/ -/* MC_CMD_PORT_WRITE32 - * Write a 32-bit register to the indirect port register map. The port to - * access is implied by the Shared memory channel used. - */ -#define MC_CMD_PORT_WRITE32 0x15 - -/* MC_CMD_PORT_WRITE32_IN msgrequest */ -#define MC_CMD_PORT_WRITE32_IN_LEN 8 -/* Address */ -#define MC_CMD_PORT_WRITE32_IN_ADDR_OFST 0 -#define MC_CMD_PORT_WRITE32_IN_ADDR_LEN 4 -/* Value */ -#define MC_CMD_PORT_WRITE32_IN_VALUE_OFST 4 -#define MC_CMD_PORT_WRITE32_IN_VALUE_LEN 4 - -/* MC_CMD_PORT_WRITE32_OUT msgresponse */ -#define MC_CMD_PORT_WRITE32_OUT_LEN 4 -/* Status */ -#define MC_CMD_PORT_WRITE32_OUT_STATUS_OFST 0 -#define MC_CMD_PORT_WRITE32_OUT_STATUS_LEN 4 - - -/***********************************/ -/* MC_CMD_PORT_READ128 - * Read a 128-bit register from the indirect port register map. The port to - * access is implied by the Shared memory channel used. - */ -#define MC_CMD_PORT_READ128 0x16 - -/* MC_CMD_PORT_READ128_IN msgrequest */ -#define MC_CMD_PORT_READ128_IN_LEN 4 -/* Address */ -#define MC_CMD_PORT_READ128_IN_ADDR_OFST 0 -#define MC_CMD_PORT_READ128_IN_ADDR_LEN 4 - -/* MC_CMD_PORT_READ128_OUT msgresponse */ -#define MC_CMD_PORT_READ128_OUT_LEN 20 -/* Value */ -#define MC_CMD_PORT_READ128_OUT_VALUE_OFST 0 -#define MC_CMD_PORT_READ128_OUT_VALUE_LEN 16 -/* Status */ -#define MC_CMD_PORT_READ128_OUT_STATUS_OFST 16 -#define MC_CMD_PORT_READ128_OUT_STATUS_LEN 4 - - -/***********************************/ -/* MC_CMD_PORT_WRITE128 - * Write a 128-bit register to the indirect port register map. The port to - * access is implied by the Shared memory channel used. - */ -#define MC_CMD_PORT_WRITE128 0x17 - -/* MC_CMD_PORT_WRITE128_IN msgrequest */ -#define MC_CMD_PORT_WRITE128_IN_LEN 20 -/* Address */ -#define MC_CMD_PORT_WRITE128_IN_ADDR_OFST 0 -#define MC_CMD_PORT_WRITE128_IN_ADDR_LEN 4 -/* Value */ -#define MC_CMD_PORT_WRITE128_IN_VALUE_OFST 4 -#define MC_CMD_PORT_WRITE128_IN_VALUE_LEN 16 - -/* MC_CMD_PORT_WRITE128_OUT msgresponse */ -#define MC_CMD_PORT_WRITE128_OUT_LEN 4 -/* Status */ -#define MC_CMD_PORT_WRITE128_OUT_STATUS_OFST 0 -#define MC_CMD_PORT_WRITE128_OUT_STATUS_LEN 4 - -/* MC_CMD_CAPABILITIES structuredef */ -#define MC_CMD_CAPABILITIES_LEN 4 -/* Small buf table. */ -#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_LBN 0 -#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_WIDTH 1 -/* Turbo mode (for Maranello). */ -#define MC_CMD_CAPABILITIES_TURBO_LBN 1 -#define MC_CMD_CAPABILITIES_TURBO_WIDTH 1 -/* Turbo mode active (for Maranello). */ -#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_LBN 2 -#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_WIDTH 1 -/* PTP offload. */ -#define MC_CMD_CAPABILITIES_PTP_LBN 3 -#define MC_CMD_CAPABILITIES_PTP_WIDTH 1 -/* AOE mode. */ -#define MC_CMD_CAPABILITIES_AOE_LBN 4 -#define MC_CMD_CAPABILITIES_AOE_WIDTH 1 -/* AOE mode active. */ -#define MC_CMD_CAPABILITIES_AOE_ACTIVE_LBN 5 -#define MC_CMD_CAPABILITIES_AOE_ACTIVE_WIDTH 1 -/* AOE mode active. */ -#define MC_CMD_CAPABILITIES_FC_ACTIVE_LBN 6 -#define MC_CMD_CAPABILITIES_FC_ACTIVE_WIDTH 1 -#define MC_CMD_CAPABILITIES_RESERVED_LBN 7 -#define MC_CMD_CAPABILITIES_RESERVED_WIDTH 25 - - /***********************************/ /* MC_CMD_GET_BOARD_CFG * Returns the MC firmware configuration structure. @@ -4426,112 +3968,6 @@ #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM_MCDI2 32 -/***********************************/ -/* MC_CMD_DBI_READX - * Read DBI register(s) -- extended functionality - */ -#define MC_CMD_DBI_READX 0x19 -#undef MC_CMD_0x19_PRIVILEGE_CTG - -#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_DBI_READX_IN msgrequest */ -#define MC_CMD_DBI_READX_IN_LENMIN 8 -#define MC_CMD_DBI_READX_IN_LENMAX 248 -#define MC_CMD_DBI_READX_IN_LENMAX_MCDI2 1016 -#define MC_CMD_DBI_READX_IN_LEN(num) (0+8*(num)) -#define MC_CMD_DBI_READX_IN_DBIRDOP_NUM(len) (((len)-0)/8) -/* Each Read op consists of an address (offset 0), VF/CS2) */ -#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0 -#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8 -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0 -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4 -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0 -#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32 -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4 -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4 -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32 -#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32 -#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1 -#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31 -#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127 - -/* MC_CMD_DBI_READX_OUT msgresponse */ -#define MC_CMD_DBI_READX_OUT_LENMIN 4 -#define MC_CMD_DBI_READX_OUT_LENMAX 252 -#define MC_CMD_DBI_READX_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_DBI_READX_OUT_VALUE_NUM(len) (((len)-0)/4) -/* Value */ -#define MC_CMD_DBI_READX_OUT_VALUE_OFST 0 -#define MC_CMD_DBI_READX_OUT_VALUE_LEN 4 -#define MC_CMD_DBI_READX_OUT_VALUE_MINNUM 1 -#define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM 63 -#define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM_MCDI2 255 - -/* MC_CMD_DBIRDOP_TYPEDEF structuredef */ -#define MC_CMD_DBIRDOP_TYPEDEF_LEN 8 -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_OFST 0 -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LEN 4 -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LBN 0 -#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_WIDTH 32 -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_OFST 4 -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LEN 4 -#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_OFST 4 -#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_LBN 16 -#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_WIDTH 16 -#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_OFST 4 -#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_LBN 15 -#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_WIDTH 1 -#define MC_CMD_DBIRDOP_TYPEDEF_CS2_OFST 4 -#define MC_CMD_DBIRDOP_TYPEDEF_CS2_LBN 14 -#define MC_CMD_DBIRDOP_TYPEDEF_CS2_WIDTH 1 -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LBN 32 -#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_WIDTH 32 - - -/***********************************/ -/* MC_CMD_SET_RAND_SEED - * Set the 16byte seed for the MC pseudo-random generator. - */ -#define MC_CMD_SET_RAND_SEED 0x1a -#undef MC_CMD_0x1a_PRIVILEGE_CTG - -#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_SET_RAND_SEED_IN msgrequest */ -#define MC_CMD_SET_RAND_SEED_IN_LEN 16 -/* Seed value. */ -#define MC_CMD_SET_RAND_SEED_IN_SEED_OFST 0 -#define MC_CMD_SET_RAND_SEED_IN_SEED_LEN 16 - -/* MC_CMD_SET_RAND_SEED_OUT msgresponse */ -#define MC_CMD_SET_RAND_SEED_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_LTSSM_HIST - * Retrieve the history of the LTSSM, if the build supports it. - */ -#define MC_CMD_LTSSM_HIST 0x1b - -/* MC_CMD_LTSSM_HIST_IN msgrequest */ -#define MC_CMD_LTSSM_HIST_IN_LEN 0 - -/* MC_CMD_LTSSM_HIST_OUT msgresponse */ -#define MC_CMD_LTSSM_HIST_OUT_LENMIN 0 -#define MC_CMD_LTSSM_HIST_OUT_LENMAX 252 -#define MC_CMD_LTSSM_HIST_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_LTSSM_HIST_OUT_DATA_NUM(len) (((len)-0)/4) -/* variable number of LTSSM values, as bytes. The history is read-to-clear. */ -#define MC_CMD_LTSSM_HIST_OUT_DATA_OFST 0 -#define MC_CMD_LTSSM_HIST_OUT_DATA_LEN 4 -#define MC_CMD_LTSSM_HIST_OUT_DATA_MINNUM 0 -#define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM 63 -#define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM_MCDI2 255 - - /***********************************/ /* MC_CMD_DRV_ATTACH * Inform MCPU that this port is managed on the host (i.e. driver active). For @@ -4705,6 +4141,7 @@ /* Flags associated with this function */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4 #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN 4 +/* enum property: bitshift */ /* enum: Labels the lowest-numbered function visible to the OS */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY 0x0 /* enum: The function can control the link state of the physical port it is @@ -4731,22 +4168,6 @@ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TX_ONLY_VI_SPREADING_ENABLED 0x5 -/***********************************/ -/* MC_CMD_SHMUART - * Route UART output to circular buffer in shared memory instead. - */ -#define MC_CMD_SHMUART 0x1f - -/* MC_CMD_SHMUART_IN msgrequest */ -#define MC_CMD_SHMUART_IN_LEN 4 -/* ??? */ -#define MC_CMD_SHMUART_IN_FLAG_OFST 0 -#define MC_CMD_SHMUART_IN_FLAG_LEN 4 - -/* MC_CMD_SHMUART_OUT msgresponse */ -#define MC_CMD_SHMUART_OUT_LEN 0 - - /***********************************/ /* MC_CMD_PORT_RESET * Generic per-port reset. There is no equivalent for per-board reset. Locks @@ -4789,100 +4210,6 @@ #define MC_CMD_ENTITY_RESET_OUT_LEN 0 -/***********************************/ -/* MC_CMD_PCIE_CREDITS - * Read instantaneous and minimum flow control thresholds. - */ -#define MC_CMD_PCIE_CREDITS 0x21 - -/* MC_CMD_PCIE_CREDITS_IN msgrequest */ -#define MC_CMD_PCIE_CREDITS_IN_LEN 8 -/* poll period. 0 is disabled */ -#define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_OFST 0 -#define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_LEN 4 -/* wipe statistics */ -#define MC_CMD_PCIE_CREDITS_IN_WIPE_OFST 4 -#define MC_CMD_PCIE_CREDITS_IN_WIPE_LEN 4 - -/* MC_CMD_PCIE_CREDITS_OUT msgresponse */ -#define MC_CMD_PCIE_CREDITS_OUT_LEN 16 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_OFST 0 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_LEN 2 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_OFST 2 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_LEN 2 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_OFST 4 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_LEN 2 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_OFST 6 -#define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_LEN 2 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_OFST 8 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_LEN 2 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_OFST 10 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_LEN 2 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_OFST 12 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_LEN 2 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_OFST 14 -#define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_LEN 2 - - -/***********************************/ -/* MC_CMD_RXD_MONITOR - * Get histogram of RX queue fill level. - */ -#define MC_CMD_RXD_MONITOR 0x22 - -/* MC_CMD_RXD_MONITOR_IN msgrequest */ -#define MC_CMD_RXD_MONITOR_IN_LEN 12 -#define MC_CMD_RXD_MONITOR_IN_QID_OFST 0 -#define MC_CMD_RXD_MONITOR_IN_QID_LEN 4 -#define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_OFST 4 -#define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_LEN 4 -#define MC_CMD_RXD_MONITOR_IN_WIPE_OFST 8 -#define MC_CMD_RXD_MONITOR_IN_WIPE_LEN 4 - -/* MC_CMD_RXD_MONITOR_OUT msgresponse */ -#define MC_CMD_RXD_MONITOR_OUT_LEN 80 -#define MC_CMD_RXD_MONITOR_OUT_QID_OFST 0 -#define MC_CMD_RXD_MONITOR_OUT_QID_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_FILL_OFST 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_FILL_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_OFST 8 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_OFST 12 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_OFST 16 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_OFST 20 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_OFST 24 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_OFST 28 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_OFST 32 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_OFST 36 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_OFST 40 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_OFST 44 -#define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_OFST 48 -#define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_OFST 52 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_OFST 56 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_OFST 60 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_OFST 64 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_OFST 68 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_OFST 72 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_LEN 4 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_OFST 76 -#define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_LEN 4 - - /***********************************/ /* MC_CMD_PUTS * Copy the given ASCII string out onto UART and/or out of the network port. @@ -4931,6 +4258,54 @@ /* MC_CMD_GET_PHY_CFG_IN msgrequest */ #define MC_CMD_GET_PHY_CFG_IN_LEN 0 +/* MC_CMD_GET_PHY_CFG_IN_V2 msgrequest */ +#define MC_CMD_GET_PHY_CFG_IN_V2_LEN 8 +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_PHY_CFG_OUT msgresponse */ #define MC_CMD_GET_PHY_CFG_OUT_LEN 72 /* flags */ @@ -5026,6 +4401,9 @@ #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_OFST 8 #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN 21 #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_WIDTH 1 +#define MC_CMD_PHY_CAP_200000FDX_OFST 8 +#define MC_CMD_PHY_CAP_200000FDX_LBN 22 +#define MC_CMD_PHY_CAP_200000FDX_WIDTH 1 /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12 #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN 4 @@ -5059,6 +4437,7 @@ #define MC_CMD_MEDIA_DSFP 0x8 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN 4 +/* enum property: bitshift */ /* enum: Native clause 22 */ #define MC_CMD_MMD_CLAUSE22 0x0 #define MC_CMD_MMD_CLAUSE45_PMAPMD 0x1 /* enum */ @@ -5084,7 +4463,7 @@ #define MC_CMD_START_BIST 0x25 #undef MC_CMD_0x25_PRIVILEGE_CTG -#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN +#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND /* MC_CMD_START_BIST_IN msgrequest */ #define MC_CMD_START_BIST_IN_LEN 4 @@ -5124,7 +4503,7 @@ #define MC_CMD_POLL_BIST 0x26 #undef MC_CMD_0x26_PRIVILEGE_CTG -#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN +#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND /* MC_CMD_POLL_BIST_IN msgrequest */ #define MC_CMD_POLL_BIST_IN_LEN 0 @@ -5320,6 +4699,54 @@ /* MC_CMD_GET_LOOPBACK_MODES_IN msgrequest */ #define MC_CMD_GET_LOOPBACK_MODES_IN_LEN 0 +/* MC_CMD_GET_LOOPBACK_MODES_IN_V2 msgrequest */ +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_LEN 8 +/* Target port to request loopback modes for. Uses MAE_LINK_ENDPOINT_SELECTOR + * which identifies a real or virtual network port by MAE port and link end. + * See the structure definition for more details + */ +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_LOOPBACK_MODES_OUT msgresponse */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_LEN 40 /* Supported loopbacks. */ @@ -5333,6 +4760,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32 +/* enum property: bitshift */ /* enum: None. */ #define MC_CMD_LOOPBACK_NONE 0x0 /* enum: Data. */ @@ -5422,6 +4850,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96 #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5435,6 +4864,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160 #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5448,6 +4878,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224 #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5461,6 +4892,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288 #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ @@ -5479,6 +4911,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32 +/* enum property: bitshift */ /* enum: None. */ /* MC_CMD_LOOPBACK_NONE 0x0 */ /* enum: Data. */ @@ -5568,6 +5001,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5581,6 +5015,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5594,6 +5029,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5607,6 +5043,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported 25G loopbacks. */ @@ -5620,6 +5057,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported 50 loopbacks. */ @@ -5633,6 +5071,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported 100G loopbacks. */ @@ -5646,40 +5085,1070 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ -/* AN_TYPE structuredef: Auto-negotiation types defined in IEEE802.3 */ -#define AN_TYPE_LEN 4 -#define AN_TYPE_TYPE_OFST 0 -#define AN_TYPE_TYPE_LEN 4 -/* enum: None, AN disabled or not supported */ -#define MC_CMD_AN_NONE 0x0 -/* enum: Clause 28 - BASE-T */ -#define MC_CMD_AN_CLAUSE28 0x1 -/* enum: Clause 37 - BASE-X */ -#define MC_CMD_AN_CLAUSE37 0x2 -/* enum: Clause 73 - BASE-R startup protocol for backplane and copper cable - * assemblies. Includes Clause 72/Clause 92 link-training. +/* MC_CMD_GET_LOOPBACK_MODES_OUT_V3 msgresponse: Supported loopback modes for + * newer NICs with 200G support */ -#define MC_CMD_AN_CLAUSE73 0x3 -#define AN_TYPE_TYPE_LBN 0 -#define AN_TYPE_TYPE_WIDTH 32 - -/* FEC_TYPE structuredef: Forward error correction types defined in IEEE802.3 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_LEN 72 +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LBN 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_WIDTH 32 +/* enum property: bitshift */ +/* enum: None. */ +/* MC_CMD_LOOPBACK_NONE 0x0 */ +/* enum: Data. */ +/* MC_CMD_LOOPBACK_DATA 0x1 */ +/* enum: GMAC. */ +/* MC_CMD_LOOPBACK_GMAC 0x2 */ +/* enum: XGMII. */ +/* MC_CMD_LOOPBACK_XGMII 0x3 */ +/* enum: XGXS. */ +/* MC_CMD_LOOPBACK_XGXS 0x4 */ +/* enum: XAUI. */ +/* MC_CMD_LOOPBACK_XAUI 0x5 */ +/* enum: GMII. */ +/* MC_CMD_LOOPBACK_GMII 0x6 */ +/* enum: SGMII. */ +/* MC_CMD_LOOPBACK_SGMII 0x7 */ +/* enum: XGBR. */ +/* MC_CMD_LOOPBACK_XGBR 0x8 */ +/* enum: XFI. */ +/* MC_CMD_LOOPBACK_XFI 0x9 */ +/* enum: XAUI Far. */ +/* MC_CMD_LOOPBACK_XAUI_FAR 0xa */ +/* enum: GMII Far. */ +/* MC_CMD_LOOPBACK_GMII_FAR 0xb */ +/* enum: SGMII Far. */ +/* MC_CMD_LOOPBACK_SGMII_FAR 0xc */ +/* enum: XFI Far. */ +/* MC_CMD_LOOPBACK_XFI_FAR 0xd */ +/* enum: GPhy. */ +/* MC_CMD_LOOPBACK_GPHY 0xe */ +/* enum: PhyXS. */ +/* MC_CMD_LOOPBACK_PHYXS 0xf */ +/* enum: PCS. */ +/* MC_CMD_LOOPBACK_PCS 0x10 */ +/* enum: PMA-PMD. */ +/* MC_CMD_LOOPBACK_PMAPMD 0x11 */ +/* enum: Cross-Port. */ +/* MC_CMD_LOOPBACK_XPORT 0x12 */ +/* enum: XGMII-Wireside. */ +/* MC_CMD_LOOPBACK_XGMII_WS 0x13 */ +/* enum: XAUI Wireside. */ +/* MC_CMD_LOOPBACK_XAUI_WS 0x14 */ +/* enum: XAUI Wireside Far. */ +/* MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 */ +/* enum: XAUI Wireside near. */ +/* MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 */ +/* enum: GMII Wireside. */ +/* MC_CMD_LOOPBACK_GMII_WS 0x17 */ +/* enum: XFI Wireside. */ +/* MC_CMD_LOOPBACK_XFI_WS 0x18 */ +/* enum: XFI Wireside Far. */ +/* MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 */ +/* enum: PhyXS Wireside. */ +/* MC_CMD_LOOPBACK_PHYXS_WS 0x1a */ +/* enum: PMA lanes MAC-Serdes. */ +/* MC_CMD_LOOPBACK_PMA_INT 0x1b */ +/* enum: KR Serdes Parallel (Encoder). */ +/* MC_CMD_LOOPBACK_SD_NEAR 0x1c */ +/* enum: KR Serdes Serial. */ +/* MC_CMD_LOOPBACK_SD_FAR 0x1d */ +/* enum: PMA lanes MAC-Serdes Wireside. */ +/* MC_CMD_LOOPBACK_PMA_INT_WS 0x1e */ +/* enum: KR Serdes Parallel Wireside (Full PCS). */ +/* MC_CMD_LOOPBACK_SD_FEP2_WS 0x1f */ +/* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */ +/* MC_CMD_LOOPBACK_SD_FEP1_5_WS 0x20 */ +/* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */ +/* MC_CMD_LOOPBACK_SD_FEP_WS 0x21 */ +/* enum: KR Serdes Serial Wireside. */ +/* MC_CMD_LOOPBACK_SD_FES_WS 0x22 */ +/* enum: Near side of AOE Siena side port */ +/* MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 */ +/* enum: Medford Wireside datapath loopback */ +/* MC_CMD_LOOPBACK_DATA_WS 0x24 */ +/* enum: Force link up without setting up any physical loopback (snapper use + * only) */ -#define FEC_TYPE_LEN 4 -#define FEC_TYPE_TYPE_OFST 0 -#define FEC_TYPE_TYPE_LEN 4 -/* enum: No FEC */ -#define MC_CMD_FEC_NONE 0x0 -/* enum: Clause 74 BASE-R FEC (a.k.a Firecode) */ -#define MC_CMD_FEC_BASER 0x1 -/* enum: Clause 91/Clause 108 Reed-Solomon FEC */ +/* MC_CMD_LOOPBACK_FORCE_EXT_LINK 0x25 */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_OFST 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_OFST 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LBN 64 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_OFST 12 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LBN 96 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_OFST 16 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_OFST 16 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LBN 128 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_OFST 20 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LBN 160 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_OFST 24 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_OFST 24 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LBN 192 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_OFST 28 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LBN 224 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_OFST 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_OFST 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LBN 256 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_OFST 36 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LBN 288 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 25G loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_OFST 40 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_OFST 40 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LBN 320 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_OFST 44 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LBN 352 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 50 loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_OFST 48 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_OFST 48 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LBN 384 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_OFST 52 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LBN 416 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 100G loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_OFST 56 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_OFST 56 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LBN 448 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_OFST 60 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LBN 480 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 200G loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_OFST 64 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_OFST 64 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LBN 512 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_OFST 68 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LBN 544 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ + +/* AN_TYPE structuredef: Auto-negotiation types defined in IEEE802.3 */ +#define AN_TYPE_LEN 4 +#define AN_TYPE_TYPE_OFST 0 +#define AN_TYPE_TYPE_LEN 4 +/* enum: None, AN disabled or not supported */ +#define MC_CMD_AN_NONE 0x0 +/* enum: Clause 28 - BASE-T */ +#define MC_CMD_AN_CLAUSE28 0x1 +/* enum: Clause 37 - BASE-X */ +#define MC_CMD_AN_CLAUSE37 0x2 +/* enum: Clause 73 - BASE-R startup protocol for backplane and copper cable + * assemblies. Includes Clause 72/Clause 92 link-training. + */ +#define MC_CMD_AN_CLAUSE73 0x3 +#define AN_TYPE_TYPE_LBN 0 +#define AN_TYPE_TYPE_WIDTH 32 + +/* FEC_TYPE structuredef: Forward error correction types defined in IEEE802.3 + */ +#define FEC_TYPE_LEN 4 +#define FEC_TYPE_TYPE_OFST 0 +#define FEC_TYPE_TYPE_LEN 4 +/* enum: No FEC */ +#define MC_CMD_FEC_NONE 0x0 +/* enum: IEEE 802.3, Clause 74 BASE-R FEC (a.k.a Firecode) */ +#define MC_CMD_FEC_BASER 0x1 +/* enum: IEEE 802.3, Clause 91/Clause 108 Reed-Solomon FEC */ #define MC_CMD_FEC_RS 0x2 +/* enum: IEEE 802.3, Clause 161, interleaved RS-FEC sublayer for 100GBASE-R + * PHYs + */ +#define MC_CMD_FEC_IEEE_RS_INT 0x3 +/* enum: Ethernet Consortium, Low Latency RS-FEC. RS(272, 258). Replaces FEC + * specified in Clause 119 for 100/200G PHY. Replaces FEC specified in Clause + * 134 for 50G PHY. + */ +#define MC_CMD_FEC_ETCS_RS_LL 0x4 +/* enum: FEC mode selected automatically */ +#define MC_CMD_FEC_AUTO 0x5 #define FEC_TYPE_TYPE_LBN 0 #define FEC_TYPE_TYPE_WIDTH 32 +/* MC_CMD_ETH_TECH structuredef: Ethernet technology as defined by IEEE802.3, + * Ethernet Technology Consortium, proprietary technologies. The driver must + * not use technologies labelled NONE and AUTO. + */ +#define MC_CMD_ETH_TECH_LEN 16 +/* The enums in this field can be used either as bitwise indices into a tech + * mask (e.g. see MC_CMD_ETH_AN_FIELDS/TECH_MASK for example) or as regular + * enums (e.g. see MC_CMD_LINK_CTRL_IN/ADVERTISED_TECH_ABILITIES_MASK). This + * structure must be updated to add new technologies when projects that need + * them arise. An incomplete list of possible expansion in the future include: + * 100GBASE_KP4, 800GBASE_CR8, 800GBASE_KR8, 800GBASE_DR8, 800GBASE_SR8 + * 800GBASE_VR8 + */ +#define MC_CMD_ETH_TECH_TECH_OFST 0 +#define MC_CMD_ETH_TECH_TECH_LEN 16 +/* enum: 1000BASE-KX - 1000BASE-X PCS/PMA over an electrical backplane PMD. See + * IEEE 802.3 Clause 70 + */ +#define MC_CMD_ETH_TECH_1000BASEKX 0x0 +/* enum: 10GBASE-R - PCS/PMA over an electrical backplane PMD. Refer to IEEE + * 802.3 Clause 72 + */ +#define MC_CMD_ETH_TECH_10GBASE_KR 0x1 +/* enum: 40GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 + * Clause 84. + */ +#define MC_CMD_ETH_TECH_40GBASE_KR4 0x2 +/* enum: 40GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD. See + * IEEE 802.3 Clause 85 + */ +#define MC_CMD_ETH_TECH_40GBASE_CR4 0x3 +/* enum: 40GBASE-R PCS/PMA over 4 lane multimode fiber PMD as specified in + * Clause 86 + */ +#define MC_CMD_ETH_TECH_40GBASE_SR4 0x4 +/* enum: 40GBASE-R PCS/PMA over 4 WDM lane single mode fiber PMD with long + * reach. See IEEE 802.3 Clause 87 + */ +#define MC_CMD_ETH_TECH_40GBASE_LR4 0x5 +/* enum: 25GBASE-R PCS/PMA over shielded balanced copper cable PMD. See IEEE + * 802.3 Clause 110 + */ +#define MC_CMD_ETH_TECH_25GBASE_CR 0x6 +/* enum: 25GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 + * Clause 111 + */ +#define MC_CMD_ETH_TECH_25GBASE_KR 0x7 +/* enum: 25GBASE-R PCS/PMA over multimode fiber PMD. Refer to IEEE 802.3 Clause + * 112 + */ +#define MC_CMD_ETH_TECH_25GBASE_SR 0x8 +/* enum: An Ethernet Physical layer operating at 50 Gb/s on twin-axial copper + * cable. Refer to Ethernet Technology Consortium 25/50G Ethernet Spec. + */ +#define MC_CMD_ETH_TECH_50GBASE_CR2 0x9 +/* enum: An Ethernet Physical layer operating at 50 Gb/s on copper backplane. + * Refer to Ethernet Technology Consortium 25/50G Ethernet Spec. + */ +#define MC_CMD_ETH_TECH_50GBASE_KR2 0xa +/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 + * Clause 93 + */ +#define MC_CMD_ETH_TECH_100GBASE_KR4 0xb +/* enum: 100GBASE-R PCS/PMA over 4 lane multimode fiber PMD. See IEEE 802.3 + * Clause 95 + */ +#define MC_CMD_ETH_TECH_100GBASE_SR4 0xc +/* enum: 100GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD. See + * IEEE 802.3 Clause 92 + */ +#define MC_CMD_ETH_TECH_100GBASE_CR4 0xd +/* enum: 100GBASE-R PCS/PMA over 4 WDM lane single mode fiber PMD, with + * long/extended reach,. See IEEE 802.3 Clause 88 + */ +#define MC_CMD_ETH_TECH_100GBASE_LR4_ER4 0xe +/* enum: An Ethernet Physical layer operating at 50 Gb/s on short reach fiber. + * Refer to Ethernet Technology Consortium 25/50G Ethernet Spec. + */ +#define MC_CMD_ETH_TECH_50GBASE_SR2 0xf +/* enum: 1000BASEX PCS/PMA. See IEEE 802.3 Clause 36 over undefined PMD, duplex + * mode unknown + */ +#define MC_CMD_ETH_TECH_1000BASEX 0x10 +/* enum: Non-standardised. 10G direct attach */ +#define MC_CMD_ETH_TECH_10GBASE_CR 0x11 +/* enum: 10GBASE-SR fiber over 850nm optics. See IEEE 802.3 Clause 52 */ +#define MC_CMD_ETH_TECH_10GBASE_SR 0x12 +/* enum: 10GBASE-LR fiber over 1310nm optics. See IEEE 802.3 Clause 52 */ +#define MC_CMD_ETH_TECH_10GBASE_LR 0x13 +/* enum: 10GBASE-LRM fiber over 1310 nm optics. See IEEE 802.3 Clause 68 */ +#define MC_CMD_ETH_TECH_10GBASE_LRM 0x14 +/* enum: 10GBASE-ER fiber over 1550nm optics. See IEEE 802.3 Clause 52 */ +#define MC_CMD_ETH_TECH_10GBASE_ER 0x15 +/* enum: 50GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 + * Clause 137 + */ +#define MC_CMD_ETH_TECH_50GBASE_KR 0x16 +/* enum: 50GBASE-SR PCS/PMA over multimode fiber PMD as specified in Clause 138 + */ +#define MC_CMD_ETH_TECH_50GBASE_SR 0x17 +/* enum: 50GBASE-CR PCS/PMA over shielded copper balanced cable PMD. See IEEE + * 802.3 Clause 136 + */ +#define MC_CMD_ETH_TECH_50GBASE_CR 0x18 +/* enum: 50GBASE-R PCS/PMA over single mode fiber PMD as specified in Clause + * 139. + */ +#define MC_CMD_ETH_TECH_50GBASE_LR_ER_FR 0x19 +/* enum: 100 Gb/s PHY using 100GBASE-R encoding over single-mode fiber with + * reach up to at least 500 m (see IEEE 802.3 Clause 140) + */ +#define MC_CMD_ETH_TECH_50GBASE_DR 0x1a +/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 + * Clause 137 + */ +#define MC_CMD_ETH_TECH_100GBASE_KR2 0x1b +/* enum: 100GBASE-R PCS/PMA over 2 lane multimode fiber PMD. See IEEE 802.3 + * Clause 138 + */ +#define MC_CMD_ETH_TECH_100GBASE_SR2 0x1c +/* enum: 100GBASE-R PCS/PMA over 2 lane shielded copper balanced cable PMD. See + * IEEE 802.3 Clause 136 + */ +#define MC_CMD_ETH_TECH_100GBASE_CR2 0x1d +/* enum: Unknown source */ +#define MC_CMD_ETH_TECH_100GBASE_LR2_ER2_FR2 0x1e +/* enum: Unknown source */ +#define MC_CMD_ETH_TECH_100GBASE_DR2 0x1f +/* enum: 200GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 + * Clause 137 + */ +#define MC_CMD_ETH_TECH_200GBASE_KR4 0x20 +/* enum: 200GBASE-R PCS/PMA over 4 lane multimode fiber PMD. See IEEE 802.3 + * Clause 138 + */ +#define MC_CMD_ETH_TECH_200GBASE_SR4 0x21 +/* enum: 200GBASE-R PCS/PMA over 4 WDM lane single-mode fiber PMD as specified + * in Clause 122 + */ +#define MC_CMD_ETH_TECH_200GBASE_LR4_ER4_FR4 0x22 +/* enum: 200GBASE-R PCS/PMA over 4-lane single-mode fiber PMD. See IEEE 802.3 + * Clause 121 + */ +#define MC_CMD_ETH_TECH_200GBASE_DR4 0x23 +/* enum: 200GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD as + * specified in Clause 136 + */ +#define MC_CMD_ETH_TECH_200GBASE_CR4 0x24 +/* enum: Ethernet Technology Consortium 400G AN Spec. 400GBASE-KR8 PMD uses + * 802.3 Clause 137, but the number PMD lanes is 8. + */ +#define MC_CMD_ETH_TECH_400GBASE_KR8 0x25 +/* enum: 400GBASE-R PCS/PMA over 8-lane multimode fiber PMD. See IEEE 802.3 + * Clause 138 + */ +#define MC_CMD_ETH_TECH_400GBASE_SR8 0x26 +/* enum: 400GBASE-R PCS/PMA over 8 WDM lane single-mode fiber PMD. See IEEE + * 802.3 Clause 122 + */ +#define MC_CMD_ETH_TECH_400GBASE_LR8_ER8_FR8 0x27 +/* enum: Unknown source */ +#define MC_CMD_ETH_TECH_400GBASE_DR8 0x28 +/* enum: Ethernet Technology Consortium 400G AN Spec. 400GBASE-CR8 PMD uses + * IEEE 802.3 Clause 136, but the number PMD lanes is 8. + */ +#define MC_CMD_ETH_TECH_400GBASE_CR8 0x29 +/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3ck + * Clause 163. + */ +#define MC_CMD_ETH_TECH_100GBASE_KR 0x2a +/* enum: IEEE 802.3ck. 100G PHY with PMD as specified in Clause 167 over short + * reach fiber + */ +#define MC_CMD_ETH_TECH_100GBASE_SR 0x2b +/* enum: 100G PMD together with single-mode fiber medium. See IEEE 802.3 Clause + * 140 + */ +#define MC_CMD_ETH_TECH_100GBASE_LR_ER_FR 0x2c +/* enum: 100GBASE-R PCS/PMA over shielded balanced copper cable PMD. See IEEE + * 802.3 in Clause 162 IEEE 802.3ck. + */ +#define MC_CMD_ETH_TECH_100GBASE_CR 0x2d +/* enum: 100G PMD together with single-mode fiber medium. See IEEE 802.3 Clause + * 140 + */ +#define MC_CMD_ETH_TECH_100GBASE_DR 0x2e +/* enum: 200GBASE-R PCS/PMA over an electrical backplane PMD as specified in + * Clause 163 IEEE 802.3ck + */ +#define MC_CMD_ETH_TECH_200GBASE_KR2 0x2f +/* enum: 200G PHY with PMD as specified in Clause 167 over short reach fiber + * IEEE 802.3ck + */ +#define MC_CMD_ETH_TECH_200GBASE_SR2 0x30 +/* enum: Unknown source */ +#define MC_CMD_ETH_TECH_200GBASE_LR2_ER2_FR2 0x31 +/* enum: Unknown source */ +#define MC_CMD_ETH_TECH_200GBASE_DR2 0x32 +/* enum: 200GBASE-R PCS/PMA over 2 lane shielded balanced copper cable PMD as + * specified in Clause 162 IEEE 802.3ck. + */ +#define MC_CMD_ETH_TECH_200GBASE_CR2 0x33 +/* enum: 400GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3 + * Clause 163 IEEE 802.3ck. + */ +#define MC_CMD_ETH_TECH_400GBASE_KR4 0x34 +/* enum: 400G PHY with PMD over short reach fiber. See Clause 167 of IEEE + * 802.3ck. + */ +#define MC_CMD_ETH_TECH_400GBASE_SR4 0x35 +/* enum: 400GBASE-R PCS/PMA over 4 WDM lane single-mode fiber PMD. See IEEE + * 802.3 Clause 151 + */ +#define MC_CMD_ETH_TECH_400GBASE_LR4_ER4_FR4 0x36 +/* enum: 400GBASE-R PCS/PMA over 4-lane single-mode fiber PMD as specified in + * Clause 124 + */ +#define MC_CMD_ETH_TECH_400GBASE_DR4 0x37 +/* enum: 400GBASE-R PCS/PMA over 4 lane shielded balanced copper cable PMD as + * specified in Clause 162 of IEEE 802.3ck. + */ +#define MC_CMD_ETH_TECH_400GBASE_CR4 0x38 +/* enum: Automatic tech mode. The driver must not use this. */ +#define MC_CMD_ETH_TECH_AUTO 0x39 +/* enum: See IEEE 802.3cc-2017 Clause 114 */ +#define MC_CMD_ETH_TECH_25GBASE_LR_ER 0x3a +/* enum: Up to 7 m over twinaxial copper cable assembly (10 lanes, 10 Gbit/s + * each) See IEEE 802.3ba-2010 Clause 85 + */ +#define MC_CMD_ETH_TECH_100GBASE_CR10 0x3b +/* enum: Invalid tech mode. The driver must not use this. */ +#define MC_CMD_ETH_TECH_NONE 0x7f +#define MC_CMD_ETH_TECH_TECH_LBN 0 +#define MC_CMD_ETH_TECH_TECH_WIDTH 128 + +/* MC_CMD_LINK_STATUS_FLAGS structuredef */ +#define MC_CMD_LINK_STATUS_FLAGS_LEN 8 +/* Flags used to report the current configuration/state of the link. */ +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_OFST 0 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LEN 8 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_OFST 0 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_LEN 4 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_LBN 0 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_WIDTH 32 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_OFST 4 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_LEN 4 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_LBN 32 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_WIDTH 32 +/* enum property: bitshift */ +/* enum: Whether we have overall link up */ +#define MC_CMD_LINK_STATUS_FLAGS_LINK_UP 0x0 +/* enum: If set, the PHY has no external RX link synchronisation */ +#define MC_CMD_LINK_STATUS_FLAGS_NO_PHY_LINK 0x1 +/* enum: If set, PMD/MDI is not connected (e.g. cable disconnected, module cage + * empty) + */ +#define MC_CMD_LINK_STATUS_FLAGS_PMD_MDI_DISCONNECTED 0x2 +/* enum: Set on error while decoding module data (e.g. module EEPROM does not + * contain valid values, has checksum errors, etc.) + */ +#define MC_CMD_LINK_STATUS_FLAGS_PMD_BAD 0x3 +/* enum: Set when module unsupported (e.g. unsupported link rate or link + * technology) + */ +#define MC_CMD_LINK_STATUS_FLAGS_PMD_UNSUPPORTED 0x4 +/* enum: Set on error while communicating with the module (e.g. I2C errors + * while reading EEPROM) + */ +#define MC_CMD_LINK_STATUS_FLAGS_PMD_COMMS_FAULT 0x5 +/* enum: Set on module overcurrent/overvoltage condition */ +#define MC_CMD_LINK_STATUS_FLAGS_PMD_POWER_FAULT 0x6 +/* enum: Set on module overtemperature condition */ +#define MC_CMD_LINK_STATUS_FLAGS_PMD_THERMAL_FAULT 0x7 +/* enum: If set, the module is indicating Loss of Signal */ +#define MC_CMD_LINK_STATUS_FLAGS_PMD_LOS 0x8 +/* enum: If set, PMA is indicating loss of CDR lock (clock sync) */ +#define MC_CMD_LINK_STATUS_FLAGS_PMA_NO_CDR_LOCK 0x9 +/* enum: If set, PMA is indicating loss of analog signal */ +#define MC_CMD_LINK_STATUS_FLAGS_PMA_LOS 0xa +/* enum: If set, PCS is indicating loss of block lock */ +#define MC_CMD_LINK_STATUS_FLAGS_PCS_NO_BLOCK_LOCK 0xb +/* enum: If set, PCS is indicating loss of alignment marker lock on one or more + * lanes + */ +#define MC_CMD_LINK_STATUS_FLAGS_PCS_NO_AM_LOCK 0xc +/* enum: If set, PCS is indicating loss of overall alignment lock */ +#define MC_CMD_LINK_STATUS_FLAGS_PCS_NO_ALIGN_LOCK 0xd +/* enum: If set, PCS is indicating high bit error rate condition. */ +#define MC_CMD_LINK_STATUS_FLAGS_PCS_HI_BER 0xe +/* enum: If set, FEC is indicating loss of FEC lock */ +#define MC_CMD_LINK_STATUS_FLAGS_FEC_NO_LOCK 0xf +/* enum: If set, indicates that the number of symbol errors in a 8192-codeword + * window has exceeded the threshold K (417). + */ +#define MC_CMD_LINK_STATUS_FLAGS_FEC_HI_SER 0x10 +/* enum: If set, the receiver has detected the local FEC has degraded. */ +#define MC_CMD_LINK_STATUS_FLAGS_FEC_LOCAL_DEGRADED 0x11 +/* enum: If set, the receiver has detected the remote FEC has degraded. */ +#define MC_CMD_LINK_STATUS_FLAGS_FEC_RM_DEGRADED 0x12 +/* enum: If set, the number of symbol errors is over an internal threshold. */ +#define MC_CMD_LINK_STATUS_FLAGS_FEC_DEGRADED_SER 0x13 +/* enum: If set, autonegotiation has detected an auto-negotiation capable link + * partner + */ +#define MC_CMD_LINK_STATUS_FLAGS_AN_ABLE 0x14 +/* enum: If set, autonegotiation base page exchange has failed */ +#define MC_CMD_LINK_STATUS_FLAGS_AN_BP_FAILED 0x15 +/* enum: If set, autonegotiation next page exchange has failed */ +#define MC_CMD_LINK_STATUS_FLAGS_AN_NP_FAILED 0x16 +/* enum: If set, autonegotiation has failed to negotiate a common set of + * capabilities + */ +#define MC_CMD_LINK_STATUS_FLAGS_AN_NO_HCD 0x17 +/* enum: If set, local end link training has failed to establish link training + * frame lock on one or more lanes + */ +#define MC_CMD_LINK_STATUS_FLAGS_LT_NO_LOCAL_FRAME_LOCK 0x18 +/* enum: If set, remote end link training has failed to establish link training + * frame lock on one or more lanes + */ +#define MC_CMD_LINK_STATUS_FLAGS_LT_NO_RM_FRAME_LOCK 0x19 +/* enum: If set, remote end has failed to assert Receiver Ready (link training + * success) within the designated timeout + */ +#define MC_CMD_LINK_STATUS_FLAGS_LT_NO_RX_READY 0x1a +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LBN 0 +#define MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_WIDTH 64 + +/* MC_CMD_PAUSE_MODE structuredef */ +#define MC_CMD_PAUSE_MODE_LEN 1 +#define MC_CMD_PAUSE_MODE_TYPE_OFST 0 +#define MC_CMD_PAUSE_MODE_TYPE_LEN 1 +/* enum: See IEEE 802.3 Clause 73.6.6 */ +#define MC_CMD_PAUSE_MODE_AN_PAUSE 0x0 +/* enum: See IEEE 802.3 Clause 73.6.6 */ +#define MC_CMD_PAUSE_MODE_AN_ASYM_DIR 0x1 +#define MC_CMD_PAUSE_MODE_TYPE_LBN 0 +#define MC_CMD_PAUSE_MODE_TYPE_WIDTH 8 + +/* MC_CMD_ETH_AN_FIELDS structuredef: Fields used for IEEE 802.3 Clause 73 + * Auto-Negotiation. Warning - This is fixed size and cannot be extended. This + * structure is used to define autonegotiable abilities (advertised, link + * partner and supported abilities). + */ +#define MC_CMD_ETH_AN_FIELDS_LEN 25 +/* Mask of Ethernet technologies. The bit indices in this mask are taken from + * the TECH field in the MC_CMD_ETH_TECH structure. + */ +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_OFST 0 +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_LEN 16 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_ETH_TECH/TECH */ +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_LBN 0 +#define MC_CMD_ETH_AN_FIELDS_TECH_MASK_WIDTH 128 +/* Mask of supported FEC modes */ +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_OFST 16 +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* FEC_TYPE/TYPE */ +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_LBN 128 +#define MC_CMD_ETH_AN_FIELDS_FEC_MASK_WIDTH 32 +/* Mask of requested FEC modes */ +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_OFST 20 +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* FEC_TYPE/TYPE */ +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_LBN 160 +#define MC_CMD_ETH_AN_FIELDS_FEC_REQ_WIDTH 32 +/* Bitmask of negotiated pause modes */ +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_OFST 24 +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_LEN 1 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_PAUSE_MODE/TYPE */ +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_LBN 192 +#define MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_WIDTH 8 + +/* MC_CMD_LOOPBACK_V2 structuredef: Loopback modes for use with the new + * MC_CMD_LINK_CTRL and MC_CMD_LINK_STATE. These loopback modes are not + * supported in other getlink/setlink commands. + */ +#define MC_CMD_LOOPBACK_V2_LEN 4 +#define MC_CMD_LOOPBACK_V2_MODE_OFST 0 +#define MC_CMD_LOOPBACK_V2_MODE_LEN 4 +/* enum: No loopback */ +#define MC_CMD_LOOPBACK_V2_NONE 0x0 +/* enum: Let firmware choose a supported loopback mode */ +#define MC_CMD_LOOPBACK_V2_AUTO 0x1 +/* enum: Loopback after the MAC */ +#define MC_CMD_LOOPBACK_V2_POST_MAC 0x2 +/* enum: Loopback after the PCS */ +#define MC_CMD_LOOPBACK_V2_POST_PCS 0x3 +/* enum: Loopback after the PMA */ +#define MC_CMD_LOOPBACK_V2_POST_PMA 0x4 +/* enum: Loopback after the MDI Wireside */ +#define MC_CMD_LOOPBACK_V2_POST_MDI_WS 0x5 +/* enum: Loopback after the PMA Wireside */ +#define MC_CMD_LOOPBACK_V2_POST_PMA_WS 0x6 +/* enum: Loopback after the PCS Wireside */ +#define MC_CMD_LOOPBACK_V2_POST_PCS_WS 0x7 +/* enum: Loopback after the MAC Wireside */ +#define MC_CMD_LOOPBACK_V2_POST_MAC_WS 0x8 +/* enum: Loopback after the MAC FIFOs (before the MAC) */ +#define MC_CMD_LOOPBACK_V2_PRE_MAC 0x9 +#define MC_CMD_LOOPBACK_V2_MODE_LBN 0 +#define MC_CMD_LOOPBACK_V2_MODE_WIDTH 32 + +/* MC_CMD_FCNTL structuredef */ +#define MC_CMD_FCNTL_LEN 4 +#define MC_CMD_FCNTL_MASK_OFST 0 +#define MC_CMD_FCNTL_MASK_LEN 4 +/* enum: Flow control is off. */ +#define MC_CMD_FCNTL_OFF 0x0 +/* enum: Respond to flow control. */ +#define MC_CMD_FCNTL_RESPOND 0x1 +/* enum: Respond to and Issue flow control. */ +#define MC_CMD_FCNTL_BIDIR 0x2 +/* enum: Auto negotiate flow control. */ +#define MC_CMD_FCNTL_AUTO 0x3 +/* enum: Priority flow control. This is only supported on KSB. */ +#define MC_CMD_FCNTL_QBB 0x4 +/* enum: Issue flow control. */ +#define MC_CMD_FCNTL_GENERATE 0x5 +#define MC_CMD_FCNTL_MASK_LBN 0 +#define MC_CMD_FCNTL_MASK_WIDTH 32 + +/* MC_CMD_LINK_FLAGS structuredef */ +#define MC_CMD_LINK_FLAGS_LEN 4 +/* The enums defined in this field are used as indices into the + * MC_CMD_LINK_FLAGS bitmask. + */ +#define MC_CMD_LINK_FLAGS_MASK_OFST 0 +#define MC_CMD_LINK_FLAGS_MASK_LEN 4 +/* enum property: bitshift */ +/* enum: Enable auto-negotiation. If AN is enabled, link technology and FEC + * mode are determined by advertised capabilities and requested FEC modes, + * combined with link partner capabilities. If AN is disabled, link technology + * is forced to LINK_TECHNOLOGY and FEC mode is forced to FEC_MODE. Not valid + * if loopback is enabled + */ +#define MC_CMD_LINK_FLAGS_AUTONEG_EN 0x0 +/* enum: Enable parallel detect. In addition to AN, try to sense partner forced + * speed/FEC mode (when partner AN disabled). Only valid if AN is enabled. + */ +#define MC_CMD_LINK_FLAGS_PARALLEL_DETECT_EN 0x1 +/* enum: Force link down, in electrical idle. */ +#define MC_CMD_LINK_FLAGS_LINK_DISABLE 0x2 +/* enum: Ignore the sequence number and always apply. */ +#define MC_CMD_LINK_FLAGS_IGNORE_MODULE_SEQ 0x3 +#define MC_CMD_LINK_FLAGS_MASK_LBN 0 +#define MC_CMD_LINK_FLAGS_MASK_WIDTH 32 + + +/***********************************/ +/* MC_CMD_LINK_CTRL + * Write the unified MAC/PHY link configuration. Locks required: None. Return + * code: 0, EINVAL, ETIME, EAGAIN + */ +#define MC_CMD_LINK_CTRL 0x6b +#undef MC_CMD_0x6b_PRIVILEGE_CTG + +#define MC_CMD_0x6b_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_LINK_CTRL_IN msgrequest */ +#define MC_CMD_LINK_CTRL_IN_LEN 40 +/* Handle to the port to set link state for. */ +#define MC_CMD_LINK_CTRL_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_LINK_CTRL_IN_PORT_HANDLE_LEN 4 +/* Control flags */ +#define MC_CMD_LINK_CTRL_IN_CONTROL_FLAGS_OFST 4 +#define MC_CMD_LINK_CTRL_IN_CONTROL_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_LINK_FLAGS/MASK */ +/* Reserved for future expansion, and included to provide padding for alignment + * purposes. + */ +#define MC_CMD_LINK_CTRL_IN_RESERVED_OFST 8 +#define MC_CMD_LINK_CTRL_IN_RESERVED_LEN 8 +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_OFST 8 +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_LEN 4 +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_LBN 64 +#define MC_CMD_LINK_CTRL_IN_RESERVED_LO_WIDTH 32 +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_OFST 12 +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_LEN 4 +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_LBN 96 +#define MC_CMD_LINK_CTRL_IN_RESERVED_HI_WIDTH 32 +/* Technology abilities to advertise during auto-negotiation */ +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_TECH_ABILITIES_MASK_OFST 16 +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_TECH_ABILITIES_MASK_LEN 16 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_ETH_TECH/TECH */ +/* Pause abilities to advertise during auto-negotiation. Valid when auto- + * negotation is enabled and MC_CMD_SET_MAC_IN/FCTL is set to + * MC_CMD_FCNTL_AUTO. If auto-negotiation is disabled the driver must + * explicitly configure pause mode with MC_CMD_SET_MAC. + */ +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_PAUSE_ABILITIES_MASK_OFST 32 +#define MC_CMD_LINK_CTRL_IN_ADVERTISED_PAUSE_ABILITIES_MASK_LEN 1 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_PAUSE_MODE/TYPE */ +/* When auto-negotiation is enabled, this is the FEC mode to request. Note that + * a weaker FEC mode may get negotiated, depending on what the link partner + * supports. The driver should subsequently use MC_CMD_GET_LINK to check the + * actual negotiated FEC mode. When auto-negotiation is disabled, this is the + * forced FEC mode. + */ +#define MC_CMD_LINK_CTRL_IN_FEC_MODE_OFST 33 +#define MC_CMD_LINK_CTRL_IN_FEC_MODE_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* FEC_TYPE/TYPE */ +/* This is only to be used when auto-negotiation is disabled (forced speed or + * loopback mode). If the specified value does not align with the values + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. + */ +#define MC_CMD_LINK_CTRL_IN_LINK_TECHNOLOGY_OFST 36 +#define MC_CMD_LINK_CTRL_IN_LINK_TECHNOLOGY_LEN 2 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_ETH_TECH/TECH */ +/* The sequence number of the last MODULECHANGE event. If this doesn't match, + * fail with EAGAIN. + */ +#define MC_CMD_LINK_CTRL_IN_MODULE_SEQ_OFST 38 +#define MC_CMD_LINK_CTRL_IN_MODULE_SEQ_LEN 1 +/* Loopback Mode. Only valid when auto-negotiation is disabled. */ +#define MC_CMD_LINK_CTRL_IN_LOOPBACK_OFST 39 +#define MC_CMD_LINK_CTRL_IN_LOOPBACK_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_LOOPBACK_V2/MODE */ + +/* MC_CMD_LINK_CTRL_OUT msgresponse */ +#define MC_CMD_LINK_CTRL_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_LINK_STATE + */ +#define MC_CMD_LINK_STATE 0x6c +#undef MC_CMD_0x6c_PRIVILEGE_CTG + +#define MC_CMD_0x6c_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_LINK_STATE_IN msgrequest */ +#define MC_CMD_LINK_STATE_IN_LEN 4 +/* Handle to the port to get link state for. */ +#define MC_CMD_LINK_STATE_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_LINK_STATE_IN_PORT_HANDLE_LEN 4 + +/* MC_CMD_LINK_STATE_OUT msgresponse */ +#define MC_CMD_LINK_STATE_OUT_LEN 114 +/* Flags used to report the current configuration/state of the link. */ +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_OFST 0 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LEN 8 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_OFST 0 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_LEN 4 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_LBN 0 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_WIDTH 32 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_OFST 4 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_LEN 4 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_LBN 32 +#define MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_WIDTH 32 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */ +/* Configured technology. If the specified value does not align with the values + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. + */ +#define MC_CMD_LINK_STATE_OUT_LINK_TECHNOLOGY_OFST 8 +#define MC_CMD_LINK_STATE_OUT_LINK_TECHNOLOGY_LEN 2 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_ETH_TECH/TECH */ +/* Configured FEC mode */ +#define MC_CMD_LINK_STATE_OUT_FEC_MODE_OFST 10 +#define MC_CMD_LINK_STATE_OUT_FEC_MODE_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* FEC_TYPE/TYPE */ +/* Bitmask of auto-negotiated pause modes */ +#define MC_CMD_LINK_STATE_OUT_PAUSE_MASK_OFST 11 +#define MC_CMD_LINK_STATE_OUT_PAUSE_MASK_LEN 1 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_PAUSE_MODE/TYPE */ +/* Configured loopback mode */ +#define MC_CMD_LINK_STATE_OUT_LOOPBACK_OFST 12 +#define MC_CMD_LINK_STATE_OUT_LOOPBACK_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_LOOPBACK_V2/MODE */ +/* Abilities requested by the driver to advertise during auto-negotiation */ +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_OFST 16 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_LEN 32 +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_TECH_MASK_OFST 16 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_TECH_MASK_LEN 16 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_MASK_OFST 32 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_MASK_LEN 4 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_REQ_OFST 36 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_REQ_LEN 4 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_PAUSE_MASK_OFST 40 +#define MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_PAUSE_MASK_LEN 1 +/* Abilities advertised by the link partner during auto-negotiation */ +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_OFST 48 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_LEN 32 +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_TECH_MASK_OFST 48 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_TECH_MASK_LEN 16 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_MASK_OFST 64 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_MASK_LEN 4 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_REQ_OFST 68 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_REQ_LEN 4 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_PAUSE_MASK_OFST 72 +#define MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_PAUSE_MASK_LEN 1 +/* Abilities supported by the local device (including cable abilities) For + * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO + */ +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_OFST 80 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_LEN 28 +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_TECH_MASK_OFST 80 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_TECH_MASK_LEN 16 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_MASK_OFST 96 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_MASK_LEN 4 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_REQ_OFST 100 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_REQ_LEN 4 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_PAUSE_MASK_OFST 104 +#define MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_PAUSE_MASK_LEN 1 +/* Control flags */ +#define MC_CMD_LINK_STATE_OUT_CONTROL_FLAGS_OFST 108 +#define MC_CMD_LINK_STATE_OUT_CONTROL_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_LINK_FLAGS/MASK */ +/* Sequence number to synchronize link change events */ +#define MC_CMD_LINK_STATE_OUT_PORT_LINKCHANGE_SEQ_NUM_OFST 112 +#define MC_CMD_LINK_STATE_OUT_PORT_LINKCHANGE_SEQ_NUM_LEN 1 +/* Sequence number to synchronize module change events */ +#define MC_CMD_LINK_STATE_OUT_PORT_MODULECHANGE_SEQ_NUM_OFST 113 +#define MC_CMD_LINK_STATE_OUT_PORT_MODULECHANGE_SEQ_NUM_LEN 1 + +/* MC_CMD_LINK_STATE_OUT_V2 msgresponse: Updated LINK_STATE_OUT with + * LOCAL_AN_SUPPORT + */ +#define MC_CMD_LINK_STATE_OUT_V2_LEN 120 +/* Flags used to report the current configuration/state of the link. */ +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_OFST 0 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LEN 8 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_OFST 0 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_LEN 4 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_LBN 0 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_WIDTH 32 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_OFST 4 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_LEN 4 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_LBN 32 +#define MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_WIDTH 32 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */ +/* Configured technology. If the specified value does not align with the values + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. + */ +#define MC_CMD_LINK_STATE_OUT_V2_LINK_TECHNOLOGY_OFST 8 +#define MC_CMD_LINK_STATE_OUT_V2_LINK_TECHNOLOGY_LEN 2 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_ETH_TECH/TECH */ +/* Configured FEC mode */ +#define MC_CMD_LINK_STATE_OUT_V2_FEC_MODE_OFST 10 +#define MC_CMD_LINK_STATE_OUT_V2_FEC_MODE_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* FEC_TYPE/TYPE */ +/* Bitmask of auto-negotiated pause modes */ +#define MC_CMD_LINK_STATE_OUT_V2_PAUSE_MASK_OFST 11 +#define MC_CMD_LINK_STATE_OUT_V2_PAUSE_MASK_LEN 1 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_PAUSE_MODE/TYPE */ +/* Configured loopback mode */ +#define MC_CMD_LINK_STATE_OUT_V2_LOOPBACK_OFST 12 +#define MC_CMD_LINK_STATE_OUT_V2_LOOPBACK_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_LOOPBACK_V2/MODE */ +/* Abilities requested by the driver to advertise during auto-negotiation */ +#define MC_CMD_LINK_STATE_OUT_V2_ADVERTISED_ABILITIES_OFST 16 +#define MC_CMD_LINK_STATE_OUT_V2_ADVERTISED_ABILITIES_LEN 32 +/* Abilities advertised by the link partner during auto-negotiation */ +#define MC_CMD_LINK_STATE_OUT_V2_LINK_PARTNER_ABILITIES_OFST 48 +#define MC_CMD_LINK_STATE_OUT_V2_LINK_PARTNER_ABILITIES_LEN 32 +/* Abilities supported by the local device (including cable abilities) For + * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO + */ +#define MC_CMD_LINK_STATE_OUT_V2_SUPPORTED_ABILITIES_OFST 80 +#define MC_CMD_LINK_STATE_OUT_V2_SUPPORTED_ABILITIES_LEN 28 +/* Control flags */ +#define MC_CMD_LINK_STATE_OUT_V2_CONTROL_FLAGS_OFST 108 +#define MC_CMD_LINK_STATE_OUT_V2_CONTROL_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_LINK_FLAGS/MASK */ +/* Sequence number to synchronize link change events */ +#define MC_CMD_LINK_STATE_OUT_V2_PORT_LINKCHANGE_SEQ_NUM_OFST 112 +#define MC_CMD_LINK_STATE_OUT_V2_PORT_LINKCHANGE_SEQ_NUM_LEN 1 +/* Sequence number to synchronize module change events */ +#define MC_CMD_LINK_STATE_OUT_V2_PORT_MODULECHANGE_SEQ_NUM_OFST 113 +#define MC_CMD_LINK_STATE_OUT_V2_PORT_MODULECHANGE_SEQ_NUM_LEN 1 +/* Reports the auto-negotiation supported by the local device. This depends on + * the port and module properties. + */ +#define MC_CMD_LINK_STATE_OUT_V2_LOCAL_AN_SUPPORT_OFST 116 +#define MC_CMD_LINK_STATE_OUT_V2_LOCAL_AN_SUPPORT_LEN 4 +/* Enum values, see field(s): */ +/* AN_TYPE/TYPE */ + +/* MC_CMD_LINK_STATE_OUT_V3 msgresponse: Updated LINK_STATE_OUT_V2 for explicit + * reporting of the link speed and duplex mode. + */ +#define MC_CMD_LINK_STATE_OUT_V3_LEN 128 +/* Flags used to report the current configuration/state of the link. */ +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_OFST 0 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LEN 8 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_OFST 0 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_LEN 4 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_LBN 0 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_WIDTH 32 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_OFST 4 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_LEN 4 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_LBN 32 +#define MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_WIDTH 32 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */ +/* Configured technology. If the specified value does not align with the values + * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid. + */ +#define MC_CMD_LINK_STATE_OUT_V3_LINK_TECHNOLOGY_OFST 8 +#define MC_CMD_LINK_STATE_OUT_V3_LINK_TECHNOLOGY_LEN 2 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_ETH_TECH/TECH */ +/* Configured FEC mode */ +#define MC_CMD_LINK_STATE_OUT_V3_FEC_MODE_OFST 10 +#define MC_CMD_LINK_STATE_OUT_V3_FEC_MODE_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* FEC_TYPE/TYPE */ +/* Bitmask of auto-negotiated pause modes */ +#define MC_CMD_LINK_STATE_OUT_V3_PAUSE_MASK_OFST 11 +#define MC_CMD_LINK_STATE_OUT_V3_PAUSE_MASK_LEN 1 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_PAUSE_MODE/TYPE */ +/* Configured loopback mode */ +#define MC_CMD_LINK_STATE_OUT_V3_LOOPBACK_OFST 12 +#define MC_CMD_LINK_STATE_OUT_V3_LOOPBACK_LEN 1 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_LOOPBACK_V2/MODE */ +/* Abilities requested by the driver to advertise during auto-negotiation */ +#define MC_CMD_LINK_STATE_OUT_V3_ADVERTISED_ABILITIES_OFST 16 +#define MC_CMD_LINK_STATE_OUT_V3_ADVERTISED_ABILITIES_LEN 32 +/* Abilities advertised by the link partner during auto-negotiation */ +#define MC_CMD_LINK_STATE_OUT_V3_LINK_PARTNER_ABILITIES_OFST 48 +#define MC_CMD_LINK_STATE_OUT_V3_LINK_PARTNER_ABILITIES_LEN 32 +/* Abilities supported by the local device (including cable abilities) For + * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO + */ +#define MC_CMD_LINK_STATE_OUT_V3_SUPPORTED_ABILITIES_OFST 80 +#define MC_CMD_LINK_STATE_OUT_V3_SUPPORTED_ABILITIES_LEN 28 +/* Control flags */ +#define MC_CMD_LINK_STATE_OUT_V3_CONTROL_FLAGS_OFST 108 +#define MC_CMD_LINK_STATE_OUT_V3_CONTROL_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_LINK_FLAGS/MASK */ +/* Sequence number to synchronize link change events */ +#define MC_CMD_LINK_STATE_OUT_V3_PORT_LINKCHANGE_SEQ_NUM_OFST 112 +#define MC_CMD_LINK_STATE_OUT_V3_PORT_LINKCHANGE_SEQ_NUM_LEN 1 +/* Sequence number to synchronize module change events */ +#define MC_CMD_LINK_STATE_OUT_V3_PORT_MODULECHANGE_SEQ_NUM_OFST 113 +#define MC_CMD_LINK_STATE_OUT_V3_PORT_MODULECHANGE_SEQ_NUM_LEN 1 +/* Reports the auto-negotiation supported by the local device. This depends on + * the port and module properties. + */ +#define MC_CMD_LINK_STATE_OUT_V3_LOCAL_AN_SUPPORT_OFST 116 +#define MC_CMD_LINK_STATE_OUT_V3_LOCAL_AN_SUPPORT_LEN 4 +/* Enum values, see field(s): */ +/* AN_TYPE/TYPE */ +/* Autonegotiated speed in mbit/s. The link may still be down even if this + * reads non-zero. LINK_SPEED field is intended to be used by drivers without + * the most up-to-date MCDI definitions, unable to deduce the link speed from + * the reported LINK_TECHNOLOGY field. + */ +#define MC_CMD_LINK_STATE_OUT_V3_LINK_SPEED_OFST 120 +#define MC_CMD_LINK_STATE_OUT_V3_LINK_SPEED_LEN 4 +#define MC_CMD_LINK_STATE_OUT_V3_FLAGS_OFST 124 +#define MC_CMD_LINK_STATE_OUT_V3_FLAGS_LEN 4 +#define MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_OFST 124 +#define MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_LBN 0 +#define MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_WIDTH 1 + /***********************************/ /* MC_CMD_GET_LINK @@ -5694,6 +6163,54 @@ /* MC_CMD_GET_LINK_IN msgrequest */ #define MC_CMD_GET_LINK_IN_LEN 0 +/* MC_CMD_GET_LINK_IN_V2 msgrequest */ +#define MC_CMD_GET_LINK_IN_V2_LEN 8 +/* Target port to request link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details. + */ +#define MC_CMD_GET_LINK_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_LINK_OUT msgresponse */ #define MC_CMD_GET_LINK_OUT_LEN 28 /* Near-side advertised capabilities. Refer to @@ -5745,6 +6262,7 @@ /* This returns the negotiated flow control value. */ #define MC_CMD_GET_LINK_OUT_FCNTL_OFST 20 #define MC_CMD_GET_LINK_OUT_FCNTL_LEN 4 +/* enum property: value */ /* Enum values, see field(s): */ /* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ #define MC_CMD_GET_LINK_OUT_MAC_FAULT_OFST 24 @@ -5813,6 +6331,7 @@ /* This returns the negotiated flow control value. */ #define MC_CMD_GET_LINK_OUT_V2_FCNTL_OFST 20 #define MC_CMD_GET_LINK_OUT_V2_FCNTL_LEN 4 +/* enum property: value */ /* Enum values, see field(s): */ /* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ #define MC_CMD_GET_LINK_OUT_V2_MAC_FAULT_OFST 24 @@ -5969,6 +6488,95 @@ #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_LBN 7 #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH 1 +/* MC_CMD_SET_LINK_IN_V3 msgrequest */ +#define MC_CMD_SET_LINK_IN_V3_LEN 28 +/* Near-side advertised capabilities. Refer to + * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. + */ +#define MC_CMD_SET_LINK_IN_V3_CAP_OFST 0 +#define MC_CMD_SET_LINK_IN_V3_CAP_LEN 4 +/* Flags */ +#define MC_CMD_SET_LINK_IN_V3_FLAGS_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_FLAGS_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_LBN 0 +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_WIDTH 1 +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_LBN 1 +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_WIDTH 1 +#define MC_CMD_SET_LINK_IN_V3_TXDIS_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_TXDIS_LBN 2 +#define MC_CMD_SET_LINK_IN_V3_TXDIS_WIDTH 1 +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_LBN 3 +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_WIDTH 1 +/* Loopback mode. */ +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_OFST 8 +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_LEN 4 +/* Enum values, see field(s): */ +/* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ +/* A loopback speed of "0" is supported, and means (choose any available + * speed). + */ +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_OFST 12 +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_OFST 16 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_LEN 1 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_OFST 16 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_LBN 0 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_WIDTH 7 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_OFST 16 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_LBN 7 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_WIDTH 1 +/* Padding */ +#define MC_CMD_SET_LINK_IN_V3_RESERVED_OFST 17 +#define MC_CMD_SET_LINK_IN_V3_RESERVED_LEN 3 +/* Target port to set link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_SET_LINK_IN_V3_TARGET_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LEN 8 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_LBN 160 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_WIDTH 32 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_OFST 24 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_LBN 192 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_OFST 23 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_OFST 24 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LEN 8 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LBN 160 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_OFST 24 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LBN 192 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_SET_LINK_OUT msgresponse */ #define MC_CMD_SET_LINK_OUT_LEN 0 @@ -6034,17 +6642,17 @@ #define MC_CMD_SET_MAC_IN_FCNTL_OFST 20 #define MC_CMD_SET_MAC_IN_FCNTL_LEN 4 /* enum: Flow control is off. */ -#define MC_CMD_FCNTL_OFF 0x0 +/* MC_CMD_FCNTL_OFF 0x0 */ /* enum: Respond to flow control. */ -#define MC_CMD_FCNTL_RESPOND 0x1 +/* MC_CMD_FCNTL_RESPOND 0x1 */ /* enum: Respond to and Issue flow control. */ -#define MC_CMD_FCNTL_BIDIR 0x2 -/* enum: Auto neg flow control. */ -#define MC_CMD_FCNTL_AUTO 0x3 -/* enum: Priority flow control (eftest builds only). */ -#define MC_CMD_FCNTL_QBB 0x4 +/* MC_CMD_FCNTL_BIDIR 0x2 */ +/* enum: Auto negotiate flow control. */ +/* MC_CMD_FCNTL_AUTO 0x3 */ +/* enum: Priority flow control. This is only supported on KSB. */ +/* MC_CMD_FCNTL_QBB 0x4 */ /* enum: Issue flow control. */ -#define MC_CMD_FCNTL_GENERATE 0x5 +/* MC_CMD_FCNTL_GENERATE 0x5 */ #define MC_CMD_SET_MAC_IN_FLAGS_OFST 24 #define MC_CMD_SET_MAC_IN_FLAGS_LEN 4 #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_OFST 24 @@ -6086,9 +6694,9 @@ /* MC_CMD_FCNTL_RESPOND 0x1 */ /* enum: Respond to and Issue flow control. */ /* MC_CMD_FCNTL_BIDIR 0x2 */ -/* enum: Auto neg flow control. */ +/* enum: Auto negotiate flow control. */ /* MC_CMD_FCNTL_AUTO 0x3 */ -/* enum: Priority flow control (eftest builds only). */ +/* enum: Priority flow control. This is only supported on KSB. */ /* MC_CMD_FCNTL_QBB 0x4 */ /* enum: Issue flow control. */ /* MC_CMD_FCNTL_GENERATE 0x5 */ @@ -6155,9 +6763,9 @@ /* MC_CMD_FCNTL_RESPOND 0x1 */ /* enum: Respond to and Issue flow control. */ /* MC_CMD_FCNTL_BIDIR 0x2 */ -/* enum: Auto neg flow control. */ +/* enum: Auto negotiate flow control. */ /* MC_CMD_FCNTL_AUTO 0x3 */ -/* enum: Priority flow control (eftest builds only). */ +/* enum: Priority flow control. This is only supported on KSB. */ /* MC_CMD_FCNTL_QBB 0x4 */ /* enum: Issue flow control. */ /* MC_CMD_FCNTL_GENERATE 0x5 */ @@ -6188,19 +6796,9 @@ #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28 #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4 #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1 -/* Identifies the MAC to update by the specifying the end of a logical MAE - * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the - * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible - * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all - * circumstances. 1. Some will always work (e.g. a VF can always address its - * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not - * meaningful and will always fail with EINVAL (e.g. attempting to address the - * VNIC end of a link to a physical port), 3. Some are meaningful but require - * the MCDI client to have the required permission and fail with EPERM - * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer), - * and 4. Some could be implementation-specific and fail with ENOTSUP if not - * available (no examples exist right now). See SF-123581-TC section 4.3 for - * more details. +/* Target port to set mac state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details */ #define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32 #define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8 @@ -6212,6 +6810,7 @@ #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4 #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288 #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32 #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4 #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32 @@ -6405,6 +7004,98 @@ #define MC_CMD_MAC_STATS_IN_PORT_ID_OFST 16 #define MC_CMD_MAC_STATS_IN_PORT_ID_LEN 4 +/* MC_CMD_MAC_STATS_V2_IN msgrequest */ +#define MC_CMD_MAC_STATS_V2_IN_LEN 28 +/* ??? */ +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_OFST 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LEN 8 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_OFST 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LBN 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_OFST 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LBN 32 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_CMD_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_CMD_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_DMA_LBN 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_LBN 1 +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_LBN 2 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_LBN 3 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_LBN 4 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_LBN 5 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_LBN 16 +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_WIDTH 16 +/* DMA length. Should be set to MAC_STATS_NUM_STATS * sizeof(uint64_t), as + * returned by MC_CMD_GET_CAPABILITIES_V4_OUT. For legacy firmware not + * supporting MC_CMD_GET_CAPABILITIES_V4_OUT, DMA_LEN should be set to + * MC_CMD_MAC_NSTATS * sizeof(uint64_t) + */ +#define MC_CMD_MAC_STATS_V2_IN_DMA_LEN_OFST 12 +#define MC_CMD_MAC_STATS_V2_IN_DMA_LEN_LEN 4 +/* port id so vadapter stats can be provided */ +#define MC_CMD_MAC_STATS_V2_IN_PORT_ID_OFST 16 +#define MC_CMD_MAC_STATS_V2_IN_PORT_ID_LEN 4 +/* Target port to request statistics for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_MAC_STATS_V2_IN_TARGET_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LEN 8 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LBN 160 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_OFST 24 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LBN 192 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 23 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_OFST 24 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LEN 8 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LBN 160 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_OFST 24 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LBN 192 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_MAC_STATS_OUT_DMA msgresponse */ #define MC_CMD_MAC_STATS_OUT_DMA_LEN 0 @@ -6421,6 +7112,7 @@ #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS +/* enum property: index */ #define MC_CMD_MAC_GENERATION_START 0x0 /* enum */ #define MC_CMD_MAC_DMABUF_START 0x1 /* enum */ #define MC_CMD_MAC_TX_PKTS 0x1 /* enum */ @@ -6583,6 +7275,7 @@ #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2 +/* enum property: index */ /* enum: Start of FEC stats buffer space, Medford2 and up */ #define MC_CMD_MAC_FEC_DMABUF_START 0x61 /* enum: Number of uncorrected FEC codewords on link (RS-FEC only for Medford2) @@ -6622,6 +7315,7 @@ #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3 +/* enum property: index */ /* enum: Start of CTPIO stats buffer space, Medford2 and up */ #define MC_CMD_MAC_CTPIO_DMABUF_START 0x68 /* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the @@ -6702,6 +7396,7 @@ #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4 +/* enum property: index */ /* enum: Start of V4 stats buffer space */ #define MC_CMD_MAC_V4_DMABUF_START 0x79 /* enum: RXDP counter: Number of packets truncated because scattering was @@ -6723,112 +7418,35 @@ /* Other enum values, see field(s): */ /* MC_CMD_MAC_STATS_V3_OUT_NO_DMA/STATISTICS */ - -/***********************************/ -/* MC_CMD_SRIOV - * to be documented - */ -#define MC_CMD_SRIOV 0x30 - -/* MC_CMD_SRIOV_IN msgrequest */ -#define MC_CMD_SRIOV_IN_LEN 12 -#define MC_CMD_SRIOV_IN_ENABLE_OFST 0 -#define MC_CMD_SRIOV_IN_ENABLE_LEN 4 -#define MC_CMD_SRIOV_IN_VI_BASE_OFST 4 -#define MC_CMD_SRIOV_IN_VI_BASE_LEN 4 -#define MC_CMD_SRIOV_IN_VF_COUNT_OFST 8 -#define MC_CMD_SRIOV_IN_VF_COUNT_LEN 4 - -/* MC_CMD_SRIOV_OUT msgresponse */ -#define MC_CMD_SRIOV_OUT_LEN 8 -#define MC_CMD_SRIOV_OUT_VI_SCALE_OFST 0 -#define MC_CMD_SRIOV_OUT_VI_SCALE_LEN 4 -#define MC_CMD_SRIOV_OUT_VF_TOTAL_OFST 4 -#define MC_CMD_SRIOV_OUT_VF_TOTAL_LEN 4 - -/* MC_CMD_MEMCPY_RECORD_TYPEDEF structuredef */ -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LEN 32 -/* this is only used for the first record */ -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_OFST 0 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LBN 0 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_WIDTH 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_OFST 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LBN 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_WIDTH 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_RID_INLINE 0x100 /* enum */ -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LBN 128 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_WIDTH 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LEN 4 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LBN 224 -#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_WIDTH 32 - - -/***********************************/ -/* MC_CMD_MEMCPY - * DMA write data into (Rid,Addr), either by dma reading (Rid,Addr), or by data - * embedded directly in the command. - * - * A common pattern is for a client to use generation counts to signal a dma - * update of a datastructure. To facilitate this, this MCDI operation can - * contain multiple requests which are executed in strict order. Requests take - * the form of duplicating the entire MCDI request continuously (including the - * requests record, which is ignored in all but the first structure) - * - * The source data can either come from a DMA from the host, or it can be - * embedded within the request directly, thereby eliminating a DMA read. To - * indicate this, the client sets FROM_RID=%RID_INLINE, ADDR_HI=0, and - * ADDR_LO=offset, and inserts the data at %offset from the start of the - * payload. It's the callers responsibility to ensure that the embedded data - * doesn't overlap the records. - * - * Returns: 0, EINVAL (invalid RID) - */ -#define MC_CMD_MEMCPY 0x31 - -/* MC_CMD_MEMCPY_IN msgrequest */ -#define MC_CMD_MEMCPY_IN_LENMIN 32 -#define MC_CMD_MEMCPY_IN_LENMAX 224 -#define MC_CMD_MEMCPY_IN_LENMAX_MCDI2 992 -#define MC_CMD_MEMCPY_IN_LEN(num) (0+32*(num)) -#define MC_CMD_MEMCPY_IN_RECORD_NUM(len) (((len)-0)/32) -/* see MC_CMD_MEMCPY_RECORD_TYPEDEF */ -#define MC_CMD_MEMCPY_IN_RECORD_OFST 0 -#define MC_CMD_MEMCPY_IN_RECORD_LEN 32 -#define MC_CMD_MEMCPY_IN_RECORD_MINNUM 1 -#define MC_CMD_MEMCPY_IN_RECORD_MAXNUM 7 -#define MC_CMD_MEMCPY_IN_RECORD_MAXNUM_MCDI2 31 - -/* MC_CMD_MEMCPY_OUT msgresponse */ -#define MC_CMD_MEMCPY_OUT_LEN 0 +/* MC_CMD_MAC_STATS_V5_OUT_DMA msgresponse */ +#define MC_CMD_MAC_STATS_V5_OUT_DMA_LEN 0 + +/* MC_CMD_MAC_STATS_V5_OUT_NO_DMA msgresponse */ +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_LEN (((MC_CMD_MAC_NSTATS_V5*64))>>3) +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_OFST 0 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LEN 8 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_OFST 0 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_LEN 4 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_LBN 0 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_WIDTH 32 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_OFST 4 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_LEN 4 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_LBN 32 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 +#define MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V5 +/* enum property: index */ +/* enum: Start of V5 stats buffer space */ +#define MC_CMD_MAC_V5_DMABUF_START 0x7c +/* enum: Link toggle counter: Number of times the link has toggled between + * up/down and down/up + */ +#define MC_CMD_MAC_LINK_TOGGLES 0x7c +/* enum: This includes the space at offset 125 which is the final + * GENERATION_END in a MAC_STATS_V5 response and otherwise unused. + */ +#define MC_CMD_MAC_NSTATS_V5 0x7e +/* Other enum values, see field(s): */ +/* MC_CMD_MAC_STATS_V4_OUT_NO_DMA/STATISTICS */ /***********************************/ @@ -6984,6 +7602,7 @@ #define MC_CMD_WOL_FILTER_RESET_IN_LEN 4 #define MC_CMD_WOL_FILTER_RESET_IN_MASK_OFST 0 #define MC_CMD_WOL_FILTER_RESET_IN_MASK_LEN 4 +/* enum property: bitmask */ #define MC_CMD_WOL_FILTER_RESET_IN_WAKE_FILTERS 0x1 /* enum */ #define MC_CMD_WOL_FILTER_RESET_IN_LIGHTSOUT_OFFLOADS 0x2 /* enum */ @@ -6991,23 +7610,6 @@ #define MC_CMD_WOL_FILTER_RESET_OUT_LEN 0 -/***********************************/ -/* MC_CMD_SET_MCAST_HASH - * Set the MCAST hash value without otherwise reconfiguring the MAC - */ -#define MC_CMD_SET_MCAST_HASH 0x35 - -/* MC_CMD_SET_MCAST_HASH_IN msgrequest */ -#define MC_CMD_SET_MCAST_HASH_IN_LEN 32 -#define MC_CMD_SET_MCAST_HASH_IN_HASH0_OFST 0 -#define MC_CMD_SET_MCAST_HASH_IN_HASH0_LEN 16 -#define MC_CMD_SET_MCAST_HASH_IN_HASH1_OFST 16 -#define MC_CMD_SET_MCAST_HASH_IN_HASH1_LEN 16 - -/* MC_CMD_SET_MCAST_HASH_OUT msgresponse */ -#define MC_CMD_SET_MCAST_HASH_OUT_LEN 0 - - /***********************************/ /* MC_CMD_NVRAM_TYPES * Return bitfield indicating available types of virtual NVRAM partitions. @@ -7026,6 +7628,7 @@ /* Bit mask of supported types. */ #define MC_CMD_NVRAM_TYPES_OUT_TYPES_OFST 0 #define MC_CMD_NVRAM_TYPES_OUT_TYPES_LEN 4 +/* enum property: bitshift */ /* enum: Disabled callisto. */ #define MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0x0 /* enum: MC firmware. */ @@ -7522,7 +8125,7 @@ #define MC_CMD_REBOOT 0x3d #undef MC_CMD_0x3d_PRIVILEGE_CTG -#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN +#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND /* MC_CMD_REBOOT_IN msgrequest */ #define MC_CMD_REBOOT_IN_LEN 4 @@ -7534,65 +8137,6 @@ #define MC_CMD_REBOOT_OUT_LEN 0 -/***********************************/ -/* MC_CMD_SCHEDINFO - * Request scheduler info. Locks required: NONE. Returns: An array of - * (timeslice,maximum overrun), one for each thread, in ascending order of - * thread address. - */ -#define MC_CMD_SCHEDINFO 0x3e -#undef MC_CMD_0x3e_PRIVILEGE_CTG - -#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SCHEDINFO_IN msgrequest */ -#define MC_CMD_SCHEDINFO_IN_LEN 0 - -/* MC_CMD_SCHEDINFO_OUT msgresponse */ -#define MC_CMD_SCHEDINFO_OUT_LENMIN 4 -#define MC_CMD_SCHEDINFO_OUT_LENMAX 252 -#define MC_CMD_SCHEDINFO_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_SCHEDINFO_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_SCHEDINFO_OUT_DATA_NUM(len) (((len)-0)/4) -#define MC_CMD_SCHEDINFO_OUT_DATA_OFST 0 -#define MC_CMD_SCHEDINFO_OUT_DATA_LEN 4 -#define MC_CMD_SCHEDINFO_OUT_DATA_MINNUM 1 -#define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM 63 -#define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM_MCDI2 255 - - -/***********************************/ -/* MC_CMD_REBOOT_MODE - * Set the mode for the next MC reboot. Locks required: NONE. Sets the reboot - * mode to the specified value. Returns the old mode. - */ -#define MC_CMD_REBOOT_MODE 0x3f -#undef MC_CMD_0x3f_PRIVILEGE_CTG - -#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_REBOOT_MODE_IN msgrequest */ -#define MC_CMD_REBOOT_MODE_IN_LEN 4 -#define MC_CMD_REBOOT_MODE_IN_VALUE_OFST 0 -#define MC_CMD_REBOOT_MODE_IN_VALUE_LEN 4 -/* enum: Normal. */ -#define MC_CMD_REBOOT_MODE_NORMAL 0x0 -/* enum: Power-on Reset. */ -#define MC_CMD_REBOOT_MODE_POR 0x2 -/* enum: Snapper. */ -#define MC_CMD_REBOOT_MODE_SNAPPER 0x3 -/* enum: snapper fake POR */ -#define MC_CMD_REBOOT_MODE_SNAPPER_POR 0x4 -#define MC_CMD_REBOOT_MODE_IN_FAKE_OFST 0 -#define MC_CMD_REBOOT_MODE_IN_FAKE_LBN 7 -#define MC_CMD_REBOOT_MODE_IN_FAKE_WIDTH 1 - -/* MC_CMD_REBOOT_MODE_OUT msgresponse */ -#define MC_CMD_REBOOT_MODE_OUT_LEN 4 -#define MC_CMD_REBOOT_MODE_OUT_VALUE_OFST 0 -#define MC_CMD_REBOOT_MODE_OUT_VALUE_LEN 4 - - /***********************************/ /* MC_CMD_SENSOR_INFO * Returns information about every available sensor. @@ -8061,6 +8605,54 @@ /* MC_CMD_GET_PHY_STATE_IN msgrequest */ #define MC_CMD_GET_PHY_STATE_IN_LEN 0 +/* MC_CMD_GET_PHY_STATE_IN_V2 msgrequest */ +#define MC_CMD_GET_PHY_STATE_IN_V2_LEN 8 +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details. + */ +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_PHY_STATE_OUT msgresponse */ #define MC_CMD_GET_PHY_STATE_OUT_LEN 4 #define MC_CMD_GET_PHY_STATE_OUT_STATE_OFST 0 @@ -8071,22 +8663,6 @@ #define MC_CMD_PHY_STATE_ZOMBIE 0x2 -/***********************************/ -/* MC_CMD_SETUP_8021QBB - * 802.1Qbb control. 8 Tx queues that map to priorities 0 - 7. Use all 1s to - * disable 802.Qbb for a given priority. - */ -#define MC_CMD_SETUP_8021QBB 0x44 - -/* MC_CMD_SETUP_8021QBB_IN msgrequest */ -#define MC_CMD_SETUP_8021QBB_IN_LEN 32 -#define MC_CMD_SETUP_8021QBB_IN_TXQS_OFST 0 -#define MC_CMD_SETUP_8021QBB_IN_TXQS_LEN 32 - -/* MC_CMD_SETUP_8021QBB_OUT msgresponse */ -#define MC_CMD_SETUP_8021QBB_OUT_LEN 0 - - /***********************************/ /* MC_CMD_WOL_FILTER_GET * Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS @@ -8105,133 +8681,6 @@ #define MC_CMD_WOL_FILTER_GET_OUT_FILTER_ID_LEN 4 -/***********************************/ -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD - * Add a protocol offload to NIC for lights-out state. Locks required: None. - * Returns: 0, ENOSYS - */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46 -#undef MC_CMD_0x46_PRIVILEGE_CTG - -#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK - -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN msgrequest */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMIN 8 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX 252 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX_MCDI2 1020 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) (4+4*(num)) -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_NUM(len) (((len)-4)/4) -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 -#define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_ARP 0x1 /* enum */ -#define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_NS 0x2 /* enum */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_OFST 4 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_LEN 4 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MINNUM 1 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM 62 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM_MCDI2 254 - -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP msgrequest */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_LEN 14 -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */ -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_OFST 4 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_LEN 6 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_OFST 10 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_LEN 4 - -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS msgrequest */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_LEN 42 -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */ -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_OFST 4 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_LEN 6 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_OFST 10 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_LEN 16 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_OFST 26 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_LEN 16 - -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT msgresponse */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN 4 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_OFST 0 -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_LEN 4 - - -/***********************************/ -/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD - * Remove a protocol offload from NIC for lights-out state. Locks required: - * None. Returns: 0, ENOSYS - */ -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47 -#undef MC_CMD_0x47_PRIVILEGE_CTG - -#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK - -/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN msgrequest */ -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN 8 -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_OFST 4 -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_LEN 4 - -/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT msgresponse */ -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_MAC_RESET_RESTORE - * Restore MAC after block reset. Locks required: None. Returns: 0. - */ -#define MC_CMD_MAC_RESET_RESTORE 0x48 - -/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */ -#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0 - -/* MC_CMD_MAC_RESET_RESTORE_OUT msgresponse */ -#define MC_CMD_MAC_RESET_RESTORE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_TESTASSERT - * Deliberately trigger an assert-detonation in the firmware for testing - * purposes (i.e. to allow tests that the driver copes gracefully). Locks - * required: None Returns: 0 - */ -#define MC_CMD_TESTASSERT 0x49 -#undef MC_CMD_0x49_PRIVILEGE_CTG - -#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_TESTASSERT_IN msgrequest */ -#define MC_CMD_TESTASSERT_IN_LEN 0 - -/* MC_CMD_TESTASSERT_OUT msgresponse */ -#define MC_CMD_TESTASSERT_OUT_LEN 0 - -/* MC_CMD_TESTASSERT_V2_IN msgrequest */ -#define MC_CMD_TESTASSERT_V2_IN_LEN 4 -/* How to provoke the assertion */ -#define MC_CMD_TESTASSERT_V2_IN_TYPE_OFST 0 -#define MC_CMD_TESTASSERT_V2_IN_TYPE_LEN 4 -/* enum: Assert using the FAIL_ASSERTION_WITH_USEFUL_VALUES macro. Unless - * you're testing firmware, this is what you want. - */ -#define MC_CMD_TESTASSERT_V2_IN_FAIL_ASSERTION_WITH_USEFUL_VALUES 0x0 -/* enum: Assert using assert(0); */ -#define MC_CMD_TESTASSERT_V2_IN_ASSERT_FALSE 0x1 -/* enum: Deliberately trigger a watchdog */ -#define MC_CMD_TESTASSERT_V2_IN_WATCHDOG 0x2 -/* enum: Deliberately trigger a trap by loading from an invalid address */ -#define MC_CMD_TESTASSERT_V2_IN_LOAD_TRAP 0x3 -/* enum: Deliberately trigger a trap by storing to an invalid address */ -#define MC_CMD_TESTASSERT_V2_IN_STORE_TRAP 0x4 -/* enum: Jump to an invalid address */ -#define MC_CMD_TESTASSERT_V2_IN_JUMP_TRAP 0x5 - -/* MC_CMD_TESTASSERT_V2_OUT msgresponse */ -#define MC_CMD_TESTASSERT_V2_OUT_LEN 0 - - /***********************************/ /* MC_CMD_WORKAROUND * Enable/Disable a given workaround. The mcfw will return EINVAL if it doesn't @@ -8324,6 +8773,62 @@ #define MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_LBN 16 #define MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_WIDTH 16 +/* MC_CMD_GET_PHY_MEDIA_INFO_IN_V2 msgrequest */ +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_LEN 12 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_OFST 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_OFST 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_LBN 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_WIDTH 16 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_OFST 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_LBN 16 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_WIDTH 16 +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LBN 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_OFST 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LBN 64 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 7 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 52 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 48 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 6 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_OFST 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LBN 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_OFST 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LBN 64 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_PHY_MEDIA_INFO_OUT msgresponse */ #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN 5 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252 @@ -8348,7 +8853,7 @@ #define MC_CMD_NVRAM_TEST 0x4c #undef MC_CMD_0x4c_PRIVILEGE_CTG -#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN +#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND /* MC_CMD_NVRAM_TEST_IN msgrequest */ #define MC_CMD_NVRAM_TEST_IN_LEN 4 @@ -8369,103 +8874,6 @@ #define MC_CMD_NVRAM_TEST_NOTSUPP 0x2 -/***********************************/ -/* MC_CMD_MRSFP_TWEAK - * Read status and/or set parameters for the 'mrsfp' driver in mr_rusty builds. - * I2C I/O expander bits are always read; if equaliser parameters are supplied, - * they are configured first. Locks required: None. Return code: 0, EINVAL. - */ -#define MC_CMD_MRSFP_TWEAK 0x4d - -/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */ -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16 -/* 0-6 low->high de-emph. */ -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_OFST 0 -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_LEN 4 -/* 0-8 low->high ref.V */ -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_OFST 4 -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_LEN 4 -/* 0-8 0-8 low->high boost */ -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_OFST 8 -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_LEN 4 -/* 0-8 low->high ref.V */ -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_OFST 12 -#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_LEN 4 - -/* MC_CMD_MRSFP_TWEAK_IN_READ_ONLY msgrequest */ -#define MC_CMD_MRSFP_TWEAK_IN_READ_ONLY_LEN 0 - -/* MC_CMD_MRSFP_TWEAK_OUT msgresponse */ -#define MC_CMD_MRSFP_TWEAK_OUT_LEN 12 -/* input bits */ -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_OFST 0 -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_LEN 4 -/* output bits */ -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST 4 -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_LEN 4 -/* direction */ -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OFST 8 -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_LEN 4 -/* enum: Out. */ -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OUT 0x0 -/* enum: In. */ -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_IN 0x1 - - -/***********************************/ -/* MC_CMD_SENSOR_SET_LIMS - * Adjusts the sensor limits. This is a warranty-voiding operation. Returns: - * ENOENT if the sensor specified does not exist, EINVAL if the limits are out - * of range. - */ -#define MC_CMD_SENSOR_SET_LIMS 0x4e -#undef MC_CMD_0x4e_PRIVILEGE_CTG - -#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_SENSOR_SET_LIMS_IN msgrequest */ -#define MC_CMD_SENSOR_SET_LIMS_IN_LEN 20 -#define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_OFST 0 -#define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ -/* interpretation is is sensor-specific. */ -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4 -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN 4 -/* interpretation is is sensor-specific. */ -#define MC_CMD_SENSOR_SET_LIMS_IN_HI0_OFST 8 -#define MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN 4 -/* interpretation is is sensor-specific. */ -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_OFST 12 -#define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN 4 -/* interpretation is is sensor-specific. */ -#define MC_CMD_SENSOR_SET_LIMS_IN_HI1_OFST 16 -#define MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN 4 - -/* MC_CMD_SENSOR_SET_LIMS_OUT msgresponse */ -#define MC_CMD_SENSOR_SET_LIMS_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_GET_RESOURCE_LIMITS - */ -#define MC_CMD_GET_RESOURCE_LIMITS 0x4f - -/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */ -#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0 - -/* MC_CMD_GET_RESOURCE_LIMITS_OUT msgresponse */ -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN 16 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_OFST 0 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_LEN 4 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_OFST 4 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_LEN 4 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_OFST 8 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_LEN 4 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_OFST 12 -#define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_LEN 4 - - /***********************************/ /* MC_CMD_NVRAM_PARTITIONS * Reads the list of available virtual NVRAM partition types. Locks required: @@ -8582,806 +8990,6 @@ #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_OFST 12 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_LEN 4 - -/***********************************/ -/* MC_CMD_CLP - * Perform a CLP related operation, see SF-110495-PS for details of CLP - * processing. This command has been extended to accomodate the requirements of - * different manufacturers which are to be found in SF-119187-TC, SF-119186-TC, - * SF-120509-TC and SF-117282-PS. - */ -#define MC_CMD_CLP 0x56 -#undef MC_CMD_0x56_PRIVILEGE_CTG - -#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_CLP_IN msgrequest */ -#define MC_CMD_CLP_IN_LEN 4 -/* Sub operation */ -#define MC_CMD_CLP_IN_OP_OFST 0 -#define MC_CMD_CLP_IN_OP_LEN 4 -/* enum: Return to factory default settings */ -#define MC_CMD_CLP_OP_DEFAULT 0x1 -/* enum: Set MAC address */ -#define MC_CMD_CLP_OP_SET_MAC 0x2 -/* enum: Get MAC address */ -#define MC_CMD_CLP_OP_GET_MAC 0x3 -/* enum: Set UEFI/GPXE boot mode */ -#define MC_CMD_CLP_OP_SET_BOOT 0x4 -/* enum: Get UEFI/GPXE boot mode */ -#define MC_CMD_CLP_OP_GET_BOOT 0x5 - -/* MC_CMD_CLP_OUT msgresponse */ -#define MC_CMD_CLP_OUT_LEN 0 - -/* MC_CMD_CLP_IN_DEFAULT msgrequest */ -#define MC_CMD_CLP_IN_DEFAULT_LEN 4 -/* MC_CMD_CLP_IN_OP_OFST 0 */ -/* MC_CMD_CLP_IN_OP_LEN 4 */ - -/* MC_CMD_CLP_OUT_DEFAULT msgresponse */ -#define MC_CMD_CLP_OUT_DEFAULT_LEN 0 - -/* MC_CMD_CLP_IN_SET_MAC msgrequest */ -#define MC_CMD_CLP_IN_SET_MAC_LEN 12 -/* MC_CMD_CLP_IN_OP_OFST 0 */ -/* MC_CMD_CLP_IN_OP_LEN 4 */ -/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00 - * restores the permanent (factory-programmed) MAC address associated with the - * port. A non-zero MAC address persists until a PCIe reset or a power cycle. - */ -#define MC_CMD_CLP_IN_SET_MAC_ADDR_OFST 4 -#define MC_CMD_CLP_IN_SET_MAC_ADDR_LEN 6 -/* Padding */ -#define MC_CMD_CLP_IN_SET_MAC_RESERVED_OFST 10 -#define MC_CMD_CLP_IN_SET_MAC_RESERVED_LEN 2 - -/* MC_CMD_CLP_OUT_SET_MAC msgresponse */ -#define MC_CMD_CLP_OUT_SET_MAC_LEN 0 - -/* MC_CMD_CLP_IN_SET_MAC_V2 msgrequest */ -#define MC_CMD_CLP_IN_SET_MAC_V2_LEN 16 -/* MC_CMD_CLP_IN_OP_OFST 0 */ -/* MC_CMD_CLP_IN_OP_LEN 4 */ -/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00 - * restores the permanent (factory-programmed) MAC address associated with the - * port. A non-zero MAC address persists until a PCIe reset or a power cycle. - */ -#define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_OFST 4 -#define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_LEN 6 -/* Padding */ -#define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_OFST 10 -#define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_LEN 2 -#define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_OFST 12 -#define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_LEN 4 -#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_OFST 12 -#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_LBN 0 -#define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_WIDTH 1 - -/* MC_CMD_CLP_IN_GET_MAC msgrequest */ -#define MC_CMD_CLP_IN_GET_MAC_LEN 4 -/* MC_CMD_CLP_IN_OP_OFST 0 */ -/* MC_CMD_CLP_IN_OP_LEN 4 */ - -/* MC_CMD_CLP_IN_GET_MAC_V2 msgrequest */ -#define MC_CMD_CLP_IN_GET_MAC_V2_LEN 8 -/* MC_CMD_CLP_IN_OP_OFST 0 */ -/* MC_CMD_CLP_IN_OP_LEN 4 */ -#define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_OFST 4 -#define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_LEN 4 -#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_OFST 4 -#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_LBN 0 -#define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_WIDTH 1 - -/* MC_CMD_CLP_OUT_GET_MAC msgresponse */ -#define MC_CMD_CLP_OUT_GET_MAC_LEN 8 -/* MAC address assigned to port */ -#define MC_CMD_CLP_OUT_GET_MAC_ADDR_OFST 0 -#define MC_CMD_CLP_OUT_GET_MAC_ADDR_LEN 6 -/* Padding */ -#define MC_CMD_CLP_OUT_GET_MAC_RESERVED_OFST 6 -#define MC_CMD_CLP_OUT_GET_MAC_RESERVED_LEN 2 - -/* MC_CMD_CLP_IN_SET_BOOT msgrequest */ -#define MC_CMD_CLP_IN_SET_BOOT_LEN 5 -/* MC_CMD_CLP_IN_OP_OFST 0 */ -/* MC_CMD_CLP_IN_OP_LEN 4 */ -/* Boot flag */ -#define MC_CMD_CLP_IN_SET_BOOT_FLAG_OFST 4 -#define MC_CMD_CLP_IN_SET_BOOT_FLAG_LEN 1 - -/* MC_CMD_CLP_OUT_SET_BOOT msgresponse */ -#define MC_CMD_CLP_OUT_SET_BOOT_LEN 0 - -/* MC_CMD_CLP_IN_GET_BOOT msgrequest */ -#define MC_CMD_CLP_IN_GET_BOOT_LEN 4 -/* MC_CMD_CLP_IN_OP_OFST 0 */ -/* MC_CMD_CLP_IN_OP_LEN 4 */ - -/* MC_CMD_CLP_OUT_GET_BOOT msgresponse */ -#define MC_CMD_CLP_OUT_GET_BOOT_LEN 4 -/* Boot flag */ -#define MC_CMD_CLP_OUT_GET_BOOT_FLAG_OFST 0 -#define MC_CMD_CLP_OUT_GET_BOOT_FLAG_LEN 1 -/* Padding */ -#define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_OFST 1 -#define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_LEN 3 - - -/***********************************/ -/* MC_CMD_MUM - * Perform a MUM operation - */ -#define MC_CMD_MUM 0x57 -#undef MC_CMD_0x57_PRIVILEGE_CTG - -#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_MUM_IN msgrequest */ -#define MC_CMD_MUM_IN_LEN 4 -#define MC_CMD_MUM_IN_OP_HDR_OFST 0 -#define MC_CMD_MUM_IN_OP_HDR_LEN 4 -#define MC_CMD_MUM_IN_OP_OFST 0 -#define MC_CMD_MUM_IN_OP_LBN 0 -#define MC_CMD_MUM_IN_OP_WIDTH 8 -/* enum: NULL MCDI command to MUM */ -#define MC_CMD_MUM_OP_NULL 0x1 -/* enum: Get MUM version */ -#define MC_CMD_MUM_OP_GET_VERSION 0x2 -/* enum: Issue raw I2C command to MUM */ -#define MC_CMD_MUM_OP_RAW_CMD 0x3 -/* enum: Read from registers on devices connected to MUM. */ -#define MC_CMD_MUM_OP_READ 0x4 -/* enum: Write to registers on devices connected to MUM. */ -#define MC_CMD_MUM_OP_WRITE 0x5 -/* enum: Control UART logging. */ -#define MC_CMD_MUM_OP_LOG 0x6 -/* enum: Operations on MUM GPIO lines */ -#define MC_CMD_MUM_OP_GPIO 0x7 -/* enum: Get sensor readings from MUM */ -#define MC_CMD_MUM_OP_READ_SENSORS 0x8 -/* enum: Initiate clock programming on the MUM */ -#define MC_CMD_MUM_OP_PROGRAM_CLOCKS 0x9 -/* enum: Initiate FPGA load from flash on the MUM */ -#define MC_CMD_MUM_OP_FPGA_LOAD 0xa -/* enum: Request sensor reading from MUM ADC resulting from earlier request via - * MUM ATB - */ -#define MC_CMD_MUM_OP_READ_ATB_SENSOR 0xb -/* enum: Send commands relating to the QSFP ports via the MUM for PHY - * operations - */ -#define MC_CMD_MUM_OP_QSFP 0xc -/* enum: Request discrete and SODIMM DDR info (type, size, speed grade, voltage - * level) from MUM - */ -#define MC_CMD_MUM_OP_READ_DDR_INFO 0xd - -/* MC_CMD_MUM_IN_NULL msgrequest */ -#define MC_CMD_MUM_IN_NULL_LEN 4 -/* MUM cmd header */ -#define MC_CMD_MUM_IN_CMD_OFST 0 -#define MC_CMD_MUM_IN_CMD_LEN 4 - -/* MC_CMD_MUM_IN_GET_VERSION msgrequest */ -#define MC_CMD_MUM_IN_GET_VERSION_LEN 4 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ - -/* MC_CMD_MUM_IN_READ msgrequest */ -#define MC_CMD_MUM_IN_READ_LEN 16 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -/* ID of (device connected to MUM) to read from registers of */ -#define MC_CMD_MUM_IN_READ_DEVICE_OFST 4 -#define MC_CMD_MUM_IN_READ_DEVICE_LEN 4 -/* enum: Hittite HMC1035 clock generator on Sorrento board */ -#define MC_CMD_MUM_DEV_HITTITE 0x1 -/* enum: Hittite HMC1035 clock generator for NIC-side on Sorrento board */ -#define MC_CMD_MUM_DEV_HITTITE_NIC 0x2 -/* 32-bit address to read from */ -#define MC_CMD_MUM_IN_READ_ADDR_OFST 8 -#define MC_CMD_MUM_IN_READ_ADDR_LEN 4 -/* Number of words to read. */ -#define MC_CMD_MUM_IN_READ_NUMWORDS_OFST 12 -#define MC_CMD_MUM_IN_READ_NUMWORDS_LEN 4 - -/* MC_CMD_MUM_IN_WRITE msgrequest */ -#define MC_CMD_MUM_IN_WRITE_LENMIN 16 -#define MC_CMD_MUM_IN_WRITE_LENMAX 252 -#define MC_CMD_MUM_IN_WRITE_LENMAX_MCDI2 1020 -#define MC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num)) -#define MC_CMD_MUM_IN_WRITE_BUFFER_NUM(len) (((len)-12)/4) -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -/* ID of (device connected to MUM) to write to registers of */ -#define MC_CMD_MUM_IN_WRITE_DEVICE_OFST 4 -#define MC_CMD_MUM_IN_WRITE_DEVICE_LEN 4 -/* enum: Hittite HMC1035 clock generator on Sorrento board */ -/* MC_CMD_MUM_DEV_HITTITE 0x1 */ -/* 32-bit address to write to */ -#define MC_CMD_MUM_IN_WRITE_ADDR_OFST 8 -#define MC_CMD_MUM_IN_WRITE_ADDR_LEN 4 -/* Words to write */ -#define MC_CMD_MUM_IN_WRITE_BUFFER_OFST 12 -#define MC_CMD_MUM_IN_WRITE_BUFFER_LEN 4 -#define MC_CMD_MUM_IN_WRITE_BUFFER_MINNUM 1 -#define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM 60 -#define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM_MCDI2 252 - -/* MC_CMD_MUM_IN_RAW_CMD msgrequest */ -#define MC_CMD_MUM_IN_RAW_CMD_LENMIN 17 -#define MC_CMD_MUM_IN_RAW_CMD_LENMAX 252 -#define MC_CMD_MUM_IN_RAW_CMD_LENMAX_MCDI2 1020 -#define MC_CMD_MUM_IN_RAW_CMD_LEN(num) (16+1*(num)) -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_NUM(len) (((len)-16)/1) -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -/* MUM I2C cmd code */ -#define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_OFST 4 -#define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_LEN 4 -/* Number of bytes to write */ -#define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_OFST 8 -#define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_LEN 4 -/* Number of bytes to read */ -#define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_OFST 12 -#define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_LEN 4 -/* Bytes to write */ -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_OFST 16 -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_LEN 1 -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MINNUM 1 -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM 236 -#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM_MCDI2 1004 - -/* MC_CMD_MUM_IN_LOG msgrequest */ -#define MC_CMD_MUM_IN_LOG_LEN 8 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_LOG_OP_OFST 4 -#define MC_CMD_MUM_IN_LOG_OP_LEN 4 -#define MC_CMD_MUM_IN_LOG_OP_UART 0x1 /* enum */ - -/* MC_CMD_MUM_IN_LOG_OP_UART msgrequest */ -#define MC_CMD_MUM_IN_LOG_OP_UART_LEN 12 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -/* MC_CMD_MUM_IN_LOG_OP_OFST 4 */ -/* MC_CMD_MUM_IN_LOG_OP_LEN 4 */ -/* Enable/disable debug output to UART */ -#define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_OFST 8 -#define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_LEN 4 - -/* MC_CMD_MUM_IN_GPIO msgrequest */ -#define MC_CMD_MUM_IN_GPIO_LEN 8 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_HDR_LEN 4 -#define MC_CMD_MUM_IN_GPIO_OPCODE_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OPCODE_LBN 0 -#define MC_CMD_MUM_IN_GPIO_OPCODE_WIDTH 8 -#define MC_CMD_MUM_IN_GPIO_IN_READ 0x0 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE 0x1 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OUT_READ 0x2 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE 0x3 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ 0x4 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OP 0x5 /* enum */ - -/* MC_CMD_MUM_IN_GPIO_IN_READ msgrequest */ -#define MC_CMD_MUM_IN_GPIO_IN_READ_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_LEN 4 - -/* MC_CMD_MUM_IN_GPIO_OUT_WRITE msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_LEN 16 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_LEN 4 -/* The first 32-bit word to be written to the GPIO OUT register. */ -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_OFST 8 -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_LEN 4 -/* The second 32-bit word to be written to the GPIO OUT register. */ -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_OFST 12 -#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_LEN 4 - -/* MC_CMD_MUM_IN_GPIO_OUT_READ msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OUT_READ_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_LEN 4 - -/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_LEN 16 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_LEN 4 -/* The first 32-bit word to be written to the GPIO OUT ENABLE register. */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_OFST 8 -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_LEN 4 -/* The second 32-bit word to be written to the GPIO OUT ENABLE register. */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_OFST 12 -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_LEN 4 - -/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_LEN 4 - -/* MC_CMD_MUM_IN_GPIO_OP msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OP_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OP_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_HDR_LEN 4 -#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_LBN 8 -#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_WIDTH 8 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ 0x0 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE 0x1 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG 0x2 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE 0x3 /* enum */ -#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_LBN 16 -#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_WIDTH 8 - -/* MC_CMD_MUM_IN_GPIO_OP_OUT_READ msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_LEN 4 - -/* MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_LEN 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_LBN 24 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_WIDTH 8 - -/* MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_LEN 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_LBN 24 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_WIDTH 8 - -/* MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE msgrequest */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_LEN 8 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_LEN 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_OFST 4 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_LBN 24 -#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_WIDTH 8 - -/* MC_CMD_MUM_IN_READ_SENSORS msgrequest */ -#define MC_CMD_MUM_IN_READ_SENSORS_LEN 8 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_OFST 4 -#define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_LEN 4 -#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_OFST 4 -#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_LBN 0 -#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_WIDTH 8 -#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_OFST 4 -#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_LBN 8 -#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_WIDTH 8 - -/* MC_CMD_MUM_IN_PROGRAM_CLOCKS msgrequest */ -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_LEN 12 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -/* Bit-mask of clocks to be programmed */ -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_OFST 4 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_LEN 4 -#define MC_CMD_MUM_CLOCK_ID_FPGA 0x0 /* enum */ -#define MC_CMD_MUM_CLOCK_ID_DDR 0x1 /* enum */ -#define MC_CMD_MUM_CLOCK_ID_NIC 0x2 /* enum */ -/* Control flags for clock programming */ -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_OFST 8 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_LEN 4 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_OFST 8 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_LBN 0 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_WIDTH 1 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_OFST 8 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_LBN 1 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_WIDTH 1 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_OFST 8 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_LBN 2 -#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_WIDTH 1 - -/* MC_CMD_MUM_IN_FPGA_LOAD msgrequest */ -#define MC_CMD_MUM_IN_FPGA_LOAD_LEN 8 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -/* Enable/Disable FPGA config from flash */ -#define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_OFST 4 -#define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_LEN 4 - -/* MC_CMD_MUM_IN_READ_ATB_SENSOR msgrequest */ -#define MC_CMD_MUM_IN_READ_ATB_SENSOR_LEN 4 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ - -/* MC_CMD_MUM_IN_QSFP msgrequest */ -#define MC_CMD_MUM_IN_QSFP_LEN 12 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_QSFP_HDR_OFST 4 -#define MC_CMD_MUM_IN_QSFP_HDR_LEN 4 -#define MC_CMD_MUM_IN_QSFP_OPCODE_OFST 4 -#define MC_CMD_MUM_IN_QSFP_OPCODE_LBN 0 -#define MC_CMD_MUM_IN_QSFP_OPCODE_WIDTH 4 -#define MC_CMD_MUM_IN_QSFP_INIT 0x0 /* enum */ -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE 0x1 /* enum */ -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP 0x2 /* enum */ -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO 0x3 /* enum */ -#define MC_CMD_MUM_IN_QSFP_FILL_STATS 0x4 /* enum */ -#define MC_CMD_MUM_IN_QSFP_POLL_BIST 0x5 /* enum */ -#define MC_CMD_MUM_IN_QSFP_IDX_OFST 8 -#define MC_CMD_MUM_IN_QSFP_IDX_LEN 4 - -/* MC_CMD_MUM_IN_QSFP_INIT msgrequest */ -#define MC_CMD_MUM_IN_QSFP_INIT_LEN 16 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_QSFP_INIT_HDR_OFST 4 -#define MC_CMD_MUM_IN_QSFP_INIT_HDR_LEN 4 -#define MC_CMD_MUM_IN_QSFP_INIT_IDX_OFST 8 -#define MC_CMD_MUM_IN_QSFP_INIT_IDX_LEN 4 -#define MC_CMD_MUM_IN_QSFP_INIT_CAGE_OFST 12 -#define MC_CMD_MUM_IN_QSFP_INIT_CAGE_LEN 4 - -/* MC_CMD_MUM_IN_QSFP_RECONFIGURE msgrequest */ -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_LEN 24 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_OFST 4 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_LEN 4 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_OFST 8 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_LEN 4 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_OFST 12 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_LEN 4 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_OFST 16 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_LEN 4 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_OFST 20 -#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_LEN 4 - -/* MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP msgrequest */ -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_LEN 12 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_OFST 4 -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_LEN 4 -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_OFST 8 -#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_LEN 4 - -/* MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO msgrequest */ -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_LEN 16 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_OFST 4 -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_LEN 4 -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_OFST 8 -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_LEN 4 -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_OFST 12 -#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_LEN 4 - -/* MC_CMD_MUM_IN_QSFP_FILL_STATS msgrequest */ -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_LEN 12 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_OFST 4 -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_LEN 4 -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_OFST 8 -#define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_LEN 4 - -/* MC_CMD_MUM_IN_QSFP_POLL_BIST msgrequest */ -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_LEN 12 -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_OFST 4 -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_LEN 4 -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_OFST 8 -#define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_LEN 4 - -/* MC_CMD_MUM_IN_READ_DDR_INFO msgrequest */ -#define MC_CMD_MUM_IN_READ_DDR_INFO_LEN 4 -/* MUM cmd header */ -/* MC_CMD_MUM_IN_CMD_OFST 0 */ -/* MC_CMD_MUM_IN_CMD_LEN 4 */ - -/* MC_CMD_MUM_OUT msgresponse */ -#define MC_CMD_MUM_OUT_LEN 0 - -/* MC_CMD_MUM_OUT_NULL msgresponse */ -#define MC_CMD_MUM_OUT_NULL_LEN 0 - -/* MC_CMD_MUM_OUT_GET_VERSION msgresponse */ -#define MC_CMD_MUM_OUT_GET_VERSION_LEN 12 -#define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_OFST 0 -#define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_LEN 4 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64 -#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32 - -/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */ -#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1 -#define MC_CMD_MUM_OUT_RAW_CMD_LENMAX 252 -#define MC_CMD_MUM_OUT_RAW_CMD_LENMAX_MCDI2 1020 -#define MC_CMD_MUM_OUT_RAW_CMD_LEN(num) (0+1*(num)) -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_NUM(len) (((len)-0)/1) -/* returned data */ -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_OFST 0 -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_LEN 1 -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MINNUM 1 -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM 252 -#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM_MCDI2 1020 - -/* MC_CMD_MUM_OUT_READ msgresponse */ -#define MC_CMD_MUM_OUT_READ_LENMIN 4 -#define MC_CMD_MUM_OUT_READ_LENMAX 252 -#define MC_CMD_MUM_OUT_READ_LENMAX_MCDI2 1020 -#define MC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num)) -#define MC_CMD_MUM_OUT_READ_BUFFER_NUM(len) (((len)-0)/4) -#define MC_CMD_MUM_OUT_READ_BUFFER_OFST 0 -#define MC_CMD_MUM_OUT_READ_BUFFER_LEN 4 -#define MC_CMD_MUM_OUT_READ_BUFFER_MINNUM 1 -#define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM 63 -#define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM_MCDI2 255 - -/* MC_CMD_MUM_OUT_WRITE msgresponse */ -#define MC_CMD_MUM_OUT_WRITE_LEN 0 - -/* MC_CMD_MUM_OUT_LOG msgresponse */ -#define MC_CMD_MUM_OUT_LOG_LEN 0 - -/* MC_CMD_MUM_OUT_LOG_OP_UART msgresponse */ -#define MC_CMD_MUM_OUT_LOG_OP_UART_LEN 0 - -/* MC_CMD_MUM_OUT_GPIO_IN_READ msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_IN_READ_LEN 8 -/* The first 32-bit word read from the GPIO IN register. */ -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_OFST 0 -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_LEN 4 -/* The second 32-bit word read from the GPIO IN register. */ -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_OFST 4 -#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_LEN 4 - -/* MC_CMD_MUM_OUT_GPIO_OUT_WRITE msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OUT_WRITE_LEN 0 - -/* MC_CMD_MUM_OUT_GPIO_OUT_READ msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_LEN 8 -/* The first 32-bit word read from the GPIO OUT register. */ -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_OFST 0 -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_LEN 4 -/* The second 32-bit word read from the GPIO OUT register. */ -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_OFST 4 -#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_LEN 4 - -/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE_LEN 0 - -/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_LEN 8 -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_OFST 0 -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_LEN 4 -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_OFST 4 -#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_LEN 4 - -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_READ msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_LEN 4 -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_OFST 0 -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_LEN 4 - -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE_LEN 0 - -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG_LEN 0 - -/* MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE msgresponse */ -#define MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE_LEN 0 - -/* MC_CMD_MUM_OUT_READ_SENSORS msgresponse */ -#define MC_CMD_MUM_OUT_READ_SENSORS_LENMIN 4 -#define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX 252 -#define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX_MCDI2 1020 -#define MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num)) -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_NUM(len) (((len)-0)/4) -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_OFST 0 -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4 -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM 1 -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM 63 -#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM_MCDI2 255 -#define MC_CMD_MUM_OUT_READ_SENSORS_READING_OFST 0 -#define MC_CMD_MUM_OUT_READ_SENSORS_READING_LBN 0 -#define MC_CMD_MUM_OUT_READ_SENSORS_READING_WIDTH 16 -#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_OFST 0 -#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_LBN 16 -#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_WIDTH 8 -#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_OFST 0 -#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_LBN 24 -#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_WIDTH 8 - -/* MC_CMD_MUM_OUT_PROGRAM_CLOCKS msgresponse */ -#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_LEN 4 -#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_OFST 0 -#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_LEN 4 - -/* MC_CMD_MUM_OUT_FPGA_LOAD msgresponse */ -#define MC_CMD_MUM_OUT_FPGA_LOAD_LEN 0 - -/* MC_CMD_MUM_OUT_READ_ATB_SENSOR msgresponse */ -#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_LEN 4 -#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_OFST 0 -#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_LEN 4 - -/* MC_CMD_MUM_OUT_QSFP_INIT msgresponse */ -#define MC_CMD_MUM_OUT_QSFP_INIT_LEN 0 - -/* MC_CMD_MUM_OUT_QSFP_RECONFIGURE msgresponse */ -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_LEN 8 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_OFST 0 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_LEN 4 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_OFST 4 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_LEN 4 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_OFST 4 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_LBN 0 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_WIDTH 1 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_OFST 4 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_LBN 1 -#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_WIDTH 1 - -/* MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP msgresponse */ -#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_LEN 4 -#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_OFST 0 -#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_LEN 4 - -/* MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO msgresponse */ -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMIN 5 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX 252 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX_MCDI2 1020 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num)) -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_NUM(len) (((len)-4)/1) -/* in bytes */ -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_OFST 0 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_LEN 4 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_OFST 4 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_LEN 1 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MINNUM 1 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM 248 -#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM_MCDI2 1016 - -/* MC_CMD_MUM_OUT_QSFP_FILL_STATS msgresponse */ -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_LEN 8 -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_OFST 0 -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_LEN 4 -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_OFST 4 -#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_LEN 4 - -/* MC_CMD_MUM_OUT_QSFP_POLL_BIST msgresponse */ -#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_LEN 4 -#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_OFST 0 -#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_LEN 4 - -/* MC_CMD_MUM_OUT_READ_DDR_INFO msgresponse */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMIN 24 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX 248 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX_MCDI2 1016 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_LEN(num) (8+8*(num)) -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_NUM(len) (((len)-8)/8) -/* Discrete (soldered) DDR resistor strap info */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_OFST 0 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_LEN 4 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_OFST 0 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_LBN 0 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_WIDTH 16 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_OFST 0 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_LBN 16 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_WIDTH 16 -/* Number of SODIMM info records */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_OFST 4 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_LEN 4 -/* Array of SODIMM info records */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_LBN 0 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_WIDTH 8 -/* enum: SODIMM bank 1 (Top SODIMM for Sorrento) */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK1 0x0 -/* enum: SODIMM bank 2 (Bottom SODDIMM for Sorrento) */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK2 0x1 -/* enum: Total number of SODIMM banks */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_BANKS 0x2 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_LBN 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_WIDTH 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_LBN 16 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_WIDTH 4 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_LBN 20 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_WIDTH 4 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_POWERED 0x0 /* enum */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V25 0x1 /* enum */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V35 0x2 /* enum */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V5 0x3 /* enum */ -/* enum: Values 5-15 are reserved for future usage */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_1V8 0x4 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_LBN 24 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_WIDTH 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_LBN 32 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_WIDTH 16 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_LBN 48 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_WIDTH 4 -/* enum: No module present */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_ABSENT 0x0 -/* enum: Module present supported and powered on */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_POWERED 0x1 -/* enum: Module present but bad type */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_TYPE 0x2 -/* enum: Module present but incompatible voltage */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_VOLTAGE 0x3 -/* enum: Module present but unknown SPD */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SPD 0x4 -/* enum: Module present but slot cannot support it */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SLOT 0x5 -/* enum: Modules may or may not be present, but cannot establish contact by I2C - */ -#define MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_REACHABLE 0x6 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_OFST 8 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_LBN 52 -#define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_WIDTH 12 - /* MC_CMD_DYNAMIC_SENSORS_LIMITS structuredef: Set of sensor limits. This * should match the equivalent structure in the sensor_query SPHINX service. */ @@ -9500,27 +9108,22 @@ * and a generation count for this version of the sensor table. On systems * advertising the DYNAMIC_SENSORS capability bit, this replaces the * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors - * added by the NMC. - * - * Sensor handles are persistent for the lifetime of the sensor and are used to - * identify sensors in MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and - * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. - * - * The generation count is maintained by the MC, is persistent across reboots - * and will be incremented each time the sensor table is modified. When the - * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated - * containing the new generation count. The driver should compare this against - * the current generation count, and if it is different, call - * MC_CMD_DYNAMIC_SENSORS_LIST again to update it's copy of the sensor table. - * - * The sensor count is provided to allow a future path to supporting more than + * added by the NMC. Sensor handles are persistent for the lifetime of the + * sensor and are used to identify sensors in + * MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and + * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. The generation count is maintained by the + * MC, is persistent across reboots and will be incremented each time the + * sensor table is modified. When the table is modified, a + * CODE_DYNAMIC_SENSORS_CHANGE event will be generated containing the new + * generation count. The driver should compare this against the current + * generation count, and if it is different, call MC_CMD_DYNAMIC_SENSORS_LIST + * again to update it's copy of the sensor table. The sensor count is provided + * to allow a future path to supporting more than * MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 sensors, i.e. * the maximum number that will fit in a single response. As this is a fairly * large number (253) it is not anticipated that this will be needed in the - * near future, so can currently be ignored. - * - * On Riverhead this command is implemented as a wrapper for `list` in the - * sensor_query SPHINX service. + * near future, so can currently be ignored. On Riverhead this command is + * implemented as a wrapper for `list` in the sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_LIST 0x66 #undef MC_CMD_0x66_PRIVILEGE_CTG @@ -9557,15 +9160,13 @@ /***********************************/ /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS * Get descriptions for a set of sensors, specified as an array of sensor - * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST - * - * Any handles which do not correspond to a sensor currently managed by the MC - * will be dropped from from the response. This may happen when a sensor table - * update is in progress, and effectively means the set of usable sensors is - * the intersection between the sets of sensors known to the driver and the MC. - * - * On Riverhead this command is implemented as a wrapper for - * `get_descriptions` in the sensor_query SPHINX service. + * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. Any handles which do not + * correspond to a sensor currently managed by the MC will be dropped from from + * the response. This may happen when a sensor table update is in progress, and + * effectively means the set of usable sensors is the intersection between the + * sets of sensors known to the driver and the MC. On Riverhead this command is + * implemented as a wrapper for `get_descriptions` in the sensor_query SPHINX + * service. */ #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67 #undef MC_CMD_0x67_PRIVILEGE_CTG @@ -9602,19 +9203,15 @@ /***********************************/ /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS * Read the state and value for a set of sensors, specified as an array of - * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. - * - * In the case of a broken sensor, then the state of the response's - * MC_CMD_DYNAMIC_SENSORS_VALUE entry will be set to BROKEN, and any value - * provided should be treated as erroneous. - * - * Any handles which do not correspond to a sensor currently managed by the MC - * will be dropped from from the response. This may happen when a sensor table - * update is in progress, and effectively means the set of usable sensors is - * the intersection between the sets of sensors known to the driver and the MC. - * - * On Riverhead this command is implemented as a wrapper for `get_readings` - * in the sensor_query SPHINX service. + * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. In the case of a + * broken sensor, then the state of the response's MC_CMD_DYNAMIC_SENSORS_VALUE + * entry will be set to BROKEN, and any value provided should be treated as + * erroneous. Any handles which do not correspond to a sensor currently managed + * by the MC will be dropped from from the response. This may happen when a + * sensor table update is in progress, and effectively means the set of usable + * sensors is the intersection between the sets of sensors known to the driver + * and the MC. On Riverhead this command is implemented as a wrapper for + * `get_readings` in the sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68 #undef MC_CMD_0x68_PRIVILEGE_CTG @@ -9647,45 +9244,1190 @@ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM 21 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM_MCDI2 85 +/* MC_CMD_MAC_FLAGS structuredef */ +#define MC_CMD_MAC_FLAGS_LEN 4 +/* The enums defined in this field are used as indices into the + * MC_CMD_MAC_FLAGS bitmask. + */ +#define MC_CMD_MAC_FLAGS_MASK_OFST 0 +#define MC_CMD_MAC_FLAGS_MASK_LEN 4 +/* enum property: bitshift */ +/* enum: Include the FCS in the packet data delivered to the host. Ignored if + * RX_INCLUDE_FCS not set in capabilities. + */ +#define MC_CMD_MAC_FLAGS_FLAG_INCLUDE_FCS 0x0 +#define MC_CMD_MAC_FLAGS_MASK_LBN 0 +#define MC_CMD_MAC_FLAGS_MASK_WIDTH 32 + +/* MC_CMD_TRANSMISSION_MODE structuredef */ +#define MC_CMD_TRANSMISSION_MODE_LEN 4 +#define MC_CMD_TRANSMISSION_MODE_MASK_OFST 0 +#define MC_CMD_TRANSMISSION_MODE_MASK_LEN 4 +/* enum property: value */ +#define MC_CMD_TRANSMISSION_MODE_PROMSC_MODE 0x0 /* enum */ +#define MC_CMD_TRANSMISSION_MODE_UNCST_MODE 0x1 /* enum */ +#define MC_CMD_TRANSMISSION_MODE_BRDCST_MODE 0x2 /* enum */ +#define MC_CMD_TRANSMISSION_MODE_MASK_LBN 0 +#define MC_CMD_TRANSMISSION_MODE_MASK_WIDTH 32 + +/* MC_CMD_MAC_CONFIG_OPTIONS structuredef */ +#define MC_CMD_MAC_CONFIG_OPTIONS_LEN 4 +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_OFST 0 +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_LEN 4 +/* enum property: bitmask */ +/* enum: Configure the MAC address. */ +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_ADDR 0x0 +/* enum: Configure the maximum frame length. */ +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_MAX_FRAME_LEN 0x1 +/* enum: Configure flow control. */ +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_FCNTL 0x2 +/* enum: Configure the transmission mode. */ +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_TRANSMISSION_MODE 0x3 +/* enum: Configure FCS. */ +#define MC_CMD_MAC_CONFIG_OPTIONS_CFG_INCLUDE_FCS 0x4 +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_LBN 0 +#define MC_CMD_MAC_CONFIG_OPTIONS_MASK_WIDTH 32 + + +/***********************************/ +/* MC_CMD_MAC_CTRL + * Set MAC configuration. Return code: 0, EINVAL, ENOTSUP + */ +#define MC_CMD_MAC_CTRL 0x1df +#undef MC_CMD_0x1df_PRIVILEGE_CTG + +#define MC_CMD_0x1df_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_MAC_CTRL_IN msgrequest */ +#define MC_CMD_MAC_CTRL_IN_LEN 32 +/* Handle for selected network port. */ +#define MC_CMD_MAC_CTRL_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_MAC_CTRL_IN_PORT_HANDLE_LEN 4 +/* Select which parameters to configure. A parameter will only be modified if + * the corresponding control flag is set. + */ +#define MC_CMD_MAC_CTRL_IN_CONTROL_FLAGS_OFST 4 +#define MC_CMD_MAC_CTRL_IN_CONTROL_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_MAC_CONFIG_OPTIONS/MASK */ +/* MAC address of the device. */ +#define MC_CMD_MAC_CTRL_IN_ADDR_OFST 8 +#define MC_CMD_MAC_CTRL_IN_ADDR_LEN 8 +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_OFST 8 +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_LEN 4 +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_LBN 64 +#define MC_CMD_MAC_CTRL_IN_ADDR_LO_WIDTH 32 +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_OFST 12 +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_LEN 4 +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_LBN 96 +#define MC_CMD_MAC_CTRL_IN_ADDR_HI_WIDTH 32 +/* Includes the ethernet header, optional VLAN tags, payload and FCS. */ +#define MC_CMD_MAC_CTRL_IN_MAX_FRAME_LEN_OFST 16 +#define MC_CMD_MAC_CTRL_IN_MAX_FRAME_LEN_LEN 4 +/* Settings for flow control. */ +#define MC_CMD_MAC_CTRL_IN_FCNTL_OFST 20 +#define MC_CMD_MAC_CTRL_IN_FCNTL_LEN 4 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_FCNTL/MASK */ +/* Configure the MAC to transmit in one of promiscuous, unicast or broadcast + * mode. + */ +#define MC_CMD_MAC_CTRL_IN_TRANSMISSION_MODE_OFST 24 +#define MC_CMD_MAC_CTRL_IN_TRANSMISSION_MODE_LEN 4 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_TRANSMISSION_MODE/MASK */ +/* Flags to control and expand the configuration of the MAC. */ +#define MC_CMD_MAC_CTRL_IN_FLAGS_OFST 28 +#define MC_CMD_MAC_CTRL_IN_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_MAC_FLAGS/MASK */ -/***********************************/ -/* MC_CMD_EVENT_CTRL - * Configure which categories of unsolicited events the driver expects to - * receive (Riverhead). - */ -#define MC_CMD_EVENT_CTRL 0x69 -#undef MC_CMD_0x69_PRIVILEGE_CTG - -#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_EVENT_CTRL_IN msgrequest */ -#define MC_CMD_EVENT_CTRL_IN_LENMIN 0 -#define MC_CMD_EVENT_CTRL_IN_LENMAX 252 -#define MC_CMD_EVENT_CTRL_IN_LENMAX_MCDI2 1020 -#define MC_CMD_EVENT_CTRL_IN_LEN(num) (0+4*(num)) -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_NUM(len) (((len)-0)/4) -/* Array of event categories for which the driver wishes to receive events. */ -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_OFST 0 -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_LEN 4 -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MINNUM 0 -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM 63 -#define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM_MCDI2 255 -/* enum: Driver wishes to receive LINKCHANGE events. */ -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_LINKCHANGE 0x0 -/* enum: Driver wishes to receive SENSOR_CHANGE and SENSOR_STATE_CHANGE events. - */ -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_SENSOREVT 0x1 -/* enum: Driver wishes to receive receive errors. */ -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_RX_ERR 0x2 -/* enum: Driver wishes to receive transmit errors. */ -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_TX_ERR 0x3 -/* enum: Driver wishes to receive firmware alerts. */ -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_FWALERT 0x4 -/* enum: Driver wishes to receive reboot events. */ -#define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_MC_REBOOT 0x5 - -/* MC_CMD_EVENT_CTRL_OUT msgrequest */ -#define MC_CMD_EVENT_CTRL_OUT_LEN 0 +/* MC_CMD_MAC_CTRL_IN_V2 msgrequest: Updated MAC_CTRL with QBB mask */ +#define MC_CMD_MAC_CTRL_IN_V2_LEN 33 +/* Handle for selected network port. */ +#define MC_CMD_MAC_CTRL_IN_V2_PORT_HANDLE_OFST 0 +#define MC_CMD_MAC_CTRL_IN_V2_PORT_HANDLE_LEN 4 +/* Select which parameters to configure. A parameter will only be modified if + * the corresponding control flag is set. + */ +#define MC_CMD_MAC_CTRL_IN_V2_CONTROL_FLAGS_OFST 4 +#define MC_CMD_MAC_CTRL_IN_V2_CONTROL_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_MAC_CONFIG_OPTIONS/MASK */ +/* MAC address of the device. */ +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_OFST 8 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LEN 8 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_OFST 8 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_LEN 4 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_LBN 64 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_WIDTH 32 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_OFST 12 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_LEN 4 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_LBN 96 +#define MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_WIDTH 32 +/* Includes the ethernet header, optional VLAN tags, payload and FCS. */ +#define MC_CMD_MAC_CTRL_IN_V2_MAX_FRAME_LEN_OFST 16 +#define MC_CMD_MAC_CTRL_IN_V2_MAX_FRAME_LEN_LEN 4 +/* Settings for flow control. */ +#define MC_CMD_MAC_CTRL_IN_V2_FCNTL_OFST 20 +#define MC_CMD_MAC_CTRL_IN_V2_FCNTL_LEN 4 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_FCNTL/MASK */ +/* Configure the MAC to transmit in one of promiscuous, unicast or broadcast + * mode. + */ +#define MC_CMD_MAC_CTRL_IN_V2_TRANSMISSION_MODE_OFST 24 +#define MC_CMD_MAC_CTRL_IN_V2_TRANSMISSION_MODE_LEN 4 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_TRANSMISSION_MODE/MASK */ +/* Flags to control and expand the configuration of the MAC. */ +#define MC_CMD_MAC_CTRL_IN_V2_FLAGS_OFST 28 +#define MC_CMD_MAC_CTRL_IN_V2_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_MAC_FLAGS/MASK */ +/* Priority-based flow control mask (QBB). PRIO7 corresponds to the highest + * priority, and PRIO0 to the lowest. This field is only used when CFG_FCNTL is + * set and FCNTL is QBB + */ +#define MC_CMD_MAC_CTRL_IN_V2_PRIO_FCNTL_MASK_OFST 32 +#define MC_CMD_MAC_CTRL_IN_V2_PRIO_FCNTL_MASK_LEN 1 +/* enum property: bitmask */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO0 0x0 /* enum */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO1 0x1 /* enum */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO2 0x2 /* enum */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO3 0x3 /* enum */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO4 0x4 /* enum */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO5 0x5 /* enum */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO6 0x6 /* enum */ +#define MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO7 0x7 /* enum */ + +/* MC_CMD_MAC_CTRL_OUT msgresponse */ +#define MC_CMD_MAC_CTRL_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_MAC_STATE + * Read the MAC state. Return code: 0, ETIME. + */ +#define MC_CMD_MAC_STATE 0x1e0 +#undef MC_CMD_0x1e0_PRIVILEGE_CTG + +#define MC_CMD_0x1e0_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_MAC_STATE_IN msgrequest */ +#define MC_CMD_MAC_STATE_IN_LEN 4 +/* Handle for selected network port. */ +#define MC_CMD_MAC_STATE_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_MAC_STATE_IN_PORT_HANDLE_LEN 4 + +/* MC_CMD_MAC_STATE_OUT msgresponse */ +#define MC_CMD_MAC_STATE_OUT_LEN 32 +/* The configured maximum frame length of the MAC. */ +#define MC_CMD_MAC_STATE_OUT_MAX_FRAME_LEN_OFST 0 +#define MC_CMD_MAC_STATE_OUT_MAX_FRAME_LEN_LEN 4 +/* This returns the negotiated flow control value. */ +#define MC_CMD_MAC_STATE_OUT_FCNTL_OFST 4 +#define MC_CMD_MAC_STATE_OUT_FCNTL_LEN 4 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_FCNTL/MASK */ +/* MAC address of the device. */ +#define MC_CMD_MAC_STATE_OUT_ADDR_OFST 8 +#define MC_CMD_MAC_STATE_OUT_ADDR_LEN 8 +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_OFST 8 +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_LEN 4 +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_LBN 64 +#define MC_CMD_MAC_STATE_OUT_ADDR_LO_WIDTH 32 +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_OFST 12 +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_LEN 4 +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_LBN 96 +#define MC_CMD_MAC_STATE_OUT_ADDR_HI_WIDTH 32 +/* Flags indicating MAC faults. */ +#define MC_CMD_MAC_STATE_OUT_MAC_FAULT_FLAGS_OFST 16 +#define MC_CMD_MAC_STATE_OUT_MAC_FAULT_FLAGS_LEN 4 +/* enum property: bitshift */ +/* enum: Indicates a local MAC fault. */ +#define MC_CMD_MAC_STATE_OUT_LOCAL 0x0 +/* enum: Indicates a remote MAC fault. */ +#define MC_CMD_MAC_STATE_OUT_REMOTE 0x1 +/* enum: Indicates a pending reconfiguration of the MAC. */ +#define MC_CMD_MAC_STATE_OUT_PENDING_RECONFIG 0x2 +/* The flags that were used to configure the MAC. This is a copy of the FLAGS + * field in the MC_CMD_MAC_CTRL_IN command. + */ +#define MC_CMD_MAC_STATE_OUT_FLAGS_OFST 20 +#define MC_CMD_MAC_STATE_OUT_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_MAC_FLAGS/MASK */ +/* The transmission mode that was used to configure the MAC. This is a copy of + * the TRANSMISSION_MODE field in the MC_CMD_MAC_CTRL_IN command. + */ +#define MC_CMD_MAC_STATE_OUT_TRANSMISSION_MODE_OFST 24 +#define MC_CMD_MAC_STATE_OUT_TRANSMISSION_MODE_LEN 4 +/* enum property: value */ +/* Enum values, see field(s): */ +/* MC_CMD_TRANSMISSION_MODE/MASK */ +/* The control flags that were used to configure the MAC. This is a copy of the + * CONTROL field in the MC_CMD_MAC_CTRL_IN command. + */ +#define MC_CMD_MAC_STATE_OUT_CONTROL_FLAGS_OFST 28 +#define MC_CMD_MAC_STATE_OUT_CONTROL_FLAGS_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_MAC_CONFIG_OPTIONS/MASK */ + + +/***********************************/ +/* MC_CMD_GET_ASSIGNED_PORT_HANDLE + * Obtain a handle that can be operated on to configure and query the status of + * the link. ENOENT is returned when no port is assigned to the client. Return + * code: 0, ENOENT + */ +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE 0x1e2 +#undef MC_CMD_0x1e2_PRIVILEGE_CTG + +#define MC_CMD_0x1e2_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_ASSIGNED_PORT_HANDLE_IN msgrequest */ +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_IN_LEN 0 + +/* MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT msgresponse */ +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_LEN 4 +/* Handle for assigned port. */ +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_PORT_HANDLE_OFST 0 +#define MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_PORT_HANDLE_LEN 4 + +/* MC_CMD_STAT_ID structuredef */ +#define MC_CMD_STAT_ID_LEN 4 +#define MC_CMD_STAT_ID_SOURCE_ID_OFST 0 +#define MC_CMD_STAT_ID_SOURCE_ID_LEN 2 +/* enum property: index */ +/* enum: Internal markers (generation start and end markers) */ +#define MC_CMD_STAT_ID_MARKER 0x1 +/* enum: Network port MAC statistics. */ +#define MC_CMD_STAT_ID_MAC 0x2 +/* enum: Network port PHY statistics. */ +#define MC_CMD_STAT_ID_PHY 0x3 +#define MC_CMD_STAT_ID_SOURCE_ID_LBN 0 +#define MC_CMD_STAT_ID_SOURCE_ID_WIDTH 16 +#define MC_CMD_STAT_ID_MARKER_STAT_ID_OFST 2 +#define MC_CMD_STAT_ID_MARKER_STAT_ID_LEN 2 +/* enum property: index */ +/* enum: This value is used to mark the start of a generation of statistics for + * DMA synchronization. It is incremented whenever a new set of statistics is + * transferred. Always the first entry in the DMA buffer. + */ +#define MC_CMD_STAT_ID_GENERATION_START 0x1 +/* enum: This value is used to mark the end of a generation of statistics for + * DMA synchronizaion. Always the last entry in the DMA buffer and set to the + * same value as GENERATION_START. The host driver must compare the + * GENERATION_START and GENERATION_END values to verify that the DMA buffer is + * consistent upon copying the the DMA buffer. If they do not match, it means + * that new DMA transfer has started while the host driver was copying the DMA + * buffer. In this case, the host driver must repeat the copy operation. + */ +#define MC_CMD_STAT_ID_GENERATION_END 0x2 +#define MC_CMD_STAT_ID_MARKER_STAT_ID_LBN 16 +#define MC_CMD_STAT_ID_MARKER_STAT_ID_WIDTH 16 +#define MC_CMD_STAT_ID_MAC_STAT_ID_OFST 2 +#define MC_CMD_STAT_ID_MAC_STAT_ID_LEN 2 +/* enum property: index */ +/* enum: Total number of packets transmitted (includes pause frames). */ +#define MC_CMD_STAT_ID_TX_PKTS 0x1 +/* enum: Pause frames transmitted. */ +#define MC_CMD_STAT_ID_TX_PAUSE_PKTS 0x2 +/* enum: Control frames transmitted. */ +#define MC_CMD_STAT_ID_TX_CONTROL_PKTS 0x3 +/* enum: Unicast packets transmitted (includes pause frames). */ +#define MC_CMD_STAT_ID_TX_UNICAST_PKTS 0x4 +/* enum: Multicast packets transmitted (includes pause frames). */ +#define MC_CMD_STAT_ID_TX_MULTICAST_PKTS 0x5 +/* enum: Broadcast packets transmitted (includes pause frames). */ +#define MC_CMD_STAT_ID_TX_BROADCAST_PKTS 0x6 +/* enum: Bytes transmitted (includes pause frames). */ +#define MC_CMD_STAT_ID_TX_BYTES 0x7 +/* enum: Bytes transmitted with bad CRC. */ +#define MC_CMD_STAT_ID_TX_BAD_BYTES 0x8 +/* enum: Bytes transmitted with good CRC. */ +#define MC_CMD_STAT_ID_TX_GOOD_BYTES 0x9 +/* enum: Packets transmitted with length less than 64 bytes. */ +#define MC_CMD_STAT_ID_TX_LT64_PKTS 0xa +/* enum: Packets transmitted with length equal to 64 bytes. */ +#define MC_CMD_STAT_ID_TX_64_PKTS 0xb +/* enum: Packets transmitted with length between 65 and 127 bytes. */ +#define MC_CMD_STAT_ID_TX_65_TO_127_PKTS 0xc +/* enum: Packets transmitted with length between 128 and 255 bytes. */ +#define MC_CMD_STAT_ID_TX_128_TO_255_PKTS 0xd +/* enum: Packets transmitted with length between 256 and 511 bytes. */ +#define MC_CMD_STAT_ID_TX_256_TO_511_PKTS 0xe +/* enum: Packets transmitted with length between 512 and 1023 bytes. */ +#define MC_CMD_STAT_ID_TX_512_TO_1023_PKTS 0xf +/* enum: Packets transmitted with length between 1024 and 1518 bytes. */ +#define MC_CMD_STAT_ID_TX_1024_TO_15XX_PKTS 0x10 +/* enum: Packets transmitted with length between 1519 and 9216 bytes. */ +#define MC_CMD_STAT_ID_TX_15XX_TO_JUMBO_PKTS 0x11 +/* enum: Packets transmitted with length greater than 9216 bytes. */ +#define MC_CMD_STAT_ID_TX_GTJUMBO_PKTS 0x12 +/* enum: Packets transmitted with bad FCS. */ +#define MC_CMD_STAT_ID_TX_BAD_FCS_PKTS 0x13 +/* enum: Packets transmitted with good FCS. */ +#define MC_CMD_STAT_ID_TX_GOOD_FCS_PKTS 0x14 +/* enum: Packets received. */ +#define MC_CMD_STAT_ID_RX_PKTS 0x15 +/* enum: Pause frames received. */ +#define MC_CMD_STAT_ID_RX_PAUSE_PKTS 0x16 +/* enum: Total number of good packets received. */ +#define MC_CMD_STAT_ID_RX_GOOD_PKTS 0x17 +/* enum: Total number of BAD packets received. */ +#define MC_CMD_STAT_ID_RX_BAD_PKTS 0x18 +/* enum: Total number of control frames received. */ +#define MC_CMD_STAT_ID_RX_CONTROL_PKTS 0x19 +/* enum: Total number of unicast packets received. */ +#define MC_CMD_STAT_ID_RX_UNICAST_PKTS 0x1a +/* enum: Total number of multicast packets received. */ +#define MC_CMD_STAT_ID_RX_MULTICAST_PKTS 0x1b +/* enum: Total number of broadcast packets received. */ +#define MC_CMD_STAT_ID_RX_BROADCAST_PKTS 0x1c +/* enum: Total number of bytes received. */ +#define MC_CMD_STAT_ID_RX_BYTES 0x1d +/* enum: Total number of bytes received with bad CRC. */ +#define MC_CMD_STAT_ID_RX_BAD_BYTES 0x1e +/* enum: Total number of bytes received with GOOD CRC. */ +#define MC_CMD_STAT_ID_RX_GOOD_BYTES 0x1f +/* enum: Packets received with length equal to 64 bytes. */ +#define MC_CMD_STAT_ID_RX_64_PKTS 0x20 +/* enum: Packets received with length between 65 and 127 bytes. */ +#define MC_CMD_STAT_ID_RX_65_TO_127_PKTS 0x21 +/* enum: Packets received with length between 128 and 255 bytes. */ +#define MC_CMD_STAT_ID_RX_128_TO_255_PKTS 0x22 +/* enum: Packets received with length between 256 and 511 bytes. */ +#define MC_CMD_STAT_ID_RX_256_TO_511_PKTS 0x23 +/* enum: Packets received with length between 512 and 1023 bytes. */ +#define MC_CMD_STAT_ID_RX_512_TO_1023_PKTS 0x24 +/* enum: Packets received with length between 1024 and 1518 bytes. */ +#define MC_CMD_STAT_ID_RX_1024_TO_15XX_PKTS 0x25 +/* enum: Packets received with length between 1519 and 9216 bytes. */ +#define MC_CMD_STAT_ID_RX_15XX_TO_JUMBO_PKTS 0x26 +/* enum: Packets received with length greater than 9216 bytes. */ +#define MC_CMD_STAT_ID_RX_GTJUMBO_PKTS 0x27 +/* enum: Packets received with length less than 64 bytes. */ +#define MC_CMD_STAT_ID_RX_UNDERSIZE_PKTS 0x28 +/* enum: Packets received with bad FCS. */ +#define MC_CMD_STAT_ID_RX_BAD_FCS_PKTS 0x29 +/* enum: Packets received with GOOD FCS. */ +#define MC_CMD_STAT_ID_RX_GOOD_FCS_PKTS 0x2a +/* enum: Packets received with overflow. */ +#define MC_CMD_STAT_ID_RX_OVERFLOW_PKTS 0x2b +/* enum: Packets received with symbol error. */ +#define MC_CMD_STAT_ID_RX_SYMBOL_ERROR_PKTS 0x2c +/* enum: Packets received with alignment error. */ +#define MC_CMD_STAT_ID_RX_ALIGN_ERROR_PKTS 0x2d +/* enum: Packets received with length error. */ +#define MC_CMD_STAT_ID_RX_LENGTH_ERROR_PKTS 0x2e +/* enum: Packets received with internal error. */ +#define MC_CMD_STAT_ID_RX_INTERNAL_ERROR_PKTS 0x2f +/* enum: Packets received with jabber. These packets are larger than the + * allowed maximum receive unit (MRU). This indicates that a packet either has + * a bad CRC or has an RX error. + */ +#define MC_CMD_STAT_ID_RX_JABBER_PKTS 0x30 +/* enum: Packets dropped due to having no descriptor. This is a datapath stat + */ +#define MC_CMD_STAT_ID_RX_NODESC_DROPS 0x31 +/* enum: Packets received with lanes 0 and 1 character error. */ +#define MC_CMD_STAT_ID_RX_LANES01_CHAR_ERR 0x32 +/* enum: Packets received with lanes 2 and 3 character error. */ +#define MC_CMD_STAT_ID_RX_LANES23_CHAR_ERR 0x33 +/* enum: Packets received with lanes 0 and 1 disparity error. */ +#define MC_CMD_STAT_ID_RX_LANES01_DISP_ERR 0x34 +/* enum: Packets received with lanes 2 and 3 disparity error. */ +#define MC_CMD_STAT_ID_RX_LANES23_DISP_ERR 0x35 +/* enum: Packets received with match fault. */ +#define MC_CMD_STAT_ID_RX_MATCH_FAULT 0x36 +#define MC_CMD_STAT_ID_MAC_STAT_ID_LBN 16 +#define MC_CMD_STAT_ID_MAC_STAT_ID_WIDTH 16 +/* Include FEC stats. */ +#define MC_CMD_STAT_ID_PHY_STAT_ID_OFST 2 +#define MC_CMD_STAT_ID_PHY_STAT_ID_LEN 2 +/* enum property: index */ +/* enum: Number of uncorrected FEC codewords on link (RS-FEC only from Medford2 + * onwards) + */ +#define MC_CMD_STAT_ID_FEC_UNCORRECTED_ERRORS 0x1 +/* enum: Number of corrected FEC codewords on link (RS-FEC only from Medford2 + * onwards) + */ +#define MC_CMD_STAT_ID_FEC_CORRECTED_ERRORS 0x2 +/* enum: Number of corrected 10-bit symbol errors, lane 0 (RS-FEC only) */ +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE0 0x3 +/* enum: Number of corrected 10-bit symbol errors, lane 1 (RS-FEC only) */ +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE1 0x4 +/* enum: Number of corrected 10-bit symbol errors, lane 2 (RS-FEC only) */ +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE2 0x5 +/* enum: Number of corrected 10-bit symbol errors, lane 3 (RS-FEC only) */ +#define MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE3 0x6 +#define MC_CMD_STAT_ID_PHY_STAT_ID_LBN 16 +#define MC_CMD_STAT_ID_PHY_STAT_ID_WIDTH 16 + +/* MC_CMD_STAT_DESC structuredef: Structure describing the layout and size of + * the stats DMA buffer descriptor. + */ +#define MC_CMD_STAT_DESC_LEN 8 +/* Unique identifier of the statistic. Formatted as MC_CMD_STAT_ID */ +#define MC_CMD_STAT_DESC_STAT_ID_OFST 0 +#define MC_CMD_STAT_DESC_STAT_ID_LEN 4 +#define MC_CMD_STAT_DESC_STAT_ID_LBN 0 +#define MC_CMD_STAT_DESC_STAT_ID_WIDTH 32 +/* See structuredef: MC_CMD_STAT_ID */ +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_OFST 0 +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_LEN 2 +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_LBN 0 +#define MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_WIDTH 16 +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_OFST 2 +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_LEN 2 +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_LBN 16 +#define MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_WIDTH 16 +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_OFST 2 +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_LEN 2 +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_LBN 16 +#define MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_WIDTH 16 +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_OFST 2 +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_LEN 2 +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_LBN 16 +#define MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_WIDTH 16 +/* Index of the statistic in the DMA buffer. */ +#define MC_CMD_STAT_DESC_STAT_INDEX_OFST 4 +#define MC_CMD_STAT_DESC_STAT_INDEX_LEN 2 +#define MC_CMD_STAT_DESC_STAT_INDEX_LBN 32 +#define MC_CMD_STAT_DESC_STAT_INDEX_WIDTH 16 +/* Reserved for future extension (e.g. flags field) - currently always 0. */ +#define MC_CMD_STAT_DESC_RESERVED_OFST 6 +#define MC_CMD_STAT_DESC_RESERVED_LEN 2 +#define MC_CMD_STAT_DESC_RESERVED_LBN 48 +#define MC_CMD_STAT_DESC_RESERVED_WIDTH 16 + + +/***********************************/ +/* MC_CMD_MAC_STATISTICS_DESCRIPTOR + * Get a list of descriptors that describe the layout and size of the stats + * buffer required for retrieving statistics for a given port. Each entry in + * the list is formatted as MC_CMD_STAT_DESC and provides the ID of each stat + * and its location and size in the buffer. It also gives the overall minimum + * size of the DMA buffer required when DMA mode is used. Note that the first + * and last entries in the list are reserved for the generation start + * (MC_CMD_MARKER_STAT_GENERATION_START) and end + * (MC_CMD_MARKER_STAT_GENERATION_END) markers respectively, to be used for DMA + * synchronisation as described in the documentation for the relevant enum + * entries. The entries are present in the buffer even if DMA mode is not used. + * Provisions are made (but currently unused) for extending the size of the + * descriptors, extending the size of the list beyond the maximum MCDI response + * size, as well as the dynamic runtime updates of the list. Returns: 0 on + * success, ENOENT on non-existent port handle + */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR 0x1e3 +#undef MC_CMD_0x1e3_PRIVILEGE_CTG + +#define MC_CMD_0x1e3_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN msgrequest */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_LEN 8 +/* Handle of port to get MAC statitstics descriptors for. */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_PORT_HANDLE_LEN 4 +/* Offset of the first entry to return, for cases where not all entries fit in + * the MCDI response. Should be set to 0 on initial request, and on subsequent + * requests updated by the number of entries already returned, as long as the + * MORE_ENTRIES flag is set. + */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_OFFSET_OFST 4 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_OFFSET_LEN 4 + +/* MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT msgresponse */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMIN 28 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMAX 252 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMAX_MCDI2 1020 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LEN(num) (20+8*(num)) +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_NUM(len) (((len)-20)/8) +/* Generation number of the stats buffer. This is incremented each time the + * buffer is updated, and is used to verify the consistency of the buffer + * contents. Reserved for future extension (dynamic list updates). Currently + * always set to 0. + */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_GENERATION_OFST 0 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_GENERATION_LEN 4 +/* Minimum size of the DMA buffer required to retrieve all statistics for the + * port. This is the sum of the sizes of all the statistics, plus the size of + * the generation markers. Minimum buffer size in bytes required to fit all + * statistics. Drivers will typically round up this value to the granularity of + * the host DMA allocation units. + */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_DMA_BUFFER_SIZE_OFST 4 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_DMA_BUFFER_SIZE_LEN 4 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_FLAGS_OFST 8 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_FLAGS_LEN 4 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_OFST 8 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_LBN 0 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_WIDTH 1 +/* Size of the individual descriptor entry in the list. Determines the entry + * stride in the list. Currently always set to size of MC_CMD_STAT_DESC, larger + * values can be used in the future for extending the descriptor, by appending + * new data to the end of the existing structure. + */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_SIZE_OFST 12 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_SIZE_LEN 4 +/* Number of entries returned in the descriptor list. */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_COUNT_OFST 16 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_COUNT_LEN 4 +/* List of descriptors. Each entry is formatted as MC_CMD_STAT_DESC and + * provides the ID of each stat and its location and size in the buffer. The + * first and last entries are reserved for the generation start and end markers + * respectively. + */ +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_OFST 20 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LEN 8 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_OFST 20 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_LEN 4 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_LBN 160 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_WIDTH 32 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_OFST 24 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_LEN 4 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_LBN 192 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_WIDTH 32 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MINNUM 1 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MAXNUM 29 +#define MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MAXNUM_MCDI2 125 + + +/***********************************/ +/* MC_CMD_MAC_STATISTICS + * Get generic MAC statistics. This call retrieves unified statistics managed + * by the MC. The MC will populate and provide all supported statistics in the + * format as returned by MC_CMD_MAC_STATISTICS_DESCRIPTOR. Refer to the + * aforementioned command for the format and contents of the stats DMA buffer. + * To ensure consistent and accurate results, it is essential for the driver to + * initialize the DMA buffer with zeros when DMA mode is used. Returns: 0 on + * success, ETIME if the DMA buffer is not ready, ENOENT on non-existent port + * handle, and EINVAL on invalid parameters (DMA buffer too small) + */ +#define MC_CMD_MAC_STATISTICS 0x1e4 +#undef MC_CMD_0x1e4_PRIVILEGE_CTG + +#define MC_CMD_0x1e4_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_MAC_STATISTICS_IN msgrequest */ +#define MC_CMD_MAC_STATISTICS_IN_LEN 20 +/* Handle of port to get MAC statistics for. */ +#define MC_CMD_MAC_STATISTICS_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_MAC_STATISTICS_IN_PORT_HANDLE_LEN 4 +/* Contains options for querying the MAC statistics. */ +#define MC_CMD_MAC_STATISTICS_IN_CMD_OFST 4 +#define MC_CMD_MAC_STATISTICS_IN_CMD_LEN 4 +#define MC_CMD_MAC_STATISTICS_IN_DMA_OFST 4 +#define MC_CMD_MAC_STATISTICS_IN_DMA_LBN 0 +#define MC_CMD_MAC_STATISTICS_IN_DMA_WIDTH 1 +#define MC_CMD_MAC_STATISTICS_IN_CLEAR_OFST 4 +#define MC_CMD_MAC_STATISTICS_IN_CLEAR_LBN 1 +#define MC_CMD_MAC_STATISTICS_IN_CLEAR_WIDTH 1 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_OFST 4 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_LBN 2 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_WIDTH 1 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_OFST 4 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_LBN 3 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_WIDTH 1 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_OFST 4 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_LBN 4 +#define MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_WIDTH 1 +#define MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_OFST 4 +#define MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_LBN 16 +#define MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_WIDTH 16 +/* This is the address of the DMA buffer to use for transfer of the statistics. + * Only valid if the DMA flag is set to 1. + */ +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_OFST 8 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LEN 8 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_OFST 8 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_LEN 4 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_LBN 64 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_WIDTH 32 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_OFST 12 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_LEN 4 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_LBN 96 +#define MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_WIDTH 32 +/* This is the length of the DMA buffer to use for the transfer of the + * statistics. The buffer should be at least DMA_BUFFER_SIZE long, as returned + * by MC_CMD_MAC_STATISTICS_DESCRIPTOR. If the supplied buffer is too small, + * the command will fail with EINVAL. Only valid if the DMA flag is set to 1. + */ +#define MC_CMD_MAC_STATISTICS_IN_DMA_LEN_OFST 16 +#define MC_CMD_MAC_STATISTICS_IN_DMA_LEN_LEN 4 + +/* MC_CMD_MAC_STATISTICS_OUT msgresponse */ +#define MC_CMD_MAC_STATISTICS_OUT_LENMIN 5 +#define MC_CMD_MAC_STATISTICS_OUT_LENMAX 252 +#define MC_CMD_MAC_STATISTICS_OUT_LENMAX_MCDI2 1020 +#define MC_CMD_MAC_STATISTICS_OUT_LEN(num) (4+1*(num)) +#define MC_CMD_MAC_STATISTICS_OUT_DATA_NUM(len) (((len)-4)/1) +/* length of the data in bytes */ +#define MC_CMD_MAC_STATISTICS_OUT_DATALEN_OFST 0 +#define MC_CMD_MAC_STATISTICS_OUT_DATALEN_LEN 4 +#define MC_CMD_MAC_STATISTICS_OUT_DATA_OFST 4 +#define MC_CMD_MAC_STATISTICS_OUT_DATA_LEN 1 +#define MC_CMD_MAC_STATISTICS_OUT_DATA_MINNUM 1 +#define MC_CMD_MAC_STATISTICS_OUT_DATA_MAXNUM 248 +#define MC_CMD_MAC_STATISTICS_OUT_DATA_MAXNUM_MCDI2 1016 + +/* NET_PORT_HANDLE_DESC structuredef: Network port descriptor containing a port + * handle and attributes used, for example, in MC_CMD_ENUM_PORTS. + */ +#define NET_PORT_HANDLE_DESC_LEN 53 +/* The handle to identify the port */ +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_OFST 0 +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_LEN 4 +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_LBN 0 +#define NET_PORT_HANDLE_DESC_PORT_HANDLE_WIDTH 32 +/* Includes the type of port e.g. physical, virtual or MAE MPORT and other + * properties relevant to the port. + */ +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_OFST 4 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LEN 8 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_OFST 4 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_LEN 4 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_LBN 32 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_WIDTH 32 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_OFST 8 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_LEN 4 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_LBN 64 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_WIDTH 32 +#define NET_PORT_HANDLE_DESC_PORT_TYPE_OFST 4 +#define NET_PORT_HANDLE_DESC_PORT_TYPE_LBN 0 +#define NET_PORT_HANDLE_DESC_PORT_TYPE_WIDTH 3 +#define NET_PORT_HANDLE_DESC_PHYSICAL 0x0 /* enum */ +#define NET_PORT_HANDLE_DESC_VIRTUAL 0x1 /* enum */ +#define NET_PORT_HANDLE_DESC_MPORT 0x2 /* enum */ +#define NET_PORT_HANDLE_DESC_IS_ZOMBIE_OFST 4 +#define NET_PORT_HANDLE_DESC_IS_ZOMBIE_LBN 8 +#define NET_PORT_HANDLE_DESC_IS_ZOMBIE_WIDTH 1 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LBN 32 +#define NET_PORT_HANDLE_DESC_PORT_PROPERTIES_WIDTH 64 +/* The dynamic change that led to the port enumeration */ +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_OFST 12 +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_LEN 1 +/* enum: Indicates that the ENTRY_SRC field has not been initialized. */ +#define NET_PORT_HANDLE_DESC_UNKNOWN 0x0 +/* enum: The port was enumerated at start of day. */ +#define NET_PORT_HANDLE_DESC_PRESENT 0x1 +/* enum: The port was dynamically added. */ +#define NET_PORT_HANDLE_DESC_ADDED 0x2 +/* enum: The port was dynamically deleted. */ +#define NET_PORT_HANDLE_DESC_DELETED 0x3 +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_LBN 96 +#define NET_PORT_HANDLE_DESC_ENTRY_SRC_WIDTH 8 +/* This is an opaque 40 byte label exposed to users as a unique identifier of + * the port. It is represented as a zero-terminated ASCII string and assigned + * by the port administrator which is typically either the firmware for a + * physical port or the host software responsible for creating the virtual + * port. The label is conveyed to the driver after assignment, which, unlike + * the port administrator, does not need to know how to interpret the label. + */ +#define NET_PORT_HANDLE_DESC_PORT_LABEL_OFST 13 +#define NET_PORT_HANDLE_DESC_PORT_LABEL_LEN 40 +#define NET_PORT_HANDLE_DESC_PORT_LABEL_LBN 104 +#define NET_PORT_HANDLE_DESC_PORT_LABEL_WIDTH 320 + + +/***********************************/ +/* MC_CMD_ENUM_PORTS + * This command returns handles for all ports present in the system. The PCIe + * function type of each port (either physical or virtual) is also reported. + * After a start-of-day port enumeration, firmware keeps track of all available + * ports upon creation or deletion and updates the ports if there is a change. + * This command is cleared after a control interface reset (e.g. FLR, + * ENTITY_RESET), in which case it must be called again to reenumerate the + * ports. The command is also clear-on-read and repeated calls will drain the + * buffer. + */ +#define MC_CMD_ENUM_PORTS 0x1e5 +#undef MC_CMD_0x1e5_PRIVILEGE_CTG + +#define MC_CMD_0x1e5_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_ENUM_PORTS_IN msgrequest */ +#define MC_CMD_ENUM_PORTS_IN_LEN 0 + +/* MC_CMD_ENUM_PORTS_OUT msgresponse */ +#define MC_CMD_ENUM_PORTS_OUT_LENMIN 12 +#define MC_CMD_ENUM_PORTS_OUT_LENMAX 252 +#define MC_CMD_ENUM_PORTS_OUT_LENMAX_MCDI2 1020 +#define MC_CMD_ENUM_PORTS_OUT_LEN(num) (12+1*(num)) +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_NUM(len) (((len)-12)/1) +/* Any unused flags are reserved and must be ignored. */ +#define MC_CMD_ENUM_PORTS_OUT_FLAGS_OFST 0 +#define MC_CMD_ENUM_PORTS_OUT_FLAGS_LEN 4 +#define MC_CMD_ENUM_PORTS_OUT_MORE_OFST 0 +#define MC_CMD_ENUM_PORTS_OUT_MORE_LBN 0 +#define MC_CMD_ENUM_PORTS_OUT_MORE_WIDTH 1 +/* The number of NET_PORT_HANDLE_DESC structures in PORT_HANDLES. */ +#define MC_CMD_ENUM_PORTS_OUT_PORT_COUNT_OFST 4 +#define MC_CMD_ENUM_PORTS_OUT_PORT_COUNT_LEN 4 +#define MC_CMD_ENUM_PORTS_OUT_SIZEOF_NET_PORT_HANDLE_DESC_OFST 8 +#define MC_CMD_ENUM_PORTS_OUT_SIZEOF_NET_PORT_HANDLE_DESC_LEN 4 +/* Array of NET_PORT_HANDLE_DESC structures. Callers must use must use the + * SIZEOF_NET_PORT_HANDLE_DESC field field as the array stride between entries. + * This may also allow for tail padding for alignment. Fields beyond + * SIZEOF_NET_PORT_HANDLE_DESC are not present. + */ +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_OFST 12 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_LEN 1 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MINNUM 0 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MAXNUM 240 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MAXNUM_MCDI2 1008 +/* See structuredef: NET_PORT_HANDLE_DESC */ +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_HANDLE_OFST 12 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_HANDLE_LEN 4 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_OFST 16 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LEN 8 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_OFST 16 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_LEN 4 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_LBN 128 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_WIDTH 32 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_OFST 20 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_LEN 4 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_LBN 160 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_WIDTH 32 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_TYPE_LBN 128 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_TYPE_WIDTH 3 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_IS_ZOMBIE_LBN 136 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_IS_ZOMBIE_WIDTH 1 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_ENTRY_SRC_OFST 24 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_ENTRY_SRC_LEN 1 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_LABEL_OFST 25 +#define MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_LABEL_LEN 40 + + +/***********************************/ +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES + * Read properties of the transceiver associated with the port. Can be either + * for a fixed onboard transceiver or an inserted module. The returned data is + * interpreted from the transceiver hardware and may be fixed up by the + * firmware. Use MC_CMD_GET_MODULE_DATA to get raw undecoded data. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES 0x1e6 +#undef MC_CMD_0x1e6_PRIVILEGE_CTG + +#define MC_CMD_0x1e6_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN msgrequest */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_LEN 4 +/* Handle to port to get transceiver properties from. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_PORT_HANDLE_LEN 4 + +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT msgresponse */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LEN 89 +/* Supported technology abilities. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_TECH_ABILITIES_MASK_OFST 0 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_TECH_ABILITIES_MASK_LEN 16 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_ETH_TECH/TECH */ +/* Reserved for future expansion to accommodate future Ethernet technology + * expansion. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_RESERVED_OFST 16 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_RESERVED_LEN 16 +/* Preferred FEC modes. This is a function of the cable type and length. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PREFERRED_FEC_MASK_OFST 32 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PREFERRED_FEC_MASK_LEN 4 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* FEC_TYPE/TYPE */ +/* SFF-8042 code reported by the module. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CODE_OFST 36 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CODE_LEN 2 +/* Medium. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIUM_OFST 38 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIUM_LEN 1 +/* enum property: value */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_UNKNOWN 0x0 /* enum */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_COPPER 0x1 /* enum */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_OPTICAL 0x2 /* enum */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BACKPLANE 0x3 /* enum */ +/* Identifies the tech */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIA_SUBTYPE_OFST 39 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIA_SUBTYPE_LEN 1 +/* enum property: value */ +/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_UNKNOWN 0x0 */ +/* enum: Ethernet over twisted-pair copper cables for distances up to 100 + * meters. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BASET 0x1 +/* enum: Ethernet over twin-axial, balanced copper cable. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CR 0x2 +/* enum: Ethernet over backplane for connections on the same board. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KX 0x3 +/* enum: Ethernet over a single backplane lane for connections between + * different boards. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KR 0x4 +/* enum: Ethernet over copper backplane. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KP 0x5 +/* enum: Ethernet over fiber optic. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BASEX 0x6 +/* enum: Short range ethernet over multimode fiber optic (See IEEE 802.3 Clause + * 49 and 52). + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SR 0x7 +/* enum: Long range, extended range or far reach ethernet used with single mode + * fiber optics. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LR_ER_FR 0x8 +/* enum: Long reach multimode ethernet over multimode optical fiber. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LRM 0x9 +/* enum: Very short reach PAM4 ethernet over multimode optical fiber (see IEEE + * 802.3db). + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VR 0xa +/* enum: BASE-R encoding and PAM4 over single-mode fiber with reach up to at + * least 500 meters (803.2 Clause 121 and 124) + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_DR 0xb +/* String of the vendor name as intepreted by NMC firmware. NMC firmware + * applies workarounds for known buggy transceivers. The vendor name is + * presented as 16 bytes of ASCII characters padded with spaces. It can also be + * represented as 16 bytes of zeros if the field is unspecified for the + * connected module. See SFF-8472/CMIS specifications for details. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_OFST 40 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_LEN 1 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_NUM 16 +/* The vendor part number as intepreted by NMC firmware. The field is presented + * as 16 bytes of ASCII chars padded with spaces. It can also be 16 bytes of + * zeros if the field is unspecified for the connected module. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_OFST 56 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_LEN 1 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_NUM 16 +/* Serial number of the module presented as 16 bytes of ASCII characters padded + * with spaces. It can also be 16 bytes of zeros if the field is unspecified + * for the connected module. See SFF-8472/CMIS specifications for details. + */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_OFST 72 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_LEN 1 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_NUM 16 +/* This reports the number of module changes detected by the NMC firmware. */ +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PORT_MODULECHANGE_SEQ_NUM_OFST 88 +#define MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PORT_MODULECHANGE_SEQ_NUM_LEN 1 + + +/***********************************/ +/* MC_CMD_GET_FIXED_PORT_PROPERTIES + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES 0x1e7 +#undef MC_CMD_0x1e7_PRIVILEGE_CTG + +#define MC_CMD_0x1e7_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_GET_FIXED_PORT_PROPERTIES_IN msgrequest: In this context, the port + * consists of the MAC and the PHY, and excludes any modules inserted into the + * cage. This information is fixed for a given board but not for a given ASIC. + * This command reports properties for the port as it is currently configured, + * and not its hardware capabilities, which can be better than the current + * configuration. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_LEN 4 +/* Handle to the port to from which to retreive properties */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_PORT_HANDLE_LEN 4 + +/* MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT msgresponse */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LEN 36 +/* Supported capabilities of the port in its current configuration. */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_OFST 0 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_LEN 25 +/* See structuredef: MC_CMD_ETH_AN_FIELDS */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_TECH_MASK_OFST 0 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_TECH_MASK_LEN 16 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_MASK_OFST 16 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_MASK_LEN 4 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_REQ_OFST 20 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_REQ_LEN 4 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_PAUSE_MASK_OFST 24 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_PAUSE_MASK_LEN 1 +/* Number of lanes supported by the port in its current configuration. */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_NUM_LANES_OFST 25 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_NUM_LANES_LEN 1 +/* Bitmask of supported loopback modes. Where the response to this command + * includes the LOOPBACK_MODES_MASK_V2 field, that field should be used in + * preference to ensure that all available loopback modes are seen. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LOOPBACK_MODES_MASK_OFST 26 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LOOPBACK_MODES_MASK_LEN 1 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_LOOPBACK_V2/MODE */ +/* This field serves as a cage index that uniquely identifies the cage to which + * the module is connected. This is useful when splitter cables that have + * multiple ports on a single cage are used. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_INDEX_OFST 27 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_INDEX_LEN 1 +/* This bitmask is used to specify the lanes within the cage identified by + * MDI_INDEX that are allocated to the port. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_LANE_MASK_OFST 28 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_LANE_MASK_LEN 1 +/* Maximum frame length supported by the port in its current configuration. */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MAX_FRAME_LEN_OFST 32 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MAX_FRAME_LEN_LEN 4 + +/* MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2 msgresponse */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LEN 48 +/* Supported capabilities of the port in its current configuration. */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_ABILITIES_OFST 0 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_ABILITIES_LEN 25 +/* Number of lanes supported by the port in its current configuration. */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_NUM_LANES_OFST 25 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_NUM_LANES_LEN 1 +/* Bitmask of supported loopback modes. Where the response to this command + * includes the LOOPBACK_MODES_MASK_V2 field, that field should be used in + * preference to ensure that all available loopback modes are seen. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_OFST 26 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_LEN 1 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_LOOPBACK_V2/MODE */ +/* This field serves as a cage index that uniquely identifies the cage to which + * the module is connected. This is useful when splitter cables that have + * multiple ports on a single cage are used. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_INDEX_OFST 27 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_INDEX_LEN 1 +/* This bitmask is used to specify the lanes within the cage identified by + * MDI_INDEX that are allocated to the port. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_LANE_MASK_OFST 28 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_LANE_MASK_LEN 1 +/* Maximum frame length supported by the port in its current configuration. */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MAX_FRAME_LEN_OFST 32 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MAX_FRAME_LEN_LEN 4 +/* Bitmask of supported loopback modes. This field replaces the + * LOOPBACK_MODES_MASK field which is defined under version 1 of this command. + */ +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_OFST 40 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LEN 8 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_OFST 40 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_LEN 4 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_LBN 320 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_WIDTH 32 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_OFST 44 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_LEN 4 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_LBN 352 +#define MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* MC_CMD_LOOPBACK_V2/MODE */ + + +/***********************************/ +/* MC_CMD_GET_MODULE_DATA + * Read media-specific data from the PHY (e.g. SFP/SFP+ module ID information + * for SFP+ PHYs). This command returns raw data from the module's EEPROM and + * it is not interpreted by the MC. Use MC_CMD_GET_TRANSCEIVER_PROPERTIES to + * get interpreted data. Return code: 0, ENOENT + */ +#define MC_CMD_GET_MODULE_DATA 0x1e8 +#undef MC_CMD_0x1e8_PRIVILEGE_CTG + +#define MC_CMD_0x1e8_PRIVILEGE_CTG SRIOV_CTG_LINK + +/* MC_CMD_GET_MODULE_DATA_IN msgrequest */ +#define MC_CMD_GET_MODULE_DATA_IN_LEN 16 +/* Handle to identify the port from which to request module properties. */ +#define MC_CMD_GET_MODULE_DATA_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_GET_MODULE_DATA_IN_PORT_HANDLE_LEN 4 +/* 7 bit I2C address of the device. DEPRECATED: This field is replaced by + * MODULE_ADDR in V2. Use V2 of this command for proper alignment and easier + * access. + */ +#define MC_CMD_GET_MODULE_DATA_IN_DEVADDR_LBN 32 +#define MC_CMD_GET_MODULE_DATA_IN_DEVADDR_WIDTH 7 +/* 0 if the page does not support banked access, non-zero otherwise. Non-zero + * BANK is valid if OFFSET is in the range 80h - ffh, i.e. in the Upper Memory + * region. + */ +#define MC_CMD_GET_MODULE_DATA_IN_BANK_OFST 6 +#define MC_CMD_GET_MODULE_DATA_IN_BANK_LEN 2 +/* 0 if paged access is not supported, non-zero otherwise. Non-zero PAGE is + * valid if OFFSET is in the range 80h - ffh. + */ +#define MC_CMD_GET_MODULE_DATA_IN_PAGE_OFST 8 +#define MC_CMD_GET_MODULE_DATA_IN_PAGE_LEN 2 +/* Offset in the range 00h - 7fh to access lower memory. Offset in the range + * 80h - ffh to access upper memory + */ +#define MC_CMD_GET_MODULE_DATA_IN_OFFSET_OFST 10 +#define MC_CMD_GET_MODULE_DATA_IN_OFFSET_LEN 1 +#define MC_CMD_GET_MODULE_DATA_IN_LENGTH_OFST 12 +#define MC_CMD_GET_MODULE_DATA_IN_LENGTH_LEN 4 + +/* MC_CMD_GET_MODULE_DATA_IN_V2 msgrequest: Updated MC_CMD_GET_MODULE_DATA with + * 8-bit wide ADDRESSING field. This new field provides a correctly aligned + * container for the 7-bit DEVADDR field from V1, now renamed MODULE_ADDR, to + * ensure proper alignment. + */ +#define MC_CMD_GET_MODULE_DATA_IN_V2_LEN 16 +/* Handle to identify the port from which to request module properties. */ +#define MC_CMD_GET_MODULE_DATA_IN_V2_PORT_HANDLE_OFST 0 +#define MC_CMD_GET_MODULE_DATA_IN_V2_PORT_HANDLE_LEN 4 +/* 7 bit I2C address of the device. DEPRECATED: This field is replaced by + * MODULE_ADDR in V2. Use V2 of this command for proper alignment and easier + * access. + */ +#define MC_CMD_GET_MODULE_DATA_IN_V2_DEVADDR_LBN 32 +#define MC_CMD_GET_MODULE_DATA_IN_V2_DEVADDR_WIDTH 7 +/* 0 if the page does not support banked access, non-zero otherwise. Non-zero + * BANK is valid if OFFSET is in the range 80h - ffh, i.e. in the Upper Memory + * region. + */ +#define MC_CMD_GET_MODULE_DATA_IN_V2_BANK_OFST 6 +#define MC_CMD_GET_MODULE_DATA_IN_V2_BANK_LEN 2 +/* 0 if paged access is not supported, non-zero otherwise. Non-zero PAGE is + * valid if OFFSET is in the range 80h - ffh. + */ +#define MC_CMD_GET_MODULE_DATA_IN_V2_PAGE_OFST 8 +#define MC_CMD_GET_MODULE_DATA_IN_V2_PAGE_LEN 2 +/* Offset in the range 00h - 7fh to access lower memory. Offset in the range + * 80h - ffh to access upper memory + */ +#define MC_CMD_GET_MODULE_DATA_IN_V2_OFFSET_OFST 10 +#define MC_CMD_GET_MODULE_DATA_IN_V2_OFFSET_LEN 1 +#define MC_CMD_GET_MODULE_DATA_IN_V2_LENGTH_OFST 12 +#define MC_CMD_GET_MODULE_DATA_IN_V2_LENGTH_LEN 4 +/* Container for 7 bit I2C addresses. */ +#define MC_CMD_GET_MODULE_DATA_IN_V2_ADDRESSING_OFST 4 +#define MC_CMD_GET_MODULE_DATA_IN_V2_ADDRESSING_LEN 1 +#define MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_OFST 4 +#define MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_LBN 0 +#define MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_WIDTH 7 + +/* MC_CMD_GET_MODULE_DATA_OUT msgresponse */ +#define MC_CMD_GET_MODULE_DATA_OUT_LENMIN 5 +#define MC_CMD_GET_MODULE_DATA_OUT_LENMAX 252 +#define MC_CMD_GET_MODULE_DATA_OUT_LENMAX_MCDI2 1020 +#define MC_CMD_GET_MODULE_DATA_OUT_LEN(num) (4+1*(num)) +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_NUM(len) (((len)-4)/1) +/* length of the data in bytes */ +#define MC_CMD_GET_MODULE_DATA_OUT_DATALEN_OFST 0 +#define MC_CMD_GET_MODULE_DATA_OUT_DATALEN_LEN 4 +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_OFST 4 +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_LEN 1 +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_MINNUM 1 +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_MAXNUM 248 +#define MC_CMD_GET_MODULE_DATA_OUT_DATA_MAXNUM_MCDI2 1016 + + +/***********************************/ +/* MC_CMD_GET_NETPORT_STATISTICS + * Get generic MAC statistics. This call retrieves unified statistics managed + * by the MC. The MC will populate and provide all supported statistics in the + * format as returned by MC_CMD_MAC_STATISTICS_DESCRIPTOR. Refer to the + * aforementioned command for the format and contents of the stats DMA buffer. + * To ensure consistent and accurate results, it is essential for the driver to + * initialize the DMA buffer with zeros when DMA mode is used. Returns: 0 on + * success, ETIME if the DMA buffer is not ready, ENOENT on non-existent port + * handle, and EINVAL on invalid parameters (DMA buffer too small) + */ +#define MC_CMD_GET_NETPORT_STATISTICS 0x1fa +#undef MC_CMD_0x1fa_PRIVILEGE_CTG + +#define MC_CMD_0x1fa_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_NETPORT_STATISTICS_IN msgrequest */ +#define MC_CMD_GET_NETPORT_STATISTICS_IN_LEN 20 +/* Handle of port to get MAC statistics for. */ +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PORT_HANDLE_OFST 0 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PORT_HANDLE_LEN 4 +/* Contains options for querying the MAC statistics. */ +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CMD_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CMD_LEN 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LBN 0 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_WIDTH 1 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_LBN 1 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_WIDTH 1 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_LBN 2 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_WIDTH 1 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_LBN 3 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_WIDTH 1 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_LBN 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_WIDTH 1 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_LBN 15 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_WIDTH 17 +/* Specifies the physical address of the DMA buffer to use for statistics + * transfer. This field must contain a valid address under either of these + * conditions: 1. DMA flag is set (immediate DMA requested) 2. Both + * PERIODIC_CHANGE and PERIODIC_ENABLE are set (periodic DMA configured) + */ +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_OFST 8 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LEN 8 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_OFST 8 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_LEN 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_LBN 64 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_WIDTH 32 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_OFST 12 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_LEN 4 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_LBN 96 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_WIDTH 32 +/* Specifies the length of the DMA buffer in bytes for statistics transfer. The + * buffer size must be at least DMA_BUFFER_SIZE bytes (as returned by + * MC_CMD_MAC_STATISTICS_DESCRIPTOR). Providing an insufficient buffer size + * will result in an EINVAL error. This field must contain a valid length under + * either of these conditions: 1. DMA flag is set (immediate DMA requested) 2. + * Both PERIODIC_CHANGE and PERIODIC_ENABLE are set (periodic DMA configured) + */ +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LEN_OFST 16 +#define MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LEN_LEN 4 + +/* MC_CMD_GET_NETPORT_STATISTICS_OUT msgresponse */ +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMIN 0 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMAX 248 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMAX_MCDI2 1016 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_LEN(num) (0+8*(num)) +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_NUM(len) (((len)-0)/8) +/* Statistics buffer. Zero-length if DMA mode is used. The statistics buffer is + * an array of 8-byte counter values, containing the generation start marker, + * stats counters, and generation end marker. The index of each counter in the + * array is reported by the MAC_STATISTICS_DESCRIPTOR command. The same layout + * is used for the DMA buffer for DMA mode stats. + */ +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_OFST 0 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LEN 8 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_OFST 0 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_LEN 4 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_LBN 0 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_WIDTH 32 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_OFST 4 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_LEN 4 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_LBN 32 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_WIDTH 32 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MINNUM 0 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MAXNUM 31 +#define MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MAXNUM_MCDI2 127 /* EVB_PORT_ID structuredef */ #define EVB_PORT_ID_LEN 4 @@ -9706,44 +10448,6 @@ #define EVB_PORT_ID_PORT_ID_LBN 0 #define EVB_PORT_ID_PORT_ID_WIDTH 32 -/* EVB_VLAN_TAG structuredef */ -#define EVB_VLAN_TAG_LEN 2 -/* The VLAN tag value */ -#define EVB_VLAN_TAG_VLAN_ID_LBN 0 -#define EVB_VLAN_TAG_VLAN_ID_WIDTH 12 -#define EVB_VLAN_TAG_MODE_LBN 12 -#define EVB_VLAN_TAG_MODE_WIDTH 4 -/* enum: Insert the VLAN. */ -#define EVB_VLAN_TAG_INSERT 0x0 -/* enum: Replace the VLAN if already present. */ -#define EVB_VLAN_TAG_REPLACE 0x1 - -/* BUFTBL_ENTRY structuredef */ -#define BUFTBL_ENTRY_LEN 12 -/* the owner ID */ -#define BUFTBL_ENTRY_OID_OFST 0 -#define BUFTBL_ENTRY_OID_LEN 2 -#define BUFTBL_ENTRY_OID_LBN 0 -#define BUFTBL_ENTRY_OID_WIDTH 16 -/* the page parameter as one of ESE_DZ_SMC_PAGE_SIZE_ */ -#define BUFTBL_ENTRY_PGSZ_OFST 2 -#define BUFTBL_ENTRY_PGSZ_LEN 2 -#define BUFTBL_ENTRY_PGSZ_LBN 16 -#define BUFTBL_ENTRY_PGSZ_WIDTH 16 -/* the raw 64-bit address field from the SMC, not adjusted for page size */ -#define BUFTBL_ENTRY_RAWADDR_OFST 4 -#define BUFTBL_ENTRY_RAWADDR_LEN 8 -#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4 -#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4 -#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32 -#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32 -#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8 -#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4 -#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64 -#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32 -#define BUFTBL_ENTRY_RAWADDR_LBN 32 -#define BUFTBL_ENTRY_RAWADDR_WIDTH 64 - /* NVRAM_PARTITION_TYPE structuredef */ #define NVRAM_PARTITION_TYPE_LEN 2 #define NVRAM_PARTITION_TYPE_ID_OFST 0 @@ -9981,116 +10685,6 @@ #define LICENSED_APP_ID_ID_LBN 0 #define LICENSED_APP_ID_ID_WIDTH 32 -/* LICENSED_FEATURES structuredef */ -#define LICENSED_FEATURES_LEN 8 -/* Bitmask of licensed firmware features */ -#define LICENSED_FEATURES_MASK_OFST 0 -#define LICENSED_FEATURES_MASK_LEN 8 -#define LICENSED_FEATURES_MASK_LO_OFST 0 -#define LICENSED_FEATURES_MASK_LO_LEN 4 -#define LICENSED_FEATURES_MASK_LO_LBN 0 -#define LICENSED_FEATURES_MASK_LO_WIDTH 32 -#define LICENSED_FEATURES_MASK_HI_OFST 4 -#define LICENSED_FEATURES_MASK_HI_LEN 4 -#define LICENSED_FEATURES_MASK_HI_LBN 32 -#define LICENSED_FEATURES_MASK_HI_WIDTH 32 -#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0 -#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0 -#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1 -#define LICENSED_FEATURES_PIO_OFST 0 -#define LICENSED_FEATURES_PIO_LBN 1 -#define LICENSED_FEATURES_PIO_WIDTH 1 -#define LICENSED_FEATURES_EVQ_TIMER_OFST 0 -#define LICENSED_FEATURES_EVQ_TIMER_LBN 2 -#define LICENSED_FEATURES_EVQ_TIMER_WIDTH 1 -#define LICENSED_FEATURES_CLOCK_OFST 0 -#define LICENSED_FEATURES_CLOCK_LBN 3 -#define LICENSED_FEATURES_CLOCK_WIDTH 1 -#define LICENSED_FEATURES_RX_TIMESTAMPS_OFST 0 -#define LICENSED_FEATURES_RX_TIMESTAMPS_LBN 4 -#define LICENSED_FEATURES_RX_TIMESTAMPS_WIDTH 1 -#define LICENSED_FEATURES_TX_TIMESTAMPS_OFST 0 -#define LICENSED_FEATURES_TX_TIMESTAMPS_LBN 5 -#define LICENSED_FEATURES_TX_TIMESTAMPS_WIDTH 1 -#define LICENSED_FEATURES_RX_SNIFF_OFST 0 -#define LICENSED_FEATURES_RX_SNIFF_LBN 6 -#define LICENSED_FEATURES_RX_SNIFF_WIDTH 1 -#define LICENSED_FEATURES_TX_SNIFF_OFST 0 -#define LICENSED_FEATURES_TX_SNIFF_LBN 7 -#define LICENSED_FEATURES_TX_SNIFF_WIDTH 1 -#define LICENSED_FEATURES_PROXY_FILTER_OPS_OFST 0 -#define LICENSED_FEATURES_PROXY_FILTER_OPS_LBN 8 -#define LICENSED_FEATURES_PROXY_FILTER_OPS_WIDTH 1 -#define LICENSED_FEATURES_EVENT_CUT_THROUGH_OFST 0 -#define LICENSED_FEATURES_EVENT_CUT_THROUGH_LBN 9 -#define LICENSED_FEATURES_EVENT_CUT_THROUGH_WIDTH 1 -#define LICENSED_FEATURES_MASK_LBN 0 -#define LICENSED_FEATURES_MASK_WIDTH 64 - -/* LICENSED_V3_APPS structuredef */ -#define LICENSED_V3_APPS_LEN 8 -/* Bitmask of licensed applications */ -#define LICENSED_V3_APPS_MASK_OFST 0 -#define LICENSED_V3_APPS_MASK_LEN 8 -#define LICENSED_V3_APPS_MASK_LO_OFST 0 -#define LICENSED_V3_APPS_MASK_LO_LEN 4 -#define LICENSED_V3_APPS_MASK_LO_LBN 0 -#define LICENSED_V3_APPS_MASK_LO_WIDTH 32 -#define LICENSED_V3_APPS_MASK_HI_OFST 4 -#define LICENSED_V3_APPS_MASK_HI_LEN 4 -#define LICENSED_V3_APPS_MASK_HI_LBN 32 -#define LICENSED_V3_APPS_MASK_HI_WIDTH 32 -#define LICENSED_V3_APPS_ONLOAD_OFST 0 -#define LICENSED_V3_APPS_ONLOAD_LBN 0 -#define LICENSED_V3_APPS_ONLOAD_WIDTH 1 -#define LICENSED_V3_APPS_PTP_OFST 0 -#define LICENSED_V3_APPS_PTP_LBN 1 -#define LICENSED_V3_APPS_PTP_WIDTH 1 -#define LICENSED_V3_APPS_SOLARCAPTURE_PRO_OFST 0 -#define LICENSED_V3_APPS_SOLARCAPTURE_PRO_LBN 2 -#define LICENSED_V3_APPS_SOLARCAPTURE_PRO_WIDTH 1 -#define LICENSED_V3_APPS_SOLARSECURE_OFST 0 -#define LICENSED_V3_APPS_SOLARSECURE_LBN 3 -#define LICENSED_V3_APPS_SOLARSECURE_WIDTH 1 -#define LICENSED_V3_APPS_PERF_MONITOR_OFST 0 -#define LICENSED_V3_APPS_PERF_MONITOR_LBN 4 -#define LICENSED_V3_APPS_PERF_MONITOR_WIDTH 1 -#define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_OFST 0 -#define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_LBN 5 -#define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_WIDTH 1 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_OFST 0 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_LBN 6 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_WIDTH 1 -#define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_OFST 0 -#define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_LBN 7 -#define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_WIDTH 1 -#define LICENSED_V3_APPS_TCP_DIRECT_OFST 0 -#define LICENSED_V3_APPS_TCP_DIRECT_LBN 8 -#define LICENSED_V3_APPS_TCP_DIRECT_WIDTH 1 -#define LICENSED_V3_APPS_LOW_LATENCY_OFST 0 -#define LICENSED_V3_APPS_LOW_LATENCY_LBN 9 -#define LICENSED_V3_APPS_LOW_LATENCY_WIDTH 1 -#define LICENSED_V3_APPS_SOLARCAPTURE_TAP_OFST 0 -#define LICENSED_V3_APPS_SOLARCAPTURE_TAP_LBN 10 -#define LICENSED_V3_APPS_SOLARCAPTURE_TAP_WIDTH 1 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_OFST 0 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_LBN 11 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_WIDTH 1 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_OFST 0 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_LBN 12 -#define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_WIDTH 1 -#define LICENSED_V3_APPS_SCALEOUT_ONLOAD_OFST 0 -#define LICENSED_V3_APPS_SCALEOUT_ONLOAD_LBN 13 -#define LICENSED_V3_APPS_SCALEOUT_ONLOAD_WIDTH 1 -#define LICENSED_V3_APPS_DSHBRD_OFST 0 -#define LICENSED_V3_APPS_DSHBRD_LBN 14 -#define LICENSED_V3_APPS_DSHBRD_WIDTH 1 -#define LICENSED_V3_APPS_SCATRD_OFST 0 -#define LICENSED_V3_APPS_SCATRD_LBN 15 -#define LICENSED_V3_APPS_SCATRD_WIDTH 1 -#define LICENSED_V3_APPS_MASK_LBN 0 -#define LICENSED_V3_APPS_MASK_WIDTH 64 - /* LICENSED_V3_FEATURES structuredef */ #define LICENSED_V3_FEATURES_LEN 8 /* Bitmask of licensed firmware features */ @@ -10199,44 +10793,6 @@ #define RSS_MODE_HASH_SELECTOR_LBN 0 #define RSS_MODE_HASH_SELECTOR_WIDTH 8 -/* CTPIO_STATS_MAP structuredef */ -#define CTPIO_STATS_MAP_LEN 4 -/* The (function relative) VI number */ -#define CTPIO_STATS_MAP_VI_OFST 0 -#define CTPIO_STATS_MAP_VI_LEN 2 -#define CTPIO_STATS_MAP_VI_LBN 0 -#define CTPIO_STATS_MAP_VI_WIDTH 16 -/* The target bucket for the VI */ -#define CTPIO_STATS_MAP_BUCKET_OFST 2 -#define CTPIO_STATS_MAP_BUCKET_LEN 2 -#define CTPIO_STATS_MAP_BUCKET_LBN 16 -#define CTPIO_STATS_MAP_BUCKET_WIDTH 16 - - -/***********************************/ -/* MC_CMD_READ_REGS - * Get a dump of the MCPU registers - */ -#define MC_CMD_READ_REGS 0x50 -#undef MC_CMD_0x50_PRIVILEGE_CTG - -#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_READ_REGS_IN msgrequest */ -#define MC_CMD_READ_REGS_IN_LEN 0 - -/* MC_CMD_READ_REGS_OUT msgresponse */ -#define MC_CMD_READ_REGS_OUT_LEN 308 -/* Whether the corresponding register entry contains a valid value */ -#define MC_CMD_READ_REGS_OUT_MASK_OFST 0 -#define MC_CMD_READ_REGS_OUT_MASK_LEN 16 -/* Same order as MIPS GDB (r0-r31, sr, lo, hi, bad, cause, 32 x float, fsr, - * fir, fp) - */ -#define MC_CMD_READ_REGS_OUT_REGS_OFST 16 -#define MC_CMD_READ_REGS_OUT_REGS_LEN 4 -#define MC_CMD_READ_REGS_OUT_REGS_NUM 73 - /***********************************/ /* MC_CMD_INIT_EVQ @@ -10640,25 +11196,6 @@ #define MC_CMD_INIT_EVQ_V3_OUT_FLAG_RXQ_FORCE_EV_MERGING_LBN 3 #define MC_CMD_INIT_EVQ_V3_OUT_FLAG_RXQ_FORCE_EV_MERGING_WIDTH 1 -/* QUEUE_CRC_MODE structuredef */ -#define QUEUE_CRC_MODE_LEN 1 -#define QUEUE_CRC_MODE_MODE_LBN 0 -#define QUEUE_CRC_MODE_MODE_WIDTH 4 -/* enum: No CRC. */ -#define QUEUE_CRC_MODE_NONE 0x0 -/* enum: CRC Fiber channel over ethernet. */ -#define QUEUE_CRC_MODE_FCOE 0x1 -/* enum: CRC (digest) iSCSI header only. */ -#define QUEUE_CRC_MODE_ISCSI_HDR 0x2 -/* enum: CRC (digest) iSCSI header and payload. */ -#define QUEUE_CRC_MODE_ISCSI 0x3 -/* enum: CRC Fiber channel over IP over ethernet. */ -#define QUEUE_CRC_MODE_FCOIPOE 0x4 -/* enum: CRC MPA. */ -#define QUEUE_CRC_MODE_MPA 0x5 -#define QUEUE_CRC_MODE_SPARE_LBN 4 -#define QUEUE_CRC_MODE_SPARE_WIDTH 4 - /***********************************/ /* MC_CMD_INIT_RXQ @@ -10827,6 +11364,9 @@ #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_OFST 16 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_LBN 20 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_OFST 20 #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_LEN 4 @@ -10933,6 +11473,9 @@ #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_OFST 16 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_LBN 20 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_WIDTH 1 +#define MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 +#define MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 +#define MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_OFST 20 #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_LEN 4 @@ -11068,6 +11611,9 @@ #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_OFST 16 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_LBN 20 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_WIDTH 1 +#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 +#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 +#define MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_OFST 20 #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_LEN 4 @@ -11216,6 +11762,9 @@ #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_OFST 16 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_LBN 20 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_WIDTH 1 +#define MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16 +#define MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21 +#define MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1 /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_OFST 20 #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_LEN 4 @@ -11610,320 +12159,6 @@ /* MC_CMD_PROXY_CMD_OUT msgresponse */ #define MC_CMD_PROXY_CMD_OUT_LEN 0 -/* MC_PROXY_STATUS_BUFFER structuredef: Host memory status buffer used to - * manage proxied requests - */ -#define MC_PROXY_STATUS_BUFFER_LEN 16 -/* Handle allocated by the firmware for this proxy transaction */ -#define MC_PROXY_STATUS_BUFFER_HANDLE_OFST 0 -#define MC_PROXY_STATUS_BUFFER_HANDLE_LEN 4 -/* enum: An invalid handle. */ -#define MC_PROXY_STATUS_BUFFER_HANDLE_INVALID 0x0 -#define MC_PROXY_STATUS_BUFFER_HANDLE_LBN 0 -#define MC_PROXY_STATUS_BUFFER_HANDLE_WIDTH 32 -/* The requesting physical function number */ -#define MC_PROXY_STATUS_BUFFER_PF_OFST 4 -#define MC_PROXY_STATUS_BUFFER_PF_LEN 2 -#define MC_PROXY_STATUS_BUFFER_PF_LBN 32 -#define MC_PROXY_STATUS_BUFFER_PF_WIDTH 16 -/* The requesting virtual function number. Set to VF_NULL if the target is a - * PF. - */ -#define MC_PROXY_STATUS_BUFFER_VF_OFST 6 -#define MC_PROXY_STATUS_BUFFER_VF_LEN 2 -#define MC_PROXY_STATUS_BUFFER_VF_LBN 48 -#define MC_PROXY_STATUS_BUFFER_VF_WIDTH 16 -/* The target function RID. */ -#define MC_PROXY_STATUS_BUFFER_RID_OFST 8 -#define MC_PROXY_STATUS_BUFFER_RID_LEN 2 -#define MC_PROXY_STATUS_BUFFER_RID_LBN 64 -#define MC_PROXY_STATUS_BUFFER_RID_WIDTH 16 -/* The status of the proxy as described in MC_CMD_PROXY_COMPLETE. */ -#define MC_PROXY_STATUS_BUFFER_STATUS_OFST 10 -#define MC_PROXY_STATUS_BUFFER_STATUS_LEN 2 -#define MC_PROXY_STATUS_BUFFER_STATUS_LBN 80 -#define MC_PROXY_STATUS_BUFFER_STATUS_WIDTH 16 -/* If a request is authorized rather than carried out by the host, this is the - * elevated privilege mask granted to the requesting function. - */ -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_OFST 12 -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_LEN 4 -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_LBN 96 -#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_WIDTH 32 - - -/***********************************/ -/* MC_CMD_PROXY_CONFIGURE - * Enable/disable authorization of MCDI requests from unprivileged functions by - * a designated admin function - */ -#define MC_CMD_PROXY_CONFIGURE 0x58 -#undef MC_CMD_0x58_PRIVILEGE_CTG - -#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_PROXY_CONFIGURE_IN msgrequest */ -#define MC_CMD_PROXY_CONFIGURE_IN_LEN 108 -#define MC_CMD_PROXY_CONFIGURE_IN_FLAGS_OFST 0 -#define MC_CMD_PROXY_CONFIGURE_IN_FLAGS_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_OFST 0 -#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_LBN 0 -#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_WIDTH 1 -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS - * of blocks, each of the size REQUEST_BLOCK_SIZE. - */ -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32 -/* Must be a power of 2 */ -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12 -#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4 -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS - * of blocks, each of the size REPLY_BLOCK_SIZE. - */ -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32 -/* Must be a power of 2 */ -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24 -#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4 -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS - * of blocks, each of the size STATUS_BLOCK_SIZE. This buffer is only needed if - * host intends to complete proxied operations by using MC_CMD_PROXY_CMD. - */ -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32 -/* Must be a power of 2, or zero if this buffer is not provided */ -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36 -#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4 -/* Applies to all three buffers */ -#define MC_CMD_PROXY_CONFIGURE_IN_NUM_BLOCKS_OFST 40 -#define MC_CMD_PROXY_CONFIGURE_IN_NUM_BLOCKS_LEN 4 -/* A bit mask defining which MCDI operations may be proxied */ -#define MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_OFST 44 -#define MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_LEN 64 - -/* MC_CMD_PROXY_CONFIGURE_EXT_IN msgrequest */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_LEN 112 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_FLAGS_OFST 0 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_FLAGS_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_OFST 0 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_LBN 0 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_WIDTH 1 -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS - * of blocks, each of the size REQUEST_BLOCK_SIZE. - */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32 -/* Must be a power of 2 */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4 -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS - * of blocks, each of the size REPLY_BLOCK_SIZE. - */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32 -/* Must be a power of 2 */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4 -/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS - * of blocks, each of the size STATUS_BLOCK_SIZE. This buffer is only needed if - * host intends to complete proxied operations by using MC_CMD_PROXY_CMD. - */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32 -/* Must be a power of 2, or zero if this buffer is not provided */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4 -/* Applies to all three buffers */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_NUM_BLOCKS_OFST 40 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_NUM_BLOCKS_LEN 4 -/* A bit mask defining which MCDI operations may be proxied */ -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ALLOWED_MCDI_MASK_OFST 44 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_ALLOWED_MCDI_MASK_LEN 64 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_RESERVED_OFST 108 -#define MC_CMD_PROXY_CONFIGURE_EXT_IN_RESERVED_LEN 4 - -/* MC_CMD_PROXY_CONFIGURE_OUT msgresponse */ -#define MC_CMD_PROXY_CONFIGURE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_PROXY_COMPLETE - * Tells FW that a requested proxy operation has either been completed (by - * using MC_CMD_PROXY_CMD) or authorized/declined. May only be sent by the - * function that enabled proxying/authorization (by using - * MC_CMD_PROXY_CONFIGURE). - */ -#define MC_CMD_PROXY_COMPLETE 0x5f -#undef MC_CMD_0x5f_PRIVILEGE_CTG - -#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_PROXY_COMPLETE_IN msgrequest */ -#define MC_CMD_PROXY_COMPLETE_IN_LEN 12 -#define MC_CMD_PROXY_COMPLETE_IN_BLOCK_INDEX_OFST 0 -#define MC_CMD_PROXY_COMPLETE_IN_BLOCK_INDEX_LEN 4 -#define MC_CMD_PROXY_COMPLETE_IN_STATUS_OFST 4 -#define MC_CMD_PROXY_COMPLETE_IN_STATUS_LEN 4 -/* enum: The operation has been completed by using MC_CMD_PROXY_CMD, the reply - * is stored in the REPLY_BUFF. - */ -#define MC_CMD_PROXY_COMPLETE_IN_COMPLETE 0x0 -/* enum: The operation has been authorized. The originating function may now - * try again. - */ -#define MC_CMD_PROXY_COMPLETE_IN_AUTHORIZED 0x1 -/* enum: The operation has been declined. */ -#define MC_CMD_PROXY_COMPLETE_IN_DECLINED 0x2 -/* enum: The authorization failed because the relevant application did not - * respond in time. - */ -#define MC_CMD_PROXY_COMPLETE_IN_TIMEDOUT 0x3 -#define MC_CMD_PROXY_COMPLETE_IN_HANDLE_OFST 8 -#define MC_CMD_PROXY_COMPLETE_IN_HANDLE_LEN 4 - -/* MC_CMD_PROXY_COMPLETE_OUT msgresponse */ -#define MC_CMD_PROXY_COMPLETE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_ALLOC_BUFTBL_CHUNK - * Allocate a set of buffer table entries using the specified owner ID. This - * operation allocates the required buffer table entries (and fails if it - * cannot do so). The buffer table entries will initially be zeroed. - */ -#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87 -#undef MC_CMD_0x87_PRIVILEGE_CTG - -#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD - -/* MC_CMD_ALLOC_BUFTBL_CHUNK_IN msgrequest */ -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_LEN 8 -/* Owner ID to use */ -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_OFST 0 -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_LEN 4 -/* Size of buffer table pages to use, in bytes (note that only a few values are - * legal on any specific hardware). - */ -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_OFST 4 -#define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_LEN 4 - -/* MC_CMD_ALLOC_BUFTBL_CHUNK_OUT msgresponse */ -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_LEN 12 -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_OFST 0 -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_LEN 4 -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_OFST 4 -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_LEN 4 -/* Buffer table IDs for use in DMA descriptors. */ -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_OFST 8 -#define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_LEN 4 - - -/***********************************/ -/* MC_CMD_PROGRAM_BUFTBL_ENTRIES - * Reprogram a set of buffer table entries in the specified chunk. - */ -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88 -#undef MC_CMD_0x88_PRIVILEGE_CTG - -#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD - -/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN msgrequest */ -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMIN 20 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 268 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX_MCDI2 268 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) (12+8*(num)) -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_NUM(len) (((len)-12)/8) -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST 0 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN 4 -/* ID */ -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_OFST 4 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4 -/* Num entries */ -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 8 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4 -/* Buffer table entry address */ -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32 - -/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT msgresponse */ -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_FREE_BUFTBL_CHUNK - */ -#define MC_CMD_FREE_BUFTBL_CHUNK 0x89 -#undef MC_CMD_0x89_PRIVILEGE_CTG - -#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD - -/* MC_CMD_FREE_BUFTBL_CHUNK_IN msgrequest */ -#define MC_CMD_FREE_BUFTBL_CHUNK_IN_LEN 4 -#define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_OFST 0 -#define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_LEN 4 - -/* MC_CMD_FREE_BUFTBL_CHUNK_OUT msgresponse */ -#define MC_CMD_FREE_BUFTBL_CHUNK_OUT_LEN 0 - /***********************************/ /* MC_CMD_FILTER_OP @@ -12822,6 +13057,10 @@ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES 0x5 /* enum: read the supported encapsulation types for the VNIC */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_VNIC_ENCAP_TYPES 0x6 +/* enum: read the supported RX filter matches for low-latency queues (as + * allocated by MC_CMD_ALLOC_LL_QUEUES) + */ +#define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_LL_RX_MATCHES 0x7 /* MC_CMD_GET_PARSER_DISP_INFO_OUT msgresponse */ #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMIN 8 @@ -12860,6 +13099,48 @@ #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_LBN 0 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_WIDTH 1 +/* MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT msgresponse: + * GET_PARSER_DISP_INFO response format for OP_GET_SECURITY_RULE_INFO. + * (Medford-only; for use by SolarSecure apps, not directly by drivers. See + * SF-114946-SW.) NOTE - this message definition is provisional. It has not yet + * been used in any released code and may change during development. This note + * will be removed once it is regarded as stable. + */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_LEN 36 +/* identifies the type of operation requested */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_OP_OFST 0 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_OP_LEN 4 +/* Enum values, see field(s): */ +/* MC_CMD_GET_PARSER_DISP_INFO_IN/OP */ +/* a version number representing the set of rule lookups that are implemented + * by the currently running firmware + */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_OFST 4 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_LEN 4 +/* enum: implements lookup sequences described in SF-114946-SW draft C */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_SF_114946_SW_C 0x0 +/* the number of nodes in the subnet map */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_NODES_OFST 8 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_NODES_LEN 4 +/* the number of entries in one subnet map node */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_ENTRIES_PER_NODE_OFST 12 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_ENTRIES_PER_NODE_LEN 4 +/* minimum valid value for a subnet ID in a subnet map leaf */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MIN_OFST 16 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MIN_LEN 4 +/* maximum valid value for a subnet ID in a subnet map leaf */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MAX_OFST 20 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MAX_LEN 4 +/* the number of entries in the local and remote port range maps */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_TREE_NUM_ENTRIES_OFST 24 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_TREE_NUM_ENTRIES_LEN 4 +/* minimum valid value for a portrange ID in a port range map leaf */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MIN_OFST 28 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MIN_LEN 4 +/* maximum valid value for a portrange ID in a port range map leaf */ +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MAX_OFST 32 +#define MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MAX_LEN 4 + /* MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT msgresponse: This response is * returned if a MC_CMD_GET_PARSER_DISP_INFO_IN request is sent with OP value * OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES. It contains information about the @@ -12913,136 +13194,6 @@ #define MC_CMD_GET_PARSER_DISP_SUPPORTED_VNIC_ENCAP_TYPES_OUT_ENCAP_TYPE_L2GRE_WIDTH 1 -/***********************************/ -/* MC_CMD_PARSER_DISP_RW - * Direct read/write of parser-dispatcher state (DICPUs and LUE) for debugging. - * Please note that this interface is only of use to debug tools which have - * knowledge of firmware and hardware data structures; nothing here is intended - * for use by normal driver code. Note that although this command is in the - * Admin privilege group, in tamperproof adapters, only read operations are - * permitted. - */ -#define MC_CMD_PARSER_DISP_RW 0xe5 -#undef MC_CMD_0xe5_PRIVILEGE_CTG - -#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_PARSER_DISP_RW_IN msgrequest */ -#define MC_CMD_PARSER_DISP_RW_IN_LEN 32 -/* identifies the target of the operation */ -#define MC_CMD_PARSER_DISP_RW_IN_TARGET_OFST 0 -#define MC_CMD_PARSER_DISP_RW_IN_TARGET_LEN 4 -/* enum: RX dispatcher CPU */ -#define MC_CMD_PARSER_DISP_RW_IN_RX_DICPU 0x0 -/* enum: TX dispatcher CPU */ -#define MC_CMD_PARSER_DISP_RW_IN_TX_DICPU 0x1 -/* enum: Lookup engine (with original metadata format). Deprecated; used only - * by cmdclient as a fallback for very old Huntington firmware, and not - * supported in firmware beyond v6.4.0.1005. Use LUE_VERSIONED_METADATA - * instead. - */ -#define MC_CMD_PARSER_DISP_RW_IN_LUE 0x2 -/* enum: Lookup engine (with requested metadata format) */ -#define MC_CMD_PARSER_DISP_RW_IN_LUE_VERSIONED_METADATA 0x3 -/* enum: RX0 dispatcher CPU (alias for RX_DICPU; Medford has 2 RX DICPUs) */ -#define MC_CMD_PARSER_DISP_RW_IN_RX0_DICPU 0x0 -/* enum: RX1 dispatcher CPU (only valid for Medford) */ -#define MC_CMD_PARSER_DISP_RW_IN_RX1_DICPU 0x4 -/* enum: Miscellaneous other state (only valid for Medford) */ -#define MC_CMD_PARSER_DISP_RW_IN_MISC_STATE 0x5 -/* identifies the type of operation requested */ -#define MC_CMD_PARSER_DISP_RW_IN_OP_OFST 4 -#define MC_CMD_PARSER_DISP_RW_IN_OP_LEN 4 -/* enum: Read a word of DICPU DMEM or a LUE entry */ -#define MC_CMD_PARSER_DISP_RW_IN_READ 0x0 -/* enum: Write a word of DICPU DMEM or a LUE entry. Not permitted on - * tamperproof adapters. - */ -#define MC_CMD_PARSER_DISP_RW_IN_WRITE 0x1 -/* enum: Read-modify-write a word of DICPU DMEM (not valid for LUE). Not - * permitted on tamperproof adapters. - */ -#define MC_CMD_PARSER_DISP_RW_IN_RMW 0x2 -/* data memory address (DICPU targets) or LUE index (LUE targets) */ -#define MC_CMD_PARSER_DISP_RW_IN_ADDRESS_OFST 8 -#define MC_CMD_PARSER_DISP_RW_IN_ADDRESS_LEN 4 -/* selector (for MISC_STATE target) */ -#define MC_CMD_PARSER_DISP_RW_IN_SELECTOR_OFST 8 -#define MC_CMD_PARSER_DISP_RW_IN_SELECTOR_LEN 4 -/* enum: Port to datapath mapping */ -#define MC_CMD_PARSER_DISP_RW_IN_PORT_DP_MAPPING 0x1 -/* value to write (for DMEM writes) */ -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_WRITE_VALUE_OFST 12 -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_WRITE_VALUE_LEN 4 -/* XOR value (for DMEM read-modify-writes: new = (old & mask) ^ value) */ -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_XOR_VALUE_OFST 12 -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_XOR_VALUE_LEN 4 -/* AND mask (for DMEM read-modify-writes: new = (old & mask) ^ value) */ -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_AND_MASK_OFST 16 -#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_AND_MASK_LEN 4 -/* metadata format (for LUE reads using LUE_VERSIONED_METADATA) */ -#define MC_CMD_PARSER_DISP_RW_IN_LUE_READ_METADATA_VERSION_OFST 12 -#define MC_CMD_PARSER_DISP_RW_IN_LUE_READ_METADATA_VERSION_LEN 4 -/* value to write (for LUE writes) */ -#define MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_OFST 12 -#define MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_LEN 20 - -/* MC_CMD_PARSER_DISP_RW_OUT msgresponse */ -#define MC_CMD_PARSER_DISP_RW_OUT_LEN 52 -/* value read (for DMEM reads) */ -#define MC_CMD_PARSER_DISP_RW_OUT_DMEM_READ_VALUE_OFST 0 -#define MC_CMD_PARSER_DISP_RW_OUT_DMEM_READ_VALUE_LEN 4 -/* value read (for LUE reads) */ -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_OFST 0 -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_LEN 20 -/* up to 8 32-bit words of additional soft state from the LUE manager (the - * exact content is firmware-dependent and intended only for debug use) - */ -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_OFST 20 -#define MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_LEN 32 -/* datapath(s) used for each port (for MISC_STATE PORT_DP_MAPPING selector) */ -#define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_OFST 0 -#define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_LEN 4 -#define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_NUM 4 -#define MC_CMD_PARSER_DISP_RW_OUT_DP0 0x1 /* enum */ -#define MC_CMD_PARSER_DISP_RW_OUT_DP1 0x2 /* enum */ - - -/***********************************/ -/* MC_CMD_GET_PF_COUNT - * Get number of PFs on the device. - */ -#define MC_CMD_GET_PF_COUNT 0xb6 -#undef MC_CMD_0xb6_PRIVILEGE_CTG - -#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_PF_COUNT_IN msgrequest */ -#define MC_CMD_GET_PF_COUNT_IN_LEN 0 - -/* MC_CMD_GET_PF_COUNT_OUT msgresponse */ -#define MC_CMD_GET_PF_COUNT_OUT_LEN 1 -/* Identifies the number of PFs on the device. */ -#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_OFST 0 -#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_LEN 1 - - -/***********************************/ -/* MC_CMD_SET_PF_COUNT - * Set number of PFs on the device. - */ -#define MC_CMD_SET_PF_COUNT 0xb7 - -/* MC_CMD_SET_PF_COUNT_IN msgrequest */ -#define MC_CMD_SET_PF_COUNT_IN_LEN 4 -/* New number of PFs on the device. */ -#define MC_CMD_SET_PF_COUNT_IN_PF_COUNT_OFST 0 -#define MC_CMD_SET_PF_COUNT_IN_PF_COUNT_LEN 4 - -/* MC_CMD_SET_PF_COUNT_OUT msgresponse */ -#define MC_CMD_SET_PF_COUNT_OUT_LEN 0 - - /***********************************/ /* MC_CMD_GET_PORT_ASSIGNMENT * Get port assignment for current PCI function. @@ -13068,25 +13219,6 @@ #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_NULL_PORT 0xffffffff -/***********************************/ -/* MC_CMD_SET_PORT_ASSIGNMENT - * Set port assignment for current PCI function. - */ -#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9 -#undef MC_CMD_0xb9_PRIVILEGE_CTG - -#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SET_PORT_ASSIGNMENT_IN msgrequest */ -#define MC_CMD_SET_PORT_ASSIGNMENT_IN_LEN 4 -/* Identifies the port assignment for this function. */ -#define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_OFST 0 -#define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_LEN 4 - -/* MC_CMD_SET_PORT_ASSIGNMENT_OUT msgresponse */ -#define MC_CMD_SET_PORT_ASSIGNMENT_OUT_LEN 0 - - /***********************************/ /* MC_CMD_ALLOC_VIS * Allocate VIs for current PCI function. @@ -13183,263 +13315,6 @@ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_STRIDE_LEN 4 -/***********************************/ -/* MC_CMD_SET_SRIOV_CFG - * Set SRIOV config for this PF. - */ -#define MC_CMD_SET_SRIOV_CFG 0xbb -#undef MC_CMD_0xbb_PRIVILEGE_CTG - -#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SET_SRIOV_CFG_IN msgrequest */ -#define MC_CMD_SET_SRIOV_CFG_IN_LEN 20 -/* Number of VFs currently enabled. */ -#define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_OFST 0 -#define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_LEN 4 -/* Max number of VFs before sriov stride and offset may need to be changed. */ -#define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_OFST 4 -#define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_LEN 4 -#define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_OFST 8 -#define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_LEN 4 -#define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_OFST 8 -#define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_LBN 0 -#define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_WIDTH 1 -/* RID offset of first VF from PF, or 0 for no change, or - * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate an offset. - */ -#define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_OFST 12 -#define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_LEN 4 -/* RID offset of each subsequent VF from the previous, 0 for no change, or - * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate a stride. - */ -#define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_OFST 16 -#define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_LEN 4 - -/* MC_CMD_SET_SRIOV_CFG_OUT msgresponse */ -#define MC_CMD_SET_SRIOV_CFG_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_GET_VI_ALLOC_INFO - * Get information about number of VI's and base VI number allocated to this - * function. This message is not available to dynamic clients created by - * MC_CMD_CLIENT_ALLOC. - */ -#define MC_CMD_GET_VI_ALLOC_INFO 0x8d -#undef MC_CMD_0x8d_PRIVILEGE_CTG - -#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_VI_ALLOC_INFO_IN msgrequest */ -#define MC_CMD_GET_VI_ALLOC_INFO_IN_LEN 0 - -/* MC_CMD_GET_VI_ALLOC_INFO_OUT msgresponse */ -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_LEN 12 -/* The number of VIs allocated on this function */ -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_OFST 0 -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_LEN 4 -/* The base absolute VI number allocated to this function. Required to - * correctly interpret wakeup events. - */ -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_OFST 4 -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_LEN 4 -/* Function's port vi_shift value (always 0 on Huntington) */ -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_OFST 8 -#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_LEN 4 - - -/***********************************/ -/* MC_CMD_DUMP_VI_STATE - * For CmdClient use. Dump pertinent information on a specific absolute VI. The - * VI must be owned by the calling client or one of its ancestors; usership of - * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient. - */ -#define MC_CMD_DUMP_VI_STATE 0x8e -#undef MC_CMD_0x8e_PRIVILEGE_CTG - -#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_DUMP_VI_STATE_IN msgrequest */ -#define MC_CMD_DUMP_VI_STATE_IN_LEN 4 -/* The VI number to query. */ -#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_OFST 0 -#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4 - -/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */ -#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100 -/* The PF part of the function owning this VI. */ -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0 -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2 -/* The VF part of the function owning this VI. */ -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_OFST 2 -#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_LEN 2 -/* Base of VIs allocated to this function. */ -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_OFST 4 -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_LEN 2 -/* Count of VIs allocated to the owner function. */ -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_OFST 6 -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_LEN 2 -/* Base interrupt vector allocated to this function. */ -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_OFST 8 -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_LEN 2 -/* Number of interrupt vectors allocated to this function. */ -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_OFST 10 -#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_LEN 2 -/* Raw evq ptr table data. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32 -/* Raw evq timer table data. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32 -/* Combined metadata field. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_OFST 28 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_LBN 0 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_WIDTH 16 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_OFST 28 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_LBN 16 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_WIDTH 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_OFST 28 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_LBN 24 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_WIDTH 8 -/* TXDPCPU raw table data for queue. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32 -/* TXDPCPU raw table data for queue. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32 -/* TXDPCPU raw table data for queue. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32 -/* Combined metadata field. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_OFST 56 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_LBN 16 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_WIDTH 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_OFST 56 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_LBN 24 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_WIDTH 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_OFST 56 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_LBN 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_WIDTH 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_OFST 56 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_LBN 40 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_WIDTH 24 -/* RXDPCPU raw table data for queue. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32 -/* RXDPCPU raw table data for queue. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32 -/* Reserved, currently 0. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32 -/* Combined metadata field. */ -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_OFST 88 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_LBN 16 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_WIDTH 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_OFST 88 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_LBN 24 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_WIDTH 8 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32 -#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8 -/* Current user, as assigned by MC_CMD_SET_VI_USER. */ -#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96 -#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4 - - /***********************************/ /* MC_CMD_ALLOC_PIOBUF * Allocate a push I/O buffer for later use with a tx queue. @@ -13491,354 +13366,102 @@ /* MC_CMD_GET_VI_TLP_PROCESSING_IN msgrequest */ #define MC_CMD_GET_VI_TLP_PROCESSING_IN_LEN 4 -/* VI number to get information for. */ +/* Queue handle, encodes queue type and VI number to get information for. */ #define MC_CMD_GET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0 #define MC_CMD_GET_VI_TLP_PROCESSING_IN_INSTANCE_LEN 4 -/* MC_CMD_GET_VI_TLP_PROCESSING_OUT msgresponse */ -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_LEN 4 -/* Transaction processing steering hint 1 for use with the Rx Queue. */ -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_OFST 0 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_LEN 1 -/* Transaction processing steering hint 2 for use with the Ev Queue. */ -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_OFST 1 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_LEN 1 -/* Use Relaxed ordering model for TLPs on this VI. */ -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_LBN 16 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_WIDTH 1 -/* Use ID based ordering for TLPs on this VI. */ -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_LBN 17 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_WIDTH 1 -/* Set no snoop bit for TLPs on this VI. */ -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_LBN 18 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_WIDTH 1 -/* Enable TPH for TLPs on this VI. */ -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_LBN 19 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_WIDTH 1 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_DATA_OFST 0 -#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_DATA_LEN 4 +/* MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT msgresponse: This message has the same + * layout as GET_VI_TLP_PROCESSING_OUT, but with corrected field ordering to + * simplify use in drivers + */ +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_LEN 4 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_DATA_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_DATA_LEN 4 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_LBN 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_WIDTH 8 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_LBN 8 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_WIDTH 8 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_LBN 16 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_WIDTH 1 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_LBN 16 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_WIDTH 1 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_LBN 17 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_WIDTH 1 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_LBN 18 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_WIDTH 1 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_LBN 19 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_WIDTH 1 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_LBN 20 +#define MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_WIDTH 1 /***********************************/ /* MC_CMD_SET_VI_TLP_PROCESSING * Set TLP steering and ordering information for a VI. The caller must have the * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or - * an ancestor of the current user (see MC_CMD_SET_VI_USER). + * an ancestor of the current user (see MC_CMD_SET_VI_USER). Note that LL + * queues require this to be called after allocation but before initialisation + * of the queue. TLP options of a queue are fixed after queue is initialised, + * with the values set to current global value or they can be overriden using + * this command. At LL queue allocation, all overrides are cleared. */ #define MC_CMD_SET_VI_TLP_PROCESSING 0xb1 #undef MC_CMD_0xb1_PRIVILEGE_CTG #define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL -/* MC_CMD_SET_VI_TLP_PROCESSING_IN msgrequest */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_LEN 8 -/* VI number to set information for. */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_INSTANCE_LEN 4 -/* Transaction processing steering hint 1 for use with the Rx Queue. */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_OFST 4 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_LEN 1 -/* Transaction processing steering hint 2 for use with the Ev Queue. */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_OFST 5 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_LEN 1 -/* Use Relaxed ordering model for TLPs on this VI. */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_LBN 48 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_WIDTH 1 -/* Use ID based ordering for TLPs on this VI. */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_LBN 49 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_WIDTH 1 -/* Set the no snoop bit for TLPs on this VI. */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_LBN 50 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_WIDTH 1 -/* Enable TPH for TLPs on this VI. */ -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_LBN 51 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_WIDTH 1 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_DATA_OFST 4 -#define MC_CMD_SET_VI_TLP_PROCESSING_IN_DATA_LEN 4 +/* MC_CMD_SET_VI_TLP_PROCESSING_V2_IN msgrequest: This message has the same + * layout as SET_VI_TLP_PROCESSING_OUT, but with corrected field ordering to + * simplify use in drivers. + */ +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_LEN 8 +/* Queue handle, encodes queue type and VI number to set information for. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_INSTANCE_OFST 0 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_INSTANCE_LEN 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_DATA_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_DATA_LEN 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_LBN 0 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_WIDTH 8 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_LBN 8 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_WIDTH 8 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_LBN 16 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_WIDTH 1 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_LBN 16 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_WIDTH 1 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_LBN 17 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_WIDTH 1 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_LBN 18 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_WIDTH 1 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_LBN 19 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_WIDTH 1 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_LBN 20 +#define MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_WIDTH 1 /* MC_CMD_SET_VI_TLP_PROCESSING_OUT msgresponse */ #define MC_CMD_SET_VI_TLP_PROCESSING_OUT_LEN 0 -/***********************************/ -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS - * Get global PCIe steering and transaction processing configuration. - */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc -#undef MC_CMD_0xbc_PRIVILEGE_CTG - -#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN msgrequest */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_LEN 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_LEN 4 -/* enum: MISC. */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_MISC 0x0 -/* enum: IDO. */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_IDO 0x1 -/* enum: RO. */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_RO 0x2 -/* enum: TPH Type. */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_TPH_TYPE 0x3 - -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT msgresponse */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_LEN 8 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_GLOBAL_CATEGORY_OFST 0 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_GLOBAL_CATEGORY_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */ -/* Amalgamated TLP info word. */ -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_WORD_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_WORD_LEN 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_LBN 0 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_LBN 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_WIDTH 31 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_LBN 0 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_LBN 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_LBN 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_LBN 3 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_LBN 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_WIDTH 28 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_LBN 0 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_LBN 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_LBN 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_WIDTH 1 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_LBN 3 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_WIDTH 29 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_LBN 0 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_LBN 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_WIDTH 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_LBN 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_WIDTH 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_LBN 6 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_WIDTH 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_LBN 8 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_WIDTH 2 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_OFST 4 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_LBN 9 -#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_WIDTH 23 - - -/***********************************/ -/* MC_CMD_SET_TLP_PROCESSING_GLOBALS - * Set global PCIe steering and transaction processing configuration. - */ -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd -#undef MC_CMD_0xbd_PRIVILEGE_CTG - -#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN msgrequest */ -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_LEN 8 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_GET_TLP_PROCESSING_GLOBALS/MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */ -/* Amalgamated TLP info word. */ -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_WORD_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_WORD_LEN 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_LBN 0 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_LBN 0 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_LBN 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_LBN 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_LBN 3 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_LBN 0 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_LBN 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_LBN 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_WIDTH 1 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_LBN 0 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_LBN 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_WIDTH 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_LBN 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_WIDTH 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_LBN 6 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_WIDTH 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_LBN 8 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_WIDTH 2 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_OFST 4 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_LBN 10 -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_WIDTH 22 - -/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT msgresponse */ -#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_SATELLITE_DOWNLOAD - * Download a new set of images to the satellite CPUs from the host. - */ -#define MC_CMD_SATELLITE_DOWNLOAD 0x91 -#undef MC_CMD_0x91_PRIVILEGE_CTG - -#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SATELLITE_DOWNLOAD_IN msgrequest: The reset requirements for the CPUs - * are subtle, and so downloads must proceed in a number of phases. - * - * 1) PHASE_RESET with a target of TARGET_ALL and chunk ID/length of 0. - * - * 2) PHASE_IMEMS for each of the IMEM targets (target IDs 0-11). Each download - * may consist of multiple chunks. The final chunk (with CHUNK_ID_LAST) should - * be a checksum (a simple 32-bit sum) of the transferred data. An individual - * download may be aborted using CHUNK_ID_ABORT. - * - * 3) PHASE_VECTORS for each of the vector table targets (target IDs 12-15), - * similar to PHASE_IMEMS. - * - * 4) PHASE_READY with a target of TARGET_ALL and chunk ID/length of 0. - * - * After any error (a requested abort is not considered to be an error) the - * sequence must be restarted from PHASE_RESET. - */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMIN 20 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX 252 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX_MCDI2 1020 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_LEN(num) (16+4*(num)) -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_NUM(len) (((len)-16)/4) -/* Download phase. (Note: the IDLE phase is used internally and is never valid - * in a command from the host.) - */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_OFST 0 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_LEN 4 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IDLE 0x0 /* enum */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_RESET 0x1 /* enum */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IMEMS 0x2 /* enum */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_VECTORS 0x3 /* enum */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_READY 0x4 /* enum */ -/* Target for download. (These match the blob numbers defined in - * mc_flash_layout.h.) - */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_OFST 4 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_LEN 4 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_TEXT 0x0 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_TEXT 0x1 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDP_TEXT 0x2 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDP_TEXT 0x3 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT 0x4 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT_CFG 0x5 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT 0x6 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT_CFG 0x7 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_PGM 0x8 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_SL_PGM 0x9 -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_PGM 0xa -/* enum: Valid in phase 2 (PHASE_IMEMS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_SL_PGM 0xb -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL0 0xc -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL0 0xd -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL1 0xe -/* enum: Valid in phase 3 (PHASE_VECTORS) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL1 0xf -/* enum: Valid in phases 1 (PHASE_RESET) and 4 (PHASE_READY) only */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_ALL 0xffffffff -/* Chunk ID, or CHUNK_ID_LAST or CHUNK_ID_ABORT */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_OFST 8 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_LEN 4 -/* enum: Last chunk, containing checksum rather than data */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_LAST 0xffffffff -/* enum: Abort download of this item */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_ABORT 0xfffffffe -/* Length of this chunk in bytes */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_LEN_OFST 12 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_LEN_LEN 4 -/* Data for this chunk */ -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_OFST 16 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_LEN 4 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MINNUM 1 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM 59 -#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM_MCDI2 251 - -/* MC_CMD_SATELLITE_DOWNLOAD_OUT msgresponse */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_LEN 8 -/* Same as MC_CMD_ERR field, but included as 0 in success cases */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_RESULT_OFST 0 -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_RESULT_LEN 4 -/* Extra status information */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_INFO_OFST 4 -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_INFO_LEN 4 -/* enum: Code download OK, completed. */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_COMPLETE 0x0 -/* enum: Code download aborted as requested. */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_ABORTED 0x1 -/* enum: Code download OK so far, send next chunk. */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_NEXT_CHUNK 0x2 -/* enum: Download phases out of sequence */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_PHASE 0x100 -/* enum: Bad target for this phase */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_TARGET 0x101 -/* enum: Chunk ID out of sequence */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_ID 0x200 -/* enum: Chunk length zero or too large */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_LEN 0x201 -/* enum: Checksum was incorrect */ -#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHECKSUM 0x300 - - /***********************************/ /* MC_CMD_GET_CAPABILITIES - * Get device capabilities. - * - * This is supplementary to the MC_CMD_GET_BOARD_CFG command, and intended to - * reference inherent device capabilities as opposed to current NVRAM config. + * Get device capabilities. This is supplementary to the MC_CMD_GET_BOARD_CFG + * command, and intended to reference inherent device capabilities as opposed + * to current NVRAM config. */ #define MC_CMD_GET_CAPABILITIES 0xbe #undef MC_CMD_0xbe_PRIVILEGE_CTG @@ -14490,7 +14113,10 @@ /* MC_CMD_GET_CAPABILITIES_V2_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V2_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -14900,7 +14526,10 @@ /* MC_CMD_GET_CAPABILITIES_V3_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V3_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -15335,7 +14964,10 @@ /* MC_CMD_GET_CAPABILITIES_V4_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V4_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -15778,7 +15410,10 @@ /* MC_CMD_GET_CAPABILITIES_V5_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V5_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -16226,7 +15861,10 @@ /* MC_CMD_GET_CAPABILITIES_V6_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -16685,7 +16323,10 @@ /* MC_CMD_GET_CAPABILITIES_V7_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V7_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -16796,9 +16437,21 @@ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_WIDTH 1 /* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160 @@ -17189,7 +16842,10 @@ /* MC_CMD_GET_CAPABILITIES_V8_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V8_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -17300,9 +16956,21 @@ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_WIDTH 1 /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. @@ -17707,7 +17375,10 @@ /* MC_CMD_GET_CAPABILITIES_V9_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V9_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -17818,9 +17489,21 @@ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_WIDTH 1 /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. @@ -18260,7 +17943,10 @@ /* MC_CMD_GET_CAPABILITIES_V10_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V10_OUT_PF_NOT_PRESENT 0xfe */ -/* Number of VIs available for each external port */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ #define MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_OFST 58 #define MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_LEN 2 #define MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_NUM 4 @@ -18371,9 +18057,21 @@ #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 #define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 #define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 #define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_WIDTH 1 /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. @@ -18438,212 +18136,1233 @@ #define MC_CMD_GET_CAPABILITIES_V10_OUT_GUARANTEED_QUEUE_SIZES_OFST 188 #define MC_CMD_GET_CAPABILITIES_V10_OUT_GUARANTEED_QUEUE_SIZES_LEN 4 - -/***********************************/ -/* MC_CMD_V2_EXTN - * Encapsulation for a v2 extended command +/* MC_CMD_GET_CAPABILITIES_V11_OUT msgresponse */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LEN 196 +/* First word of flags. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS1_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS1_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_LBN 3 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_LBN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_LBN 5 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_LBN 6 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_LBN 8 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_LBN 9 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN 10 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 11 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_LBN 18 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_LBN 19 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_LBN 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_LBN 21 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_LBN 22 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_LBN 23 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_LBN 24 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_LBN 25 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_LBN 26 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_LBN 27 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_LBN 28 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_LBN 30 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_LBN 31 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_WIDTH 1 +/* RxDPCPU firmware id. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DPCPU_FW_ID_OFST 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DPCPU_FW_ID_LEN 2 +/* enum: Standard RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP 0x0 +/* enum: Low latency RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_LOW_LATENCY 0x1 +/* enum: Packed stream RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_PACKED_STREAM 0x2 +/* enum: Rules engine RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_RULES_ENGINE 0x5 +/* enum: DPDK RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_DPDK 0x6 +/* enum: BIST RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_BIST 0x10a +/* enum: RXDP Test firmware image 1 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101 +/* enum: RXDP Test firmware image 2 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102 +/* enum: RXDP Test firmware image 3 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103 +/* enum: RXDP Test firmware image 4 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104 +/* enum: RXDP Test firmware image 5 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_BACKPRESSURE 0x105 +/* enum: RXDP Test firmware image 6 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106 +/* enum: RXDP Test firmware image 7 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107 +/* enum: RXDP Test firmware image 8 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_DISABLE_DL 0x108 +/* enum: RXDP Test firmware image 9 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_DOORBELL_DELAY 0x10b +/* enum: RXDP Test firmware image 10 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_SLOW 0x10c +/* TxDPCPU firmware id. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DPCPU_FW_ID_OFST 6 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DPCPU_FW_ID_LEN 2 +/* enum: Standard TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP 0x0 +/* enum: Low latency TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_LOW_LATENCY 0x1 +/* enum: High packet rate TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_HIGH_PACKET_RATE 0x3 +/* enum: Rules engine TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_RULES_ENGINE 0x5 +/* enum: DPDK TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_DPDK 0x6 +/* enum: BIST TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_BIST 0x12d +/* enum: TXDP Test firmware image 1 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_TSO_EDIT 0x101 +/* enum: TXDP Test firmware image 2 */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102 +/* enum: TXDP CSR bus test firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_CSR 0x103 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_OFST 8 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_LEN 2 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_OFST 8 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_WIDTH 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_OFST 8 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4 +/* enum: reserved value - do not use (may indicate alternative interpretation + * of REV field in future) */ -#define MC_CMD_V2_EXTN 0x7f - -/* MC_CMD_V2_EXTN_IN msgrequest */ -#define MC_CMD_V2_EXTN_IN_LEN 4 -/* the extended command number */ -#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_LBN 0 -#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_WIDTH 15 -#define MC_CMD_V2_EXTN_IN_UNUSED_LBN 15 -#define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH 1 -/* the actual length of the encapsulated command (which is not in the v1 - * header) +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_RESERVED 0x0 +/* enum: Trivial RX PD firmware for early Huntington development (Huntington + * development only) */ -#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_LBN 16 -#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_WIDTH 10 -#define MC_CMD_V2_EXTN_IN_UNUSED2_LBN 26 -#define MC_CMD_V2_EXTN_IN_UNUSED2_WIDTH 2 -/* Type of command/response */ -#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_LBN 28 -#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH 4 -/* enum: MCDI command directed to or response originating from the MC. */ -#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_MC 0x0 -/* enum: MCDI command directed to a TSA controller. MCDI responses of this type - * are not defined. +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1 +/* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ -#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1 - - -/***********************************/ -/* MC_CMD_TCM_BUCKET_ALLOC - * Allocate a pacer bucket (for qau rp or a snapper test) +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 +/* enum: RX PD firmware with approximately Siena-compatible behaviour + * (Huntington development only) */ -#define MC_CMD_TCM_BUCKET_ALLOC 0xb2 -#undef MC_CMD_0xb2_PRIVILEGE_CTG - -#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_TCM_BUCKET_ALLOC_IN msgrequest */ -#define MC_CMD_TCM_BUCKET_ALLOC_IN_LEN 0 - -/* MC_CMD_TCM_BUCKET_ALLOC_OUT msgresponse */ -#define MC_CMD_TCM_BUCKET_ALLOC_OUT_LEN 4 -/* the bucket id */ -#define MC_CMD_TCM_BUCKET_ALLOC_OUT_BUCKET_OFST 0 -#define MC_CMD_TCM_BUCKET_ALLOC_OUT_BUCKET_LEN 4 - - -/***********************************/ -/* MC_CMD_TCM_BUCKET_FREE - * Free a pacer bucket +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2 +/* enum: Full featured RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_FULL_FEATURED 0x3 +/* enum: (deprecated original name for the FULL_FEATURED variant) */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_VSWITCH 0x3 +/* enum: siena_compat variant RX PD firmware using PM rather than MAC + * (Huntington development only) */ -#define MC_CMD_TCM_BUCKET_FREE 0xb3 -#undef MC_CMD_0xb3_PRIVILEGE_CTG - -#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_TCM_BUCKET_FREE_IN msgrequest */ -#define MC_CMD_TCM_BUCKET_FREE_IN_LEN 4 -/* the bucket id */ -#define MC_CMD_TCM_BUCKET_FREE_IN_BUCKET_OFST 0 -#define MC_CMD_TCM_BUCKET_FREE_IN_BUCKET_LEN 4 - -/* MC_CMD_TCM_BUCKET_FREE_OUT msgresponse */ -#define MC_CMD_TCM_BUCKET_FREE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_TCM_BUCKET_INIT - * Initialise pacer bucket with a given rate - */ -#define MC_CMD_TCM_BUCKET_INIT 0xb4 -#undef MC_CMD_0xb4_PRIVILEGE_CTG - -#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_TCM_BUCKET_INIT_IN msgrequest */ -#define MC_CMD_TCM_BUCKET_INIT_IN_LEN 8 -/* the bucket id */ -#define MC_CMD_TCM_BUCKET_INIT_IN_BUCKET_OFST 0 -#define MC_CMD_TCM_BUCKET_INIT_IN_BUCKET_LEN 4 -/* the rate in mbps */ -#define MC_CMD_TCM_BUCKET_INIT_IN_RATE_OFST 4 -#define MC_CMD_TCM_BUCKET_INIT_IN_RATE_LEN 4 - -/* MC_CMD_TCM_BUCKET_INIT_EXT_IN msgrequest */ -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_LEN 12 -/* the bucket id */ -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_BUCKET_OFST 0 -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_BUCKET_LEN 4 -/* the rate in mbps */ -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_RATE_OFST 4 -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_RATE_LEN 4 -/* the desired maximum fill level */ -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_MAX_FILL_OFST 8 -#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_MAX_FILL_LEN 4 - -/* MC_CMD_TCM_BUCKET_INIT_OUT msgresponse */ -#define MC_CMD_TCM_BUCKET_INIT_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_TCM_TXQ_INIT - * Initialise txq in pacer with given options or set options - */ -#define MC_CMD_TCM_TXQ_INIT 0xb5 -#undef MC_CMD_0xb5_PRIVILEGE_CTG - -#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_TCM_TXQ_INIT_IN msgrequest */ -#define MC_CMD_TCM_TXQ_INIT_IN_LEN 28 -/* the txq id */ -#define MC_CMD_TCM_TXQ_INIT_IN_QID_OFST 0 -#define MC_CMD_TCM_TXQ_INIT_IN_QID_LEN 4 -/* the static priority associated with the txq */ -#define MC_CMD_TCM_TXQ_INIT_IN_LABEL_OFST 4 -#define MC_CMD_TCM_TXQ_INIT_IN_LABEL_LEN 4 -/* bitmask of the priority queues this txq is inserted into when inserted. */ -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAGS_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAGS_LEN 4 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_LBN 0 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_WIDTH 1 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_LBN 1 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_WIDTH 1 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_LBN 2 -#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_WIDTH 1 -/* the reaction point (RP) bucket */ -#define MC_CMD_TCM_TXQ_INIT_IN_RP_BKT_OFST 12 -#define MC_CMD_TCM_TXQ_INIT_IN_RP_BKT_LEN 4 -/* an already reserved bucket (typically set to bucket associated with outer - * vswitch) - */ -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT1_OFST 16 -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT1_LEN 4 -/* an already reserved bucket (typically set to bucket associated with inner - * vswitch) - */ -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT2_OFST 20 -#define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT2_LEN 4 -/* the min bucket (typically for ETS/minimum bandwidth) */ -#define MC_CMD_TCM_TXQ_INIT_IN_MIN_BKT_OFST 24 -#define MC_CMD_TCM_TXQ_INIT_IN_MIN_BKT_LEN 4 - -/* MC_CMD_TCM_TXQ_INIT_EXT_IN msgrequest */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LEN 32 -/* the txq id */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_QID_OFST 0 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_QID_LEN 4 -/* the static priority associated with the txq */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_NORMAL_OFST 4 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_NORMAL_LEN 4 -/* bitmask of the priority queues this txq is inserted into when inserted. */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAGS_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAGS_LEN 4 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_LBN 0 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_WIDTH 1 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_LBN 1 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_WIDTH 1 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_OFST 8 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_LBN 2 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_WIDTH 1 -/* the reaction point (RP) bucket */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_RP_BKT_OFST 12 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_RP_BKT_LEN 4 -/* an already reserved bucket (typically set to bucket associated with outer - * vswitch) - */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT1_OFST 16 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT1_LEN 4 -/* an already reserved bucket (typically set to bucket associated with inner - * vswitch) - */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT2_OFST 20 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT2_LEN 4 -/* the min bucket (typically for ETS/minimum bandwidth) */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MIN_BKT_OFST 24 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MIN_BKT_LEN 4 -/* the static priority associated with the txq */ -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_GUARANTEED_OFST 28 -#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_GUARANTEED_LEN 4 - -/* MC_CMD_TCM_TXQ_INIT_OUT msgresponse */ -#define MC_CMD_TCM_TXQ_INIT_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_LINK_PIOBUF - * Link a push I/O buffer to a TxQ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 +/* enum: Low latency RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5 +/* enum: Packed stream RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6 +/* enum: RX PD firmware handling layer 2 only for high packet rate performance + * tests (Medford development only) */ -#define MC_CMD_LINK_PIOBUF 0x92 -#undef MC_CMD_0x92_PRIVILEGE_CTG - -#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD - -/* MC_CMD_LINK_PIOBUF_IN msgrequest */ -#define MC_CMD_LINK_PIOBUF_IN_LEN 8 -/* Handle for allocated push I/O buffer. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7 +/* enum: Rules engine RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_RULES_ENGINE 0x8 +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_L3XUDP 0x9 +/* enum: DPDK RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_DPDK 0xa +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe +/* enum: RX PD firmware parsing but not filtering network overlay tunnel + * encapsulations (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_OFST 10 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_LEN 2 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_OFST 10 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_WIDTH 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_OFST 10 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4 +/* enum: reserved value - do not use (may indicate alternative interpretation + * of REV field in future) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_RESERVED 0x0 +/* enum: Trivial TX PD firmware for early Huntington development (Huntington + * development only) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1 +/* enum: TX PD firmware for telemetry prototyping (Medford2 development only) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 +/* enum: TX PD firmware with approximately Siena-compatible behaviour + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2 +/* enum: Full featured TX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_FULL_FEATURED 0x3 +/* enum: (deprecated original name for the FULL_FEATURED variant) */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_VSWITCH 0x3 +/* enum: siena_compat variant TX PD firmware using PM rather than MAC + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */ +/* enum: TX PD firmware handling layer 2 only for high packet rate performance + * tests (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7 +/* enum: Rules engine TX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_RULES_ENGINE 0x8 +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_L3XUDP 0x9 +/* enum: DPDK TX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_DPDK 0xa +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe +/* Hardware capabilities of NIC */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_HW_CAPABILITIES_OFST 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_HW_CAPABILITIES_LEN 4 +/* Licensed capabilities */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LICENSE_CAPABILITIES_OFST 16 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LICENSE_CAPABILITIES_LEN 4 +/* Second word of flags. Not present on older firmware (check the length). */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS2_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS2_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_LBN 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_LBN 2 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_LBN 3 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_LBN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_LBN 5 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN 6 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_LBN 8 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_LBN 9 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_LBN 10 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_LBN 11 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_LBN 18 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_LBN 19 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_LBN 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN 21 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN 21 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_LBN 22 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN 23 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_LBN 24 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_LBN 25 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_LBN 26 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_LBN 28 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_LBN 29 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_LBN 30 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1 +/* Number of FATSOv2 contexts per datapath supported by this NIC (when + * TX_TSO_V2 == 1). Not present on older firmware (check the length). + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2 +/* One byte per PF containing the number of the external port assigned to this + * PF, indexed by PF number. Special values indicate that a PF is either not + * present or not assigned. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST 26 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM 16 +/* enum: The caller is not permitted to access information on this PF. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ACCESS_NOT_PERMITTED 0xff +/* enum: PF does not exist. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_PRESENT 0xfe +/* enum: PF does exist but is not assigned to any external port. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_ASSIGNED 0xfd +/* enum: This value indicates that PF is assigned, but it cannot be expressed + * in this field. It is intended for a possible future situation where a more + * complex scheme of PFs to ports mapping is being used. The future driver + * should look for a new field supporting the new scheme. The current/old + * driver should treat this value as PF_NOT_ASSIGNED. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INCOMPATIBLE_ASSIGNMENT 0xfc +/* One byte per PF containing the number of its VFs, indexed by PF number. A + * special value indicates that a PF is not present. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_OFST 42 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_LEN 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_NUM 16 +/* enum: The caller is not permitted to access information on this PF. */ +/* MC_CMD_GET_CAPABILITIES_V11_OUT_ACCESS_NOT_PERMITTED 0xff */ +/* enum: PF does not exist. */ +/* MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_PRESENT 0xfe */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_OFST 58 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_LEN 2 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_NUM 4 +/* Size of RX descriptor cache expressed as binary logarithm The actual size + * equals (2 ^ RX_DESC_CACHE_SIZE) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DESC_CACHE_SIZE_OFST 66 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DESC_CACHE_SIZE_LEN 1 +/* Size of TX descriptor cache expressed as binary logarithm The actual size + * equals (2 ^ TX_DESC_CACHE_SIZE) + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DESC_CACHE_SIZE_OFST 67 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DESC_CACHE_SIZE_LEN 1 +/* Total number of available PIO buffers */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_PIO_BUFFS_OFST 68 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_PIO_BUFFS_LEN 2 +/* Size of a single PIO buffer */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SIZE_PIO_BUFF_OFST 70 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SIZE_PIO_BUFF_LEN 2 +/* On chips later than Medford the amount of address space assigned to each VI + * is configurable. This is a global setting that the driver must query to + * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available + * with 8k VI windows. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_OFST 72 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_LEN 1 +/* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. + * CTPIO is not mapped. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_8K 0x0 +/* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_16K 0x1 +/* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_64K 0x2 +/* Number of vFIFOs per adapter that can be used for VFIFO Stuffing + * (SF-115995-SW) in the present configuration of firmware and port mode. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST 73 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1 +/* Number of buffers per adapter that can be used for VFIFO Stuffing + * (SF-115995-SW) in the present configuration of firmware and port mode. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST 74 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN 2 +/* Entry count in the MAC stats array, including the final GENERATION_END + * entry. For MAC stats DMA, drivers should allocate a buffer large enough to + * hold at least this many 64-bit stats values, if they wish to receive all + * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the + * stats array returned will be truncated. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_NUM_STATS_OFST 76 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_NUM_STATS_LEN 2 +/* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field + * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_MAX_OFST 80 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_MAX_LEN 4 +/* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in + * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when + * they create an RX queue. Due to hardware limitations, only a small number of + * different buffer sizes may be available concurrently. Nonzero entries in + * this array are the sizes of buffers which the system guarantees will be + * available for use. If the list is empty, there are no limitations on + * concurrent buffer sizes. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST 84 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM 16 +/* Third word of flags. Not present on older firmware (check the length). */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS3_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS3_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_LBN 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN 2 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_LBN 3 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_LBN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN 5 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN 6 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_WIDTH 1 +/* These bits are reserved for communicating test-specific capabilities to + * host-side test software. All production drivers should treat this field as + * opaque. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_OFST 152 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LEN 8 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_OFST 152 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_LBN 1216 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_WIDTH 32 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_OFST 156 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_LBN 1248 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_WIDTH 32 +/* The minimum size (in table entries) of indirection table to be allocated + * from the pool for an RSS context. Note that the table size used must be a + * power of 2. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_OFST 160 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4 +/* The maximum size (in table entries) of indirection table to be allocated + * from the pool for an RSS context. Note that the table size used must be a + * power of 2. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_OFST 164 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4 +/* The maximum number of queues that can be used by an RSS context in exclusive + * mode. In exclusive mode the context has a configurable indirection table and + * a configurable RSS key. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_QUEUES_OFST 168 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4 +/* The maximum number of queues that can be used by an RSS context in even- + * spreading mode. In even-spreading mode the context has no indirection table + * but it does have a configurable RSS key. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_OFST 172 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4 +/* The total number of RSS contexts supported. Note that the number of + * available contexts using indirection tables is also limited by the + * availability of indirection table space allocated from a common pool. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_NUM_CONTEXTS_OFST 176 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_NUM_CONTEXTS_LEN 4 +/* The total amount of indirection table space that can be shared between RSS + * contexts. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_TABLE_POOL_SIZE_OFST 180 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_TABLE_POOL_SIZE_LEN 4 +/* A bitmap of the queue sizes the device can provide, where bit N being set + * indicates that 2**N is a valid size. The device may be limited in the number + * of different queue sizes that can exist simultaneously, so a bit being set + * here does not guarantee that an attempt to create a queue of that size will + * succeed. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SUPPORTED_QUEUE_SIZES_OFST 184 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_SUPPORTED_QUEUE_SIZES_LEN 4 +/* A bitmap of queue sizes that are always available, in the same format as + * SUPPORTED_QUEUE_SIZES. Attempting to create a queue with one of these sizes + * will never fail due to unavailability of the requested size. + */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_QUEUE_SIZES_OFST 188 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_QUEUE_SIZES_LEN 4 +/* Number of available indirect memory maps. */ +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INDIRECT_MAP_INDEX_COUNT_OFST 192 +#define MC_CMD_GET_CAPABILITIES_V11_OUT_INDIRECT_MAP_INDEX_COUNT_LEN 4 + +/* MC_CMD_GET_CAPABILITIES_V12_OUT msgresponse */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LEN 204 +/* First word of flags. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS1_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS1_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_LBN 3 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_LBN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_LBN 5 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_LBN 6 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_LBN 8 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_LBN 9 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN 10 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 11 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_LBN 18 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_LBN 19 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_LBN 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_LBN 21 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_LBN 22 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_LBN 23 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_LBN 24 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_LBN 25 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_LBN 26 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_LBN 27 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_LBN 28 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_LBN 30 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_OFST 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_LBN 31 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_WIDTH 1 +/* RxDPCPU firmware id. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DPCPU_FW_ID_OFST 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DPCPU_FW_ID_LEN 2 +/* enum: Standard RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP 0x0 +/* enum: Low latency RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_LOW_LATENCY 0x1 +/* enum: Packed stream RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_PACKED_STREAM 0x2 +/* enum: Rules engine RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_RULES_ENGINE 0x5 +/* enum: DPDK RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_DPDK 0x6 +/* enum: BIST RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_BIST 0x10a +/* enum: RXDP Test firmware image 1 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101 +/* enum: RXDP Test firmware image 2 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102 +/* enum: RXDP Test firmware image 3 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103 +/* enum: RXDP Test firmware image 4 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104 +/* enum: RXDP Test firmware image 5 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_BACKPRESSURE 0x105 +/* enum: RXDP Test firmware image 6 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106 +/* enum: RXDP Test firmware image 7 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107 +/* enum: RXDP Test firmware image 8 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_DISABLE_DL 0x108 +/* enum: RXDP Test firmware image 9 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_DOORBELL_DELAY 0x10b +/* enum: RXDP Test firmware image 10 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_SLOW 0x10c +/* TxDPCPU firmware id. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DPCPU_FW_ID_OFST 6 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DPCPU_FW_ID_LEN 2 +/* enum: Standard TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP 0x0 +/* enum: Low latency TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_LOW_LATENCY 0x1 +/* enum: High packet rate TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_HIGH_PACKET_RATE 0x3 +/* enum: Rules engine TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_RULES_ENGINE 0x5 +/* enum: DPDK TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_DPDK 0x6 +/* enum: BIST TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_BIST 0x12d +/* enum: TXDP Test firmware image 1 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_TSO_EDIT 0x101 +/* enum: TXDP Test firmware image 2 */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102 +/* enum: TXDP CSR bus test firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_CSR 0x103 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_OFST 8 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_LEN 2 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_OFST 8 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_WIDTH 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_OFST 8 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4 +/* enum: reserved value - do not use (may indicate alternative interpretation + * of REV field in future) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_RESERVED 0x0 +/* enum: Trivial RX PD firmware for early Huntington development (Huntington + * development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1 +/* enum: RX PD firmware for telemetry prototyping (Medford2 development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 +/* enum: RX PD firmware with approximately Siena-compatible behaviour + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2 +/* enum: Full featured RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_FULL_FEATURED 0x3 +/* enum: (deprecated original name for the FULL_FEATURED variant) */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_VSWITCH 0x3 +/* enum: siena_compat variant RX PD firmware using PM rather than MAC + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 +/* enum: Low latency RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5 +/* enum: Packed stream RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6 +/* enum: RX PD firmware handling layer 2 only for high packet rate performance + * tests (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7 +/* enum: Rules engine RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_RULES_ENGINE 0x8 +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_L3XUDP 0x9 +/* enum: DPDK RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_DPDK 0xa +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe +/* enum: RX PD firmware parsing but not filtering network overlay tunnel + * encapsulations (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_OFST 10 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_LEN 2 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_OFST 10 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_WIDTH 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_OFST 10 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4 +/* enum: reserved value - do not use (may indicate alternative interpretation + * of REV field in future) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_RESERVED 0x0 +/* enum: Trivial TX PD firmware for early Huntington development (Huntington + * development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1 +/* enum: TX PD firmware for telemetry prototyping (Medford2 development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1 +/* enum: TX PD firmware with approximately Siena-compatible behaviour + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2 +/* enum: Full featured TX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_FULL_FEATURED 0x3 +/* enum: (deprecated original name for the FULL_FEATURED variant) */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_VSWITCH 0x3 +/* enum: siena_compat variant TX PD firmware using PM rather than MAC + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */ +/* enum: TX PD firmware handling layer 2 only for high packet rate performance + * tests (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7 +/* enum: Rules engine TX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_RULES_ENGINE 0x8 +/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_L3XUDP 0x9 +/* enum: DPDK TX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_DPDK 0xa +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe +/* Hardware capabilities of NIC */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_HW_CAPABILITIES_OFST 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_HW_CAPABILITIES_LEN 4 +/* Licensed capabilities */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LICENSE_CAPABILITIES_OFST 16 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LICENSE_CAPABILITIES_LEN 4 +/* Second word of flags. Not present on older firmware (check the length). */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS2_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS2_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_LBN 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_LBN 2 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_LBN 3 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_LBN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_LBN 5 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN 6 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_LBN 8 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_LBN 9 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_LBN 10 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_LBN 11 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_LBN 18 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_LBN 19 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_LBN 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN 21 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN 21 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_LBN 22 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN 23 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_LBN 24 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_LBN 25 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_LBN 26 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_LBN 28 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_LBN 29 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_LBN 30 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST 20 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1 +/* Number of FATSOv2 contexts per datapath supported by this NIC (when + * TX_TSO_V2 == 1). Not present on older firmware (check the length). + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2 +/* One byte per PF containing the number of the external port assigned to this + * PF, indexed by PF number. Special values indicate that a PF is either not + * present or not assigned. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST 26 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM 16 +/* enum: The caller is not permitted to access information on this PF. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ACCESS_NOT_PERMITTED 0xff +/* enum: PF does not exist. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_PRESENT 0xfe +/* enum: PF does exist but is not assigned to any external port. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_ASSIGNED 0xfd +/* enum: This value indicates that PF is assigned, but it cannot be expressed + * in this field. It is intended for a possible future situation where a more + * complex scheme of PFs to ports mapping is being used. The future driver + * should look for a new field supporting the new scheme. The current/old + * driver should treat this value as PF_NOT_ASSIGNED. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INCOMPATIBLE_ASSIGNMENT 0xfc +/* One byte per PF containing the number of its VFs, indexed by PF number. A + * special value indicates that a PF is not present. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_OFST 42 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_LEN 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_NUM 16 +/* enum: The caller is not permitted to access information on this PF. */ +/* MC_CMD_GET_CAPABILITIES_V12_OUT_ACCESS_NOT_PERMITTED 0xff */ +/* enum: PF does not exist. */ +/* MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_PRESENT 0xfe */ +/* Number of VIs available for external ports 0-3. For devices with more than + * four ports, the remainder are in NUM_VIS_PER_PORT2 in + * GET_CAPABILITIES_V12_OUT. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_OFST 58 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_LEN 2 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_NUM 4 +/* Size of RX descriptor cache expressed as binary logarithm The actual size + * equals (2 ^ RX_DESC_CACHE_SIZE) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DESC_CACHE_SIZE_OFST 66 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DESC_CACHE_SIZE_LEN 1 +/* Size of TX descriptor cache expressed as binary logarithm The actual size + * equals (2 ^ TX_DESC_CACHE_SIZE) + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DESC_CACHE_SIZE_OFST 67 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DESC_CACHE_SIZE_LEN 1 +/* Total number of available PIO buffers */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_PIO_BUFFS_OFST 68 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_PIO_BUFFS_LEN 2 +/* Size of a single PIO buffer */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SIZE_PIO_BUFF_OFST 70 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SIZE_PIO_BUFF_LEN 2 +/* On chips later than Medford the amount of address space assigned to each VI + * is configurable. This is a global setting that the driver must query to + * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available + * with 8k VI windows. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_OFST 72 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_LEN 1 +/* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. + * CTPIO is not mapped. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_8K 0x0 +/* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_16K 0x1 +/* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_64K 0x2 +/* Number of vFIFOs per adapter that can be used for VFIFO Stuffing + * (SF-115995-SW) in the present configuration of firmware and port mode. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST 73 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1 +/* Number of buffers per adapter that can be used for VFIFO Stuffing + * (SF-115995-SW) in the present configuration of firmware and port mode. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST 74 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN 2 +/* Entry count in the MAC stats array, including the final GENERATION_END + * entry. For MAC stats DMA, drivers should allocate a buffer large enough to + * hold at least this many 64-bit stats values, if they wish to receive all + * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the + * stats array returned will be truncated. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_NUM_STATS_OFST 76 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_NUM_STATS_LEN 2 +/* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field + * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_MAX_OFST 80 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_MAX_LEN 4 +/* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in + * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when + * they create an RX queue. Due to hardware limitations, only a small number of + * different buffer sizes may be available concurrently. Nonzero entries in + * this array are the sizes of buffers which the system guarantees will be + * available for use. If the list is empty, there are no limitations on + * concurrent buffer sizes. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST 84 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM 16 +/* Third word of flags. Not present on older firmware (check the length). */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS3_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS3_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_LBN 0 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_LBN 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN 2 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_LBN 3 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_LBN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN 5 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN 6 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_LBN 17 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_WIDTH 1 +/* These bits are reserved for communicating test-specific capabilities to + * host-side test software. All production drivers should treat this field as + * opaque. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_OFST 152 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LEN 8 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_OFST 152 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_LBN 1216 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_WIDTH 32 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_OFST 156 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_LEN 4 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_LBN 1248 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_WIDTH 32 +/* The minimum size (in table entries) of indirection table to be allocated + * from the pool for an RSS context. Note that the table size used must be a + * power of 2. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_OFST 160 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4 +/* The maximum size (in table entries) of indirection table to be allocated + * from the pool for an RSS context. Note that the table size used must be a + * power of 2. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_OFST 164 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4 +/* The maximum number of queues that can be used by an RSS context in exclusive + * mode. In exclusive mode the context has a configurable indirection table and + * a configurable RSS key. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_QUEUES_OFST 168 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4 +/* The maximum number of queues that can be used by an RSS context in even- + * spreading mode. In even-spreading mode the context has no indirection table + * but it does have a configurable RSS key. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_OFST 172 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4 +/* The total number of RSS contexts supported. Note that the number of + * available contexts using indirection tables is also limited by the + * availability of indirection table space allocated from a common pool. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_NUM_CONTEXTS_OFST 176 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_NUM_CONTEXTS_LEN 4 +/* The total amount of indirection table space that can be shared between RSS + * contexts. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_TABLE_POOL_SIZE_OFST 180 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_TABLE_POOL_SIZE_LEN 4 +/* A bitmap of the queue sizes the device can provide, where bit N being set + * indicates that 2**N is a valid size. The device may be limited in the number + * of different queue sizes that can exist simultaneously, so a bit being set + * here does not guarantee that an attempt to create a queue of that size will + * succeed. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SUPPORTED_QUEUE_SIZES_OFST 184 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_SUPPORTED_QUEUE_SIZES_LEN 4 +/* A bitmap of queue sizes that are always available, in the same format as + * SUPPORTED_QUEUE_SIZES. Attempting to create a queue with one of these sizes + * will never fail due to unavailability of the requested size. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_QUEUE_SIZES_OFST 188 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_QUEUE_SIZES_LEN 4 +/* Number of available indirect memory maps. */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INDIRECT_MAP_INDEX_COUNT_OFST 192 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_INDIRECT_MAP_INDEX_COUNT_LEN 4 +/* Number of VIs available for external ports 4-7. Information for ports 0-3 is + * in NUM_VIS_PER_PORT in GET_CAPABILITIES_V2_OUT. + */ +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_OFST 196 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_LEN 2 +#define MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_NUM 4 + + +/***********************************/ +/* MC_CMD_V2_EXTN + * Encapsulation for a v2 extended command + */ +#define MC_CMD_V2_EXTN 0x7f + +/* MC_CMD_V2_EXTN_IN msgrequest */ +#define MC_CMD_V2_EXTN_IN_LEN 4 +/* the extended command number */ +#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_LBN 0 +#define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_WIDTH 15 +#define MC_CMD_V2_EXTN_IN_UNUSED_LBN 15 +#define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH 1 +/* the actual length of the encapsulated command (which is not in the v1 + * header) + */ +#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_LBN 16 +#define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_WIDTH 10 +#define MC_CMD_V2_EXTN_IN_UNUSED2_LBN 26 +#define MC_CMD_V2_EXTN_IN_UNUSED2_WIDTH 2 +/* Type of command/response */ +#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_LBN 28 +#define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH 4 +/* enum: MCDI command directed to or response originating from the MC. */ +#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_MC 0x0 +/* enum: MCDI command directed to a TSA controller. MCDI responses of this type + * are not defined. + */ +#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1 +/* enum: MCDI command used for platform management. Typically, these commands + * are used for low-level operations directed at the platform as a whole (e.g. + * MMIO device enumeration) rather than individual functions and use a + * dedicated comms channel (e.g. RPmsg/IPI). May be handled by the same or + * different CPU as MCDI_MESSAGE_TYPE_MC. + */ +#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_PLATFORM 0x2 + + +/***********************************/ +/* MC_CMD_LINK_PIOBUF + * Link a push I/O buffer to a TxQ + */ +#define MC_CMD_LINK_PIOBUF 0x92 +#undef MC_CMD_0x92_PRIVILEGE_CTG + +#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD + +/* MC_CMD_LINK_PIOBUF_IN msgrequest */ +#define MC_CMD_LINK_PIOBUF_IN_LEN 8 +/* Handle for allocated push I/O buffer. */ #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0 #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4 /* Function Local Instance (VI) number which has a TxQ allocated to it. */ @@ -18739,27 +19458,6 @@ #define MC_CMD_VSWITCH_FREE_OUT_LEN 0 -/***********************************/ -/* MC_CMD_VSWITCH_QUERY - * read some config of v-switch. For now this command is an empty placeholder. - * It may be used to check if a v-switch is connected to a given EVB port (if - * not, then the command returns ENOENT). - */ -#define MC_CMD_VSWITCH_QUERY 0x63 -#undef MC_CMD_0x63_PRIVILEGE_CTG - -#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_VSWITCH_QUERY_IN msgrequest */ -#define MC_CMD_VSWITCH_QUERY_IN_LEN 4 -/* The port to which the v-switch is connected. */ -#define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_OFST 0 -#define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_LEN 4 - -/* MC_CMD_VSWITCH_QUERY_OUT msgresponse */ -#define MC_CMD_VSWITCH_QUERY_OUT_LEN 0 - - /***********************************/ /* MC_CMD_VPORT_ALLOC * allocate a v-port. @@ -18935,28 +19633,6 @@ #define MC_CMD_VADAPTOR_SET_MAC_OUT_LEN 0 -/***********************************/ -/* MC_CMD_VADAPTOR_GET_MAC - * read the MAC address assigned to a v-adaptor. - */ -#define MC_CMD_VADAPTOR_GET_MAC 0x5e -#undef MC_CMD_0x5e_PRIVILEGE_CTG - -#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_VADAPTOR_GET_MAC_IN msgrequest */ -#define MC_CMD_VADAPTOR_GET_MAC_IN_LEN 4 -/* The port to which the v-adaptor is connected. */ -#define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_OFST 0 -#define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_LEN 4 - -/* MC_CMD_VADAPTOR_GET_MAC_OUT msgresponse */ -#define MC_CMD_VADAPTOR_GET_MAC_OUT_LEN 6 -/* The MAC address assigned to this v-adaptor */ -#define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_OFST 0 -#define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_LEN 6 - - /***********************************/ /* MC_CMD_VADAPTOR_QUERY * read some config of v-adaptor. @@ -19013,86 +19689,6 @@ #define MC_CMD_EVB_PORT_ASSIGN_OUT_LEN 0 -/***********************************/ -/* MC_CMD_RDWR_A64_REGIONS - * Assign the 64 bit region addresses. - */ -#define MC_CMD_RDWR_A64_REGIONS 0x9b -#undef MC_CMD_0x9b_PRIVILEGE_CTG - -#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_RDWR_A64_REGIONS_IN msgrequest */ -#define MC_CMD_RDWR_A64_REGIONS_IN_LEN 17 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_OFST 0 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_LEN 4 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_OFST 4 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_LEN 4 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_OFST 8 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_LEN 4 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_OFST 12 -#define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_LEN 4 -/* Write enable bits 0-3, set to write, clear to read. */ -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_LBN 128 -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_WIDTH 4 -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_OFST 16 -#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_LEN 1 - -/* MC_CMD_RDWR_A64_REGIONS_OUT msgresponse: This data always included - * regardless of state of write bits in the request. - */ -#define MC_CMD_RDWR_A64_REGIONS_OUT_LEN 16 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_OFST 0 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_LEN 4 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_OFST 4 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_LEN 4 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_OFST 8 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_LEN 4 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_OFST 12 -#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_LEN 4 - - -/***********************************/ -/* MC_CMD_ONLOAD_STACK_ALLOC - * Allocate an Onload stack ID. - */ -#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c -#undef MC_CMD_0x9c_PRIVILEGE_CTG - -#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD - -/* MC_CMD_ONLOAD_STACK_ALLOC_IN msgrequest */ -#define MC_CMD_ONLOAD_STACK_ALLOC_IN_LEN 4 -/* The handle of the owning upstream port */ -#define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 -#define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4 - -/* MC_CMD_ONLOAD_STACK_ALLOC_OUT msgresponse */ -#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_LEN 4 -/* The handle of the new Onload stack */ -#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_OFST 0 -#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_LEN 4 - - -/***********************************/ -/* MC_CMD_ONLOAD_STACK_FREE - * Free an Onload stack ID. - */ -#define MC_CMD_ONLOAD_STACK_FREE 0x9d -#undef MC_CMD_0x9d_PRIVILEGE_CTG - -#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD - -/* MC_CMD_ONLOAD_STACK_FREE_IN msgrequest */ -#define MC_CMD_ONLOAD_STACK_FREE_IN_LEN 4 -/* The handle of the Onload stack */ -#define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_OFST 0 -#define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_LEN 4 - -/* MC_CMD_ONLOAD_STACK_FREE_OUT msgresponse */ -#define MC_CMD_ONLOAD_STACK_FREE_OUT_LEN 0 - - /***********************************/ /* MC_CMD_RSS_CONTEXT_ALLOC * Allocate an RSS context. @@ -19304,93 +19900,6 @@ #define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_LEN 128 -/***********************************/ -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE - * Write a portion of a selectable-size indirection table for an RSS context. - * This command must be used instead of MC_CMD_RSS_CONTEXT_SET_TABLE if the - * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES. - */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e -#undef MC_CMD_0x13e_PRIVILEGE_CTG - -#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN msgrequest */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMIN 8 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX 252 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX_MCDI2 1020 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LEN(num) (4+4*(num)) -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_NUM(len) (((len)-4)/4) -/* The handle of the RSS context */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_OFST 0 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_LEN 4 -/* An array of index-value pairs to be written to the table. Structure is - * MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY. - */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_OFST 4 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_LEN 4 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MINNUM 1 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM 62 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM_MCDI2 254 - -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT msgresponse */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT_LEN 0 - -/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY structuredef */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_LEN 4 -/* The index of the table entry to be written. */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_OFST 0 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LEN 2 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LBN 0 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_WIDTH 16 -/* The value to write into the table entry. */ -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_OFST 2 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LEN 2 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LBN 16 -#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_WIDTH 16 - - -/***********************************/ -/* MC_CMD_RSS_CONTEXT_READ_TABLE - * Read a portion of a selectable-size indirection table for an RSS context. - * This command must be used instead of MC_CMD_RSS_CONTEXT_GET_TABLE if the - * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES. - */ -#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f -#undef MC_CMD_0x13f_PRIVILEGE_CTG - -#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_RSS_CONTEXT_READ_TABLE_IN msgrequest */ -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMIN 6 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX 252 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX_MCDI2 1020 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LEN(num) (4+2*(num)) -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_NUM(len) (((len)-4)/2) -/* The handle of the RSS context */ -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_OFST 0 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_LEN 4 -/* An array containing the indices of the entries to be read. */ -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_OFST 4 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_LEN 2 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MINNUM 1 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM 124 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM_MCDI2 508 - -/* MC_CMD_RSS_CONTEXT_READ_TABLE_OUT msgresponse */ -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMIN 2 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX 252 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LEN(num) (0+2*(num)) -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_NUM(len) (((len)-0)/2) -/* A buffer containing the requested entries read from the table. */ -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_OFST 0 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_LEN 2 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MINNUM 1 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM 126 -#define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM_MCDI2 510 - - /***********************************/ /* MC_CMD_RSS_CONTEXT_SET_FLAGS * Set various control flags for an RSS context. @@ -19524,158 +20033,6 @@ #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_WIDTH 4 -/***********************************/ -/* MC_CMD_DOT1P_MAPPING_ALLOC - * Allocate a .1p mapping. - */ -#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4 -#undef MC_CMD_0xa4_PRIVILEGE_CTG - -#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DOT1P_MAPPING_ALLOC_IN msgrequest */ -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_LEN 8 -/* The handle of the owning upstream port */ -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4 -/* Number of queues spanned by this mapping, in the range 1-64; valid fixed - * offsets in the mapping table will be in the range 0 to NUM_QUEUES-1, and - * referenced RSS contexts must span no more than this number. - */ -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_NUM_QUEUES_OFST 4 -#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_NUM_QUEUES_LEN 4 - -/* MC_CMD_DOT1P_MAPPING_ALLOC_OUT msgresponse */ -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_LEN 4 -/* The handle of the new .1p mapping. This should be considered opaque to the - * host, although a value of 0xFFFFFFFF is guaranteed never to be a valid - * handle. - */ -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_OFST 0 -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_LEN 4 -/* enum: guaranteed invalid .1p mapping handle value */ -#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_INVALID 0xffffffff - - -/***********************************/ -/* MC_CMD_DOT1P_MAPPING_FREE - * Free a .1p mapping. - */ -#define MC_CMD_DOT1P_MAPPING_FREE 0xa5 -#undef MC_CMD_0xa5_PRIVILEGE_CTG - -#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DOT1P_MAPPING_FREE_IN msgrequest */ -#define MC_CMD_DOT1P_MAPPING_FREE_IN_LEN 4 -/* The handle of the .1p mapping */ -#define MC_CMD_DOT1P_MAPPING_FREE_IN_DOT1P_MAPPING_ID_OFST 0 -#define MC_CMD_DOT1P_MAPPING_FREE_IN_DOT1P_MAPPING_ID_LEN 4 - -/* MC_CMD_DOT1P_MAPPING_FREE_OUT msgresponse */ -#define MC_CMD_DOT1P_MAPPING_FREE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_DOT1P_MAPPING_SET_TABLE - * Set the mapping table for a .1p mapping. - */ -#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6 -#undef MC_CMD_0xa6_PRIVILEGE_CTG - -#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DOT1P_MAPPING_SET_TABLE_IN msgrequest */ -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_LEN 36 -/* The handle of the .1p mapping */ -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0 -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_DOT1P_MAPPING_ID_LEN 4 -/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context - * handle) - */ -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_OFST 4 -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_LEN 32 - -/* MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT msgresponse */ -#define MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_DOT1P_MAPPING_GET_TABLE - * Get the mapping table for a .1p mapping. - */ -#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7 -#undef MC_CMD_0xa7_PRIVILEGE_CTG - -#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DOT1P_MAPPING_GET_TABLE_IN msgrequest */ -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_LEN 4 -/* The handle of the .1p mapping */ -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0 -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_DOT1P_MAPPING_ID_LEN 4 - -/* MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT msgresponse */ -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_LEN 36 -/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context - * handle) - */ -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_OFST 4 -#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_LEN 32 - - -/***********************************/ -/* MC_CMD_GET_VECTOR_CFG - * Get Interrupt Vector config for this PF. - */ -#define MC_CMD_GET_VECTOR_CFG 0xbf -#undef MC_CMD_0xbf_PRIVILEGE_CTG - -#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_VECTOR_CFG_IN msgrequest */ -#define MC_CMD_GET_VECTOR_CFG_IN_LEN 0 - -/* MC_CMD_GET_VECTOR_CFG_OUT msgresponse */ -#define MC_CMD_GET_VECTOR_CFG_OUT_LEN 12 -/* Base absolute interrupt vector number. */ -#define MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_OFST 0 -#define MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_LEN 4 -/* Number of interrupt vectors allocate to this PF. */ -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_OFST 4 -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_LEN 4 -/* Number of interrupt vectors to allocate per VF. */ -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_OFST 8 -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_LEN 4 - - -/***********************************/ -/* MC_CMD_SET_VECTOR_CFG - * Set Interrupt Vector config for this PF. - */ -#define MC_CMD_SET_VECTOR_CFG 0xc0 -#undef MC_CMD_0xc0_PRIVILEGE_CTG - -#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_SET_VECTOR_CFG_IN msgrequest */ -#define MC_CMD_SET_VECTOR_CFG_IN_LEN 12 -/* Base absolute interrupt vector number, or MC_CMD_RESOURCE_INSTANCE_ANY to - * let the system find a suitable base. - */ -#define MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_OFST 0 -#define MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_LEN 4 -/* Number of interrupt vectors allocate to this PF. */ -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_OFST 4 -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_LEN 4 -/* Number of interrupt vectors to allocate per VF. */ -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_OFST 8 -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_LEN 4 - -/* MC_CMD_SET_VECTOR_CFG_OUT msgresponse */ -#define MC_CMD_SET_VECTOR_CFG_OUT_LEN 0 - - /***********************************/ /* MC_CMD_VPORT_ADD_MAC_ADDRESS * Add a MAC address to a v-port @@ -19809,124 +20166,6 @@ #define MC_CMD_VPORT_RECONFIGURE_OUT_RESET_DONE_WIDTH 1 -/***********************************/ -/* MC_CMD_EVB_PORT_QUERY - * read some config of v-port. - */ -#define MC_CMD_EVB_PORT_QUERY 0x62 -#undef MC_CMD_0x62_PRIVILEGE_CTG - -#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_EVB_PORT_QUERY_IN msgrequest */ -#define MC_CMD_EVB_PORT_QUERY_IN_LEN 4 -/* The handle of the v-port */ -#define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_OFST 0 -#define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_LEN 4 - -/* MC_CMD_EVB_PORT_QUERY_OUT msgresponse */ -#define MC_CMD_EVB_PORT_QUERY_OUT_LEN 8 -/* The EVB port flags as defined at MC_CMD_VPORT_ALLOC. */ -#define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_OFST 0 -#define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_LEN 4 -/* The number of VLAN tags that may be used on a v-adaptor connected to this - * EVB port. - */ -#define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_OFST 4 -#define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN 4 - - -/***********************************/ -/* MC_CMD_DUMP_BUFTBL_ENTRIES - * Dump buffer table entries, mainly for command client debug use. Dumps - * absolute entries, and does not use chunk handles. All entries must be in - * range, and used for q page mapping, Although the latter restriction may be - * lifted in future. - */ -#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab -#undef MC_CMD_0xab_PRIVILEGE_CTG - -#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_DUMP_BUFTBL_ENTRIES_IN msgrequest */ -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_LEN 8 -/* Index of the first buffer table entry. */ -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_FIRSTID_OFST 0 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4 -/* Number of buffer table entries to dump. */ -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 4 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4 - -/* MC_CMD_DUMP_BUFTBL_ENTRIES_OUT msgresponse */ -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMIN 12 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX 252 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LEN(num) (0+12*(num)) -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_NUM(len) (((len)-0)/12) -/* Raw buffer table entries, layed out as BUFTBL_ENTRY. */ -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_OFST 0 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_LEN 12 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MINNUM 1 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM 21 -#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM_MCDI2 85 - - -/***********************************/ -/* MC_CMD_SET_RXDP_CONFIG - * Set global RXDP configuration settings - */ -#define MC_CMD_SET_RXDP_CONFIG 0xc1 -#undef MC_CMD_0xc1_PRIVILEGE_CTG - -#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SET_RXDP_CONFIG_IN msgrequest */ -#define MC_CMD_SET_RXDP_CONFIG_IN_LEN 4 -#define MC_CMD_SET_RXDP_CONFIG_IN_DATA_OFST 0 -#define MC_CMD_SET_RXDP_CONFIG_IN_DATA_LEN 4 -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_OFST 0 -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_LBN 0 -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_WIDTH 1 -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_OFST 0 -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_LBN 1 -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_WIDTH 2 -/* enum: pad to 64 bytes */ -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64 0x0 -/* enum: pad to 128 bytes (Medford only) */ -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128 0x1 -/* enum: pad to 256 bytes (Medford only) */ -#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256 0x2 - -/* MC_CMD_SET_RXDP_CONFIG_OUT msgresponse */ -#define MC_CMD_SET_RXDP_CONFIG_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_GET_RXDP_CONFIG - * Get global RXDP configuration settings - */ -#define MC_CMD_GET_RXDP_CONFIG 0xc2 -#undef MC_CMD_0xc2_PRIVILEGE_CTG - -#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_RXDP_CONFIG_IN msgrequest */ -#define MC_CMD_GET_RXDP_CONFIG_IN_LEN 0 - -/* MC_CMD_GET_RXDP_CONFIG_OUT msgresponse */ -#define MC_CMD_GET_RXDP_CONFIG_OUT_LEN 4 -#define MC_CMD_GET_RXDP_CONFIG_OUT_DATA_OFST 0 -#define MC_CMD_GET_RXDP_CONFIG_OUT_DATA_LEN 4 -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_OFST 0 -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_LBN 0 -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_WIDTH 1 -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_OFST 0 -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_LBN 1 -#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_WIDTH 2 -/* Enum values, see field(s): */ -/* MC_CMD_SET_RXDP_CONFIG/MC_CMD_SET_RXDP_CONFIG_IN/PAD_HOST_LEN */ - - /***********************************/ /* MC_CMD_GET_CLOCK * Return the system and PDCPU clock frequencies. @@ -19949,210 +20188,6 @@ #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_LEN 4 -/***********************************/ -/* MC_CMD_SET_CLOCK - * Control the system and DPCPU clock frequencies. Changes are lost reboot. - */ -#define MC_CMD_SET_CLOCK 0xad -#undef MC_CMD_0xad_PRIVILEGE_CTG - -#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_SET_CLOCK_IN msgrequest */ -#define MC_CMD_SET_CLOCK_IN_LEN 28 -/* Requested frequency in MHz for system clock domain */ -#define MC_CMD_SET_CLOCK_IN_SYS_FREQ_OFST 0 -#define MC_CMD_SET_CLOCK_IN_SYS_FREQ_LEN 4 -/* enum: Leave the system clock domain frequency unchanged */ -#define MC_CMD_SET_CLOCK_IN_SYS_DOMAIN_DONT_CHANGE 0x0 -/* Requested frequency in MHz for inter-core clock domain */ -#define MC_CMD_SET_CLOCK_IN_ICORE_FREQ_OFST 4 -#define MC_CMD_SET_CLOCK_IN_ICORE_FREQ_LEN 4 -/* enum: Leave the inter-core clock domain frequency unchanged */ -#define MC_CMD_SET_CLOCK_IN_ICORE_DOMAIN_DONT_CHANGE 0x0 -/* Requested frequency in MHz for DPCPU clock domain */ -#define MC_CMD_SET_CLOCK_IN_DPCPU_FREQ_OFST 8 -#define MC_CMD_SET_CLOCK_IN_DPCPU_FREQ_LEN 4 -/* enum: Leave the DPCPU clock domain frequency unchanged */ -#define MC_CMD_SET_CLOCK_IN_DPCPU_DOMAIN_DONT_CHANGE 0x0 -/* Requested frequency in MHz for PCS clock domain */ -#define MC_CMD_SET_CLOCK_IN_PCS_FREQ_OFST 12 -#define MC_CMD_SET_CLOCK_IN_PCS_FREQ_LEN 4 -/* enum: Leave the PCS clock domain frequency unchanged */ -#define MC_CMD_SET_CLOCK_IN_PCS_DOMAIN_DONT_CHANGE 0x0 -/* Requested frequency in MHz for MC clock domain */ -#define MC_CMD_SET_CLOCK_IN_MC_FREQ_OFST 16 -#define MC_CMD_SET_CLOCK_IN_MC_FREQ_LEN 4 -/* enum: Leave the MC clock domain frequency unchanged */ -#define MC_CMD_SET_CLOCK_IN_MC_DOMAIN_DONT_CHANGE 0x0 -/* Requested frequency in MHz for rmon clock domain */ -#define MC_CMD_SET_CLOCK_IN_RMON_FREQ_OFST 20 -#define MC_CMD_SET_CLOCK_IN_RMON_FREQ_LEN 4 -/* enum: Leave the rmon clock domain frequency unchanged */ -#define MC_CMD_SET_CLOCK_IN_RMON_DOMAIN_DONT_CHANGE 0x0 -/* Requested frequency in MHz for vswitch clock domain */ -#define MC_CMD_SET_CLOCK_IN_VSWITCH_FREQ_OFST 24 -#define MC_CMD_SET_CLOCK_IN_VSWITCH_FREQ_LEN 4 -/* enum: Leave the vswitch clock domain frequency unchanged */ -#define MC_CMD_SET_CLOCK_IN_VSWITCH_DOMAIN_DONT_CHANGE 0x0 - -/* MC_CMD_SET_CLOCK_OUT msgresponse */ -#define MC_CMD_SET_CLOCK_OUT_LEN 28 -/* Resulting system frequency in MHz */ -#define MC_CMD_SET_CLOCK_OUT_SYS_FREQ_OFST 0 -#define MC_CMD_SET_CLOCK_OUT_SYS_FREQ_LEN 4 -/* enum: The system clock domain doesn't exist */ -#define MC_CMD_SET_CLOCK_OUT_SYS_DOMAIN_UNSUPPORTED 0x0 -/* Resulting inter-core frequency in MHz */ -#define MC_CMD_SET_CLOCK_OUT_ICORE_FREQ_OFST 4 -#define MC_CMD_SET_CLOCK_OUT_ICORE_FREQ_LEN 4 -/* enum: The inter-core clock domain doesn't exist / isn't used */ -#define MC_CMD_SET_CLOCK_OUT_ICORE_DOMAIN_UNSUPPORTED 0x0 -/* Resulting DPCPU frequency in MHz */ -#define MC_CMD_SET_CLOCK_OUT_DPCPU_FREQ_OFST 8 -#define MC_CMD_SET_CLOCK_OUT_DPCPU_FREQ_LEN 4 -/* enum: The dpcpu clock domain doesn't exist */ -#define MC_CMD_SET_CLOCK_OUT_DPCPU_DOMAIN_UNSUPPORTED 0x0 -/* Resulting PCS frequency in MHz */ -#define MC_CMD_SET_CLOCK_OUT_PCS_FREQ_OFST 12 -#define MC_CMD_SET_CLOCK_OUT_PCS_FREQ_LEN 4 -/* enum: The PCS clock domain doesn't exist / isn't controlled */ -#define MC_CMD_SET_CLOCK_OUT_PCS_DOMAIN_UNSUPPORTED 0x0 -/* Resulting MC frequency in MHz */ -#define MC_CMD_SET_CLOCK_OUT_MC_FREQ_OFST 16 -#define MC_CMD_SET_CLOCK_OUT_MC_FREQ_LEN 4 -/* enum: The MC clock domain doesn't exist / isn't controlled */ -#define MC_CMD_SET_CLOCK_OUT_MC_DOMAIN_UNSUPPORTED 0x0 -/* Resulting rmon frequency in MHz */ -#define MC_CMD_SET_CLOCK_OUT_RMON_FREQ_OFST 20 -#define MC_CMD_SET_CLOCK_OUT_RMON_FREQ_LEN 4 -/* enum: The rmon clock domain doesn't exist / isn't controlled */ -#define MC_CMD_SET_CLOCK_OUT_RMON_DOMAIN_UNSUPPORTED 0x0 -/* Resulting vswitch frequency in MHz */ -#define MC_CMD_SET_CLOCK_OUT_VSWITCH_FREQ_OFST 24 -#define MC_CMD_SET_CLOCK_OUT_VSWITCH_FREQ_LEN 4 -/* enum: The vswitch clock domain doesn't exist / isn't controlled */ -#define MC_CMD_SET_CLOCK_OUT_VSWITCH_DOMAIN_UNSUPPORTED 0x0 - - -/***********************************/ -/* MC_CMD_DPCPU_RPC - * Send an arbitrary DPCPU message. - */ -#define MC_CMD_DPCPU_RPC 0xae -#undef MC_CMD_0xae_PRIVILEGE_CTG - -#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_DPCPU_RPC_IN msgrequest */ -#define MC_CMD_DPCPU_RPC_IN_LEN 36 -#define MC_CMD_DPCPU_RPC_IN_CPU_OFST 0 -#define MC_CMD_DPCPU_RPC_IN_CPU_LEN 4 -/* enum: RxDPCPU0 */ -#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX0 0x0 -/* enum: TxDPCPU0 */ -#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX0 0x1 -/* enum: TxDPCPU1 */ -#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX1 0x2 -/* enum: RxDPCPU1 (Medford only) */ -#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX1 0x3 -/* enum: RxDPCPU (will be for the calling function; for now, just an alias of - * DPCPU_RX0) - */ -#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX 0x80 -/* enum: TxDPCPU (will be for the calling function; for now, just an alias of - * DPCPU_TX0) - */ -#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX 0x81 -/* First 8 bits [39:32] of DATA are consumed by MC-DPCPU protocol and must be - * initialised to zero - */ -#define MC_CMD_DPCPU_RPC_IN_DATA_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_DATA_LEN 32 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_LBN 8 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_WIDTH 8 -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_READ 0x6 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_WRITE 0x7 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_SELF_TEST 0xc /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_CSR_ACCESS 0xe /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_READ 0x46 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_WRITE 0x47 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SELF_TEST 0x4a /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_CSR_ACCESS 0x4c /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SET_MC_REPLAY_CNTXT 0x4d /* enum */ -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_LBN 16 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_LBN 16 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_LBN 48 -#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_LBN 16 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_WIDTH 240 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_LBN 16 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_STOP_RETURN_RESULT 0x0 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_READ 0x1 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE 0x2 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE_READ 0x3 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_PIPELINED_READ 0x4 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_LBN 48 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_LBN 64 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_LBN 80 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_LBN 16 -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_CUT_THROUGH 0x1 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD 0x2 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD_FIRST 0x3 /* enum */ -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_OFST 4 -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_LBN 64 -#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_WIDTH 16 -#define MC_CMD_DPCPU_RPC_IN_WDATA_OFST 12 -#define MC_CMD_DPCPU_RPC_IN_WDATA_LEN 24 -/* Register data to write. Only valid in write/write-read. */ -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_DATA_OFST 16 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_DATA_LEN 4 -/* Register address. */ -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_ADDRESS_OFST 20 -#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_ADDRESS_LEN 4 - -/* MC_CMD_DPCPU_RPC_OUT msgresponse */ -#define MC_CMD_DPCPU_RPC_OUT_LEN 36 -#define MC_CMD_DPCPU_RPC_OUT_RC_OFST 0 -#define MC_CMD_DPCPU_RPC_OUT_RC_LEN 4 -/* DATA */ -#define MC_CMD_DPCPU_RPC_OUT_DATA_OFST 4 -#define MC_CMD_DPCPU_RPC_OUT_DATA_LEN 32 -#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_OFST 4 -#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_LBN 32 -#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_WIDTH 16 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_OFST 4 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_LBN 48 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_WIDTH 16 -#define MC_CMD_DPCPU_RPC_OUT_RDATA_OFST 12 -#define MC_CMD_DPCPU_RPC_OUT_RDATA_LEN 24 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_1_OFST 12 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_1_LEN 4 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_2_OFST 16 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_2_LEN 4 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_3_OFST 20 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_3_LEN 4 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_4_OFST 24 -#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_4_LEN 4 - - /***********************************/ /* MC_CMD_TRIGGER_INTERRUPT * Trigger an interrupt by prodding the BIU. @@ -20172,66 +20207,6 @@ #define MC_CMD_TRIGGER_INTERRUPT_OUT_LEN 0 -/***********************************/ -/* MC_CMD_SHMBOOT_OP - * Special operations to support (for now) shmboot. - */ -#define MC_CMD_SHMBOOT_OP 0xe6 -#undef MC_CMD_0xe6_PRIVILEGE_CTG - -#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SHMBOOT_OP_IN msgrequest */ -#define MC_CMD_SHMBOOT_OP_IN_LEN 4 -/* Identifies the operation to perform */ -#define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_OFST 0 -#define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_LEN 4 -/* enum: Copy slave_data section to the slave core. (Greenport only) */ -#define MC_CMD_SHMBOOT_OP_IN_PUSH_SLAVE_DATA 0x0 - -/* MC_CMD_SHMBOOT_OP_OUT msgresponse */ -#define MC_CMD_SHMBOOT_OP_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_CAP_BLK_READ - * Read multiple 64bit words from capture block memory - */ -#define MC_CMD_CAP_BLK_READ 0xe7 -#undef MC_CMD_0xe7_PRIVILEGE_CTG - -#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_CAP_BLK_READ_IN msgrequest */ -#define MC_CMD_CAP_BLK_READ_IN_LEN 12 -#define MC_CMD_CAP_BLK_READ_IN_CAP_REG_OFST 0 -#define MC_CMD_CAP_BLK_READ_IN_CAP_REG_LEN 4 -#define MC_CMD_CAP_BLK_READ_IN_ADDR_OFST 4 -#define MC_CMD_CAP_BLK_READ_IN_ADDR_LEN 4 -#define MC_CMD_CAP_BLK_READ_IN_COUNT_OFST 8 -#define MC_CMD_CAP_BLK_READ_IN_COUNT_LEN 4 - -/* MC_CMD_CAP_BLK_READ_OUT msgresponse */ -#define MC_CMD_CAP_BLK_READ_OUT_LENMIN 8 -#define MC_CMD_CAP_BLK_READ_OUT_LENMAX 248 -#define MC_CMD_CAP_BLK_READ_OUT_LENMAX_MCDI2 1016 -#define MC_CMD_CAP_BLK_READ_OUT_LEN(num) (0+8*(num)) -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_NUM(len) (((len)-0)/8) -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31 -#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127 - - /***********************************/ /* MC_CMD_DUMP_DO * Take a dump of the DUT state @@ -20379,34 +20354,6 @@ #define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_SIZE_LEN 4 -/***********************************/ -/* MC_CMD_SET_PSU - * Adjusts power supply parameters. This is a warranty-voiding operation. - * Returns: ENOENT if the parameter or rail specified does not exist, EINVAL if - * the parameter is out of range. - */ -#define MC_CMD_SET_PSU 0xea -#undef MC_CMD_0xea_PRIVILEGE_CTG - -#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_SET_PSU_IN msgrequest */ -#define MC_CMD_SET_PSU_IN_LEN 12 -#define MC_CMD_SET_PSU_IN_PARAM_OFST 0 -#define MC_CMD_SET_PSU_IN_PARAM_LEN 4 -#define MC_CMD_SET_PSU_IN_PARAM_SUPPLY_VOLTAGE 0x0 /* enum */ -#define MC_CMD_SET_PSU_IN_RAIL_OFST 4 -#define MC_CMD_SET_PSU_IN_RAIL_LEN 4 -#define MC_CMD_SET_PSU_IN_RAIL_0V9 0x0 /* enum */ -#define MC_CMD_SET_PSU_IN_RAIL_1V2 0x1 /* enum */ -/* desired value, eg voltage in mV */ -#define MC_CMD_SET_PSU_IN_VALUE_OFST 8 -#define MC_CMD_SET_PSU_IN_VALUE_LEN 4 - -/* MC_CMD_SET_PSU_OUT msgresponse */ -#define MC_CMD_SET_PSU_OUT_LEN 0 - - /***********************************/ /* MC_CMD_GET_FUNCTION_INFO * Get function information. PF and VF number. @@ -20448,7 +20395,7 @@ #define MC_CMD_ENABLE_OFFLINE_BIST 0xed #undef MC_CMD_0xed_PRIVILEGE_CTG -#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN +#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND /* MC_CMD_ENABLE_OFFLINE_BIST_IN msgrequest */ #define MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN 0 @@ -20457,130 +20404,6 @@ #define MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN 0 -/***********************************/ -/* MC_CMD_UART_SEND_DATA - * Send checksummed[sic] block of data over the uart. Response is a placeholder - * should we wish to make this reliable; currently requests are fire-and- - * forget. - */ -#define MC_CMD_UART_SEND_DATA 0xee -#undef MC_CMD_0xee_PRIVILEGE_CTG - -#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_UART_SEND_DATA_OUT msgrequest */ -#define MC_CMD_UART_SEND_DATA_OUT_LENMIN 16 -#define MC_CMD_UART_SEND_DATA_OUT_LENMAX 252 -#define MC_CMD_UART_SEND_DATA_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_UART_SEND_DATA_OUT_LEN(num) (16+1*(num)) -#define MC_CMD_UART_SEND_DATA_OUT_DATA_NUM(len) (((len)-16)/1) -/* CRC32 over OFFSET, LENGTH, RESERVED, DATA */ -#define MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_OFST 0 -#define MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_LEN 4 -/* Offset at which to write the data */ -#define MC_CMD_UART_SEND_DATA_OUT_OFFSET_OFST 4 -#define MC_CMD_UART_SEND_DATA_OUT_OFFSET_LEN 4 -/* Length of data */ -#define MC_CMD_UART_SEND_DATA_OUT_LENGTH_OFST 8 -#define MC_CMD_UART_SEND_DATA_OUT_LENGTH_LEN 4 -/* Reserved for future use */ -#define MC_CMD_UART_SEND_DATA_OUT_RESERVED_OFST 12 -#define MC_CMD_UART_SEND_DATA_OUT_RESERVED_LEN 4 -#define MC_CMD_UART_SEND_DATA_OUT_DATA_OFST 16 -#define MC_CMD_UART_SEND_DATA_OUT_DATA_LEN 1 -#define MC_CMD_UART_SEND_DATA_OUT_DATA_MINNUM 0 -#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM 236 -#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM_MCDI2 1004 - -/* MC_CMD_UART_SEND_DATA_IN msgresponse */ -#define MC_CMD_UART_SEND_DATA_IN_LEN 0 - - -/***********************************/ -/* MC_CMD_UART_RECV_DATA - * Request checksummed[sic] block of data over the uart. Only a placeholder, - * subject to change and not currently implemented. - */ -#define MC_CMD_UART_RECV_DATA 0xef -#undef MC_CMD_0xef_PRIVILEGE_CTG - -#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_UART_RECV_DATA_OUT msgrequest */ -#define MC_CMD_UART_RECV_DATA_OUT_LEN 16 -/* CRC32 over OFFSET, LENGTH, RESERVED */ -#define MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_OFST 0 -#define MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_LEN 4 -/* Offset from which to read the data */ -#define MC_CMD_UART_RECV_DATA_OUT_OFFSET_OFST 4 -#define MC_CMD_UART_RECV_DATA_OUT_OFFSET_LEN 4 -/* Length of data */ -#define MC_CMD_UART_RECV_DATA_OUT_LENGTH_OFST 8 -#define MC_CMD_UART_RECV_DATA_OUT_LENGTH_LEN 4 -/* Reserved for future use */ -#define MC_CMD_UART_RECV_DATA_OUT_RESERVED_OFST 12 -#define MC_CMD_UART_RECV_DATA_OUT_RESERVED_LEN 4 - -/* MC_CMD_UART_RECV_DATA_IN msgresponse */ -#define MC_CMD_UART_RECV_DATA_IN_LENMIN 16 -#define MC_CMD_UART_RECV_DATA_IN_LENMAX 252 -#define MC_CMD_UART_RECV_DATA_IN_LENMAX_MCDI2 1020 -#define MC_CMD_UART_RECV_DATA_IN_LEN(num) (16+1*(num)) -#define MC_CMD_UART_RECV_DATA_IN_DATA_NUM(len) (((len)-16)/1) -/* CRC32 over RESERVED1, RESERVED2, RESERVED3, DATA */ -#define MC_CMD_UART_RECV_DATA_IN_CHECKSUM_OFST 0 -#define MC_CMD_UART_RECV_DATA_IN_CHECKSUM_LEN 4 -/* Offset at which to write the data */ -#define MC_CMD_UART_RECV_DATA_IN_RESERVED1_OFST 4 -#define MC_CMD_UART_RECV_DATA_IN_RESERVED1_LEN 4 -/* Length of data */ -#define MC_CMD_UART_RECV_DATA_IN_RESERVED2_OFST 8 -#define MC_CMD_UART_RECV_DATA_IN_RESERVED2_LEN 4 -/* Reserved for future use */ -#define MC_CMD_UART_RECV_DATA_IN_RESERVED3_OFST 12 -#define MC_CMD_UART_RECV_DATA_IN_RESERVED3_LEN 4 -#define MC_CMD_UART_RECV_DATA_IN_DATA_OFST 16 -#define MC_CMD_UART_RECV_DATA_IN_DATA_LEN 1 -#define MC_CMD_UART_RECV_DATA_IN_DATA_MINNUM 0 -#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM 236 -#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM_MCDI2 1004 - - -/***********************************/ -/* MC_CMD_READ_FUSES - * Read data programmed into the device One-Time-Programmable (OTP) Fuses - */ -#define MC_CMD_READ_FUSES 0xf0 -#undef MC_CMD_0xf0_PRIVILEGE_CTG - -#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_READ_FUSES_IN msgrequest */ -#define MC_CMD_READ_FUSES_IN_LEN 8 -/* Offset in OTP to read */ -#define MC_CMD_READ_FUSES_IN_OFFSET_OFST 0 -#define MC_CMD_READ_FUSES_IN_OFFSET_LEN 4 -/* Length of data to read in bytes */ -#define MC_CMD_READ_FUSES_IN_LENGTH_OFST 4 -#define MC_CMD_READ_FUSES_IN_LENGTH_LEN 4 - -/* MC_CMD_READ_FUSES_OUT msgresponse */ -#define MC_CMD_READ_FUSES_OUT_LENMIN 4 -#define MC_CMD_READ_FUSES_OUT_LENMAX 252 -#define MC_CMD_READ_FUSES_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num)) -#define MC_CMD_READ_FUSES_OUT_DATA_NUM(len) (((len)-4)/1) -/* Length of returned OTP data in bytes */ -#define MC_CMD_READ_FUSES_OUT_LENGTH_OFST 0 -#define MC_CMD_READ_FUSES_OUT_LENGTH_LEN 4 -/* Returned data */ -#define MC_CMD_READ_FUSES_OUT_DATA_OFST 4 -#define MC_CMD_READ_FUSES_OUT_DATA_LEN 1 -#define MC_CMD_READ_FUSES_OUT_DATA_MINNUM 0 -#define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM 248 -#define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM_MCDI2 1016 - - /***********************************/ /* MC_CMD_KR_TUNE * Get or set KR Serdes RXEQ and TX Driver settings @@ -20588,7 +20411,7 @@ #define MC_CMD_KR_TUNE 0xf1 #undef MC_CMD_0xf1_PRIVILEGE_CTG -#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN +#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND /* MC_CMD_KR_TUNE_IN msgrequest */ #define MC_CMD_KR_TUNE_IN_LENMIN 4 @@ -21123,274 +20946,18 @@ /* MC_CMD_KR_TUNE_LINK_TRAIN_CMD_IN/CM1 */ /* C(+1) status */ #define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_STATUS_OFST 8 -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_STATUS_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_KR_TUNE_LINK_TRAIN_CMD_IN/CM1 */ -/* C(-1) value */ -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_OFST 12 -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_LEN 4 -/* C(0) value */ -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_OFST 16 -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_LEN 4 -/* C(+1) status */ -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_OFST 20 -#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_LEN 4 - - -/***********************************/ -/* MC_CMD_PCIE_TUNE - * Get or set PCIE Serdes RXEQ and TX Driver settings - */ -#define MC_CMD_PCIE_TUNE 0xf2 -#undef MC_CMD_0xf2_PRIVILEGE_CTG - -#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_PCIE_TUNE_IN msgrequest */ -#define MC_CMD_PCIE_TUNE_IN_LENMIN 4 -#define MC_CMD_PCIE_TUNE_IN_LENMAX 252 -#define MC_CMD_PCIE_TUNE_IN_LENMAX_MCDI2 1020 -#define MC_CMD_PCIE_TUNE_IN_LEN(num) (4+4*(num)) -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_NUM(len) (((len)-4)/4) -/* Requested operation */ -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_OFST 0 -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_LEN 1 -/* enum: Get current RXEQ settings */ -#define MC_CMD_PCIE_TUNE_IN_RXEQ_GET 0x0 -/* enum: Override RXEQ settings */ -#define MC_CMD_PCIE_TUNE_IN_RXEQ_SET 0x1 -/* enum: Get current TX Driver settings */ -#define MC_CMD_PCIE_TUNE_IN_TXEQ_GET 0x2 -/* enum: Override TX Driver settings */ -#define MC_CMD_PCIE_TUNE_IN_TXEQ_SET 0x3 -/* enum: Start PCIe Serdes Eye diagram plot on a given lane. */ -#define MC_CMD_PCIE_TUNE_IN_START_EYE_PLOT 0x5 -/* enum: Poll PCIe Serdes Eye diagram plot. Returns one row of BER data. The - * caller should call this command repeatedly after starting eye plot, until no - * more data is returned. - */ -#define MC_CMD_PCIE_TUNE_IN_POLL_EYE_PLOT 0x6 -/* enum: Enable the SERDES BIST and set it to generate a 200MHz square wave */ -#define MC_CMD_PCIE_TUNE_IN_BIST_SQUARE_WAVE 0x7 -/* Align the arguments to 32 bits */ -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_OFST 1 -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_LEN 3 -/* Arguments specific to the operation */ -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_OFST 4 -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_LEN 4 -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MINNUM 0 -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM 62 -#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM_MCDI2 254 - -/* MC_CMD_PCIE_TUNE_OUT msgresponse */ -#define MC_CMD_PCIE_TUNE_OUT_LEN 0 - -/* MC_CMD_PCIE_TUNE_RXEQ_GET_IN msgrequest */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_LEN 4 -/* Requested operation */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_LEN 1 -/* Align the arguments to 32 bits */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3 - -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT msgresponse */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMIN 4 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX 252 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4) -/* RXEQ Parameter */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LEN 4 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MINNUM 1 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM 63 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_LBN 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_WIDTH 8 -/* enum: Attenuation (0-15) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_ATT 0x0 -/* enum: CTLE Boost (0-15) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_BOOST 0x1 -/* enum: DFE Tap1 (0 - max negative, 64 - zero, 127 - max positive) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP1 0x2 -/* enum: DFE Tap2 (0 - max negative, 32 - zero, 63 - max positive) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP2 0x3 -/* enum: DFE Tap3 (0 - max negative, 32 - zero, 63 - max positive) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP3 0x4 -/* enum: DFE Tap4 (0 - max negative, 32 - zero, 63 - max positive) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP4 0x5 -/* enum: DFE Tap5 (0 - max negative, 32 - zero, 63 - max positive) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP5 0x6 -/* enum: DFE DLev */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_DLEV 0x7 -/* enum: Figure of Merit */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_FOM 0x8 -/* enum: CTLE EQ Capacitor (HF Gain) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_CTLE_EQC 0x9 -/* enum: CTLE EQ Resistor (DC Gain) */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_CTLE_EQRES 0xa -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_LBN 8 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_WIDTH 5 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_0 0x0 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_1 0x1 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_2 0x2 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_3 0x3 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_4 0x4 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_5 0x5 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_6 0x6 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_7 0x7 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_8 0x8 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_9 0x9 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_10 0xa /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_11 0xb /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_12 0xc /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_13 0xd /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_14 0xe /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_15 0xf /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_ALL 0x10 /* enum */ -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_LBN 13 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_WIDTH 1 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_LBN 14 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_WIDTH 10 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_LBN 24 -#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8 - -/* MC_CMD_PCIE_TUNE_RXEQ_SET_IN msgrequest */ -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMIN 8 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX 252 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX_MCDI2 1020 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num)) -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_NUM(len) (((len)-4)/4) -/* Requested operation */ -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_OFST 0 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_LEN 1 -/* Align the arguments to 32 bits */ -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_RSVD_OFST 1 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_RSVD_LEN 3 -/* RXEQ Parameter */ -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_OFST 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LEN 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MINNUM 1 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM 62 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM_MCDI2 254 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_OFST 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_LBN 0 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_WIDTH 8 -/* Enum values, see field(s): */ -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_ID */ -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_OFST 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_LBN 8 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_WIDTH 5 -/* Enum values, see field(s): */ -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_LANE */ -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_OFST 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_LBN 13 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_WIDTH 1 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_OFST 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_LBN 14 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_WIDTH 2 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_OFST 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_LBN 16 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_WIDTH 8 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_OFST 4 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_LBN 24 -#define MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_WIDTH 8 - -/* MC_CMD_PCIE_TUNE_RXEQ_SET_OUT msgresponse */ -#define MC_CMD_PCIE_TUNE_RXEQ_SET_OUT_LEN 0 - -/* MC_CMD_PCIE_TUNE_TXEQ_GET_IN msgrequest */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_LEN 4 -/* Requested operation */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_OFST 0 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_LEN 1 -/* Align the arguments to 32 bits */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3 - -/* MC_CMD_PCIE_TUNE_TXEQ_GET_OUT msgresponse */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMIN 4 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX 252 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4) -/* RXEQ Parameter */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_OFST 0 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LEN 4 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_OFST 0 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8 -/* enum: TxMargin (PIPE) */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXMARGIN 0x0 -/* enum: TxSwing (PIPE) */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXSWING 0x1 -/* enum: De-emphasis coefficient C(-1) (PIPE) */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CM1 0x2 -/* enum: De-emphasis coefficient C(0) (PIPE) */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_C0 0x3 -/* enum: De-emphasis coefficient C(+1) (PIPE) */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CP1 0x4 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_OFST 0 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_LBN 8 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_WIDTH 4 -/* Enum values, see field(s): */ -/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_LANE */ -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_OFST 0 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_LBN 12 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_WIDTH 12 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_OFST 0 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_LBN 24 -#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8 - -/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN msgrequest */ -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LEN 8 -/* Requested operation */ -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0 -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1 -/* Align the arguments to 32 bits */ -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1 -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3 -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_OFST 4 -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_LEN 4 - -/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT msgresponse */ -#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT_LEN 0 - -/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN msgrequest */ -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_LEN 4 -/* Requested operation */ -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1 -/* Align the arguments to 32 bits */ -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3 - -/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT msgresponse */ -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num)) -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_NUM(len) (((len)-0)/2) -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126 -#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM_MCDI2 510 - -/* MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN msgrequest */ -#define MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN_LEN 0 - -/* MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_OUT msgrequest */ -#define MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_OUT_LEN 0 +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_STATUS_LEN 4 +/* Enum values, see field(s): */ +/* MC_CMD_KR_TUNE_LINK_TRAIN_CMD_IN/CM1 */ +/* C(-1) value */ +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_OFST 12 +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CM1_VALUE_LEN 4 +/* C(0) value */ +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_OFST 16 +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_C0_VALUE_LEN 4 +/* C(+1) status */ +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_OFST 20 +#define MC_CMD_KR_TUNE_LINK_TRAIN_CMD_OUT_CP1_VALUE_LEN 4 /***********************************/ @@ -21531,56 +21098,6 @@ #define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24 -/***********************************/ -/* MC_CMD_LICENSING_GET_ID_V3 - * Get ID and type from the NVRAM_PARTITION_TYPE_LICENSE application license - * partition - V3 licensing (Medford) - */ -#define MC_CMD_LICENSING_GET_ID_V3 0xd1 -#undef MC_CMD_0xd1_PRIVILEGE_CTG - -#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_LICENSING_GET_ID_V3_IN msgrequest */ -#define MC_CMD_LICENSING_GET_ID_V3_IN_LEN 0 - -/* MC_CMD_LICENSING_GET_ID_V3_OUT msgresponse */ -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN 8 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX 252 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LEN(num) (8+1*(num)) -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_NUM(len) (((len)-8)/1) -/* type of license (eg 3) */ -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_OFST 0 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_LEN 4 -/* length of the license ID (in bytes) */ -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_OFST 4 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_LEN 4 -/* the unique license ID of the adapter */ -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_OFST 8 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LEN 1 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MINNUM 0 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM 244 -#define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM_MCDI2 1012 - - -/***********************************/ -/* MC_CMD_MC2MC_PROXY - * Execute an arbitrary MCDI command on the slave MC of a dual-core device. - * This will fail on a single-core system. - */ -#define MC_CMD_MC2MC_PROXY 0xf4 -#undef MC_CMD_0xf4_PRIVILEGE_CTG - -#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_MC2MC_PROXY_IN msgrequest */ -#define MC_CMD_MC2MC_PROXY_IN_LEN 0 - -/* MC_CMD_MC2MC_PROXY_OUT msgresponse */ -#define MC_CMD_MC2MC_PROXY_OUT_LEN 0 - - /***********************************/ /* MC_CMD_GET_LICENSED_APP_STATE * Query the state of an individual licensed application. (Note that the actual @@ -21609,424 +21126,6 @@ #define MC_CMD_GET_LICENSED_APP_STATE_OUT_LICENSED 0x1 -/***********************************/ -/* MC_CMD_GET_LICENSED_V3_APP_STATE - * Query the state of an individual licensed application. (Note that the actual - * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE - * operation or a reboot of the MC.) Used for V3 licensing (Medford) - */ -#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2 -#undef MC_CMD_0xd2_PRIVILEGE_CTG - -#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_LICENSED_V3_APP_STATE_IN msgrequest */ -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_LEN 8 -/* application ID to query (LICENSED_V3_APPS_xxx) expressed as a single bit - * mask - */ -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32 - -/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */ -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4 -/* state of this application */ -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_OFST 0 -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_LEN 4 -/* enum: no (or invalid) license is present for the application */ -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_NOT_LICENSED 0x0 -/* enum: a valid license is present for the application */ -#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LICENSED 0x1 - - -/***********************************/ -/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES - * Query the state of an one or more licensed features. (Note that the actual - * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE - * operation or a reboot of the MC.) Used for V3 licensing (Medford) - */ -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3 -#undef MC_CMD_0xd3_PRIVILEGE_CTG - -#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN msgrequest */ -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_LEN 8 -/* features to query (LICENSED_V3_FEATURES_xxx) expressed as a mask with one or - * more bits set - */ -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32 - -/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */ -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8 -/* states of these features - bit set for licensed, clear for not licensed */ -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32 -#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32 - - -/***********************************/ -/* MC_CMD_LICENSED_APP_OP - * Perform an action for an individual licensed application - not used for V3 - * licensing. - */ -#define MC_CMD_LICENSED_APP_OP 0xf6 -#undef MC_CMD_0xf6_PRIVILEGE_CTG - -#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_LICENSED_APP_OP_IN msgrequest */ -#define MC_CMD_LICENSED_APP_OP_IN_LENMIN 8 -#define MC_CMD_LICENSED_APP_OP_IN_LENMAX 252 -#define MC_CMD_LICENSED_APP_OP_IN_LENMAX_MCDI2 1020 -#define MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num)) -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_NUM(len) (((len)-8)/4) -/* application ID */ -#define MC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST 0 -#define MC_CMD_LICENSED_APP_OP_IN_APP_ID_LEN 4 -/* the type of operation requested */ -#define MC_CMD_LICENSED_APP_OP_IN_OP_OFST 4 -#define MC_CMD_LICENSED_APP_OP_IN_OP_LEN 4 -/* enum: validate application */ -#define MC_CMD_LICENSED_APP_OP_IN_OP_VALIDATE 0x0 -/* enum: mask application */ -#define MC_CMD_LICENSED_APP_OP_IN_OP_MASK 0x1 -/* arguments specific to this particular operation */ -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_OFST 8 -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4 -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MINNUM 0 -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM 61 -#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM_MCDI2 253 - -/* MC_CMD_LICENSED_APP_OP_OUT msgresponse */ -#define MC_CMD_LICENSED_APP_OP_OUT_LENMIN 0 -#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX 252 -#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_NUM(len) (((len)-0)/4) -/* result specific to this particular operation */ -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST 0 -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4 -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MINNUM 0 -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM 63 -#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM_MCDI2 255 - -/* MC_CMD_LICENSED_APP_OP_VALIDATE_IN msgrequest */ -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_LEN 72 -/* application ID */ -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_OFST 0 -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_LEN 4 -/* the type of operation requested */ -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST 4 -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_LEN 4 -/* validation challenge */ -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_OFST 8 -#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_LEN 64 - -/* MC_CMD_LICENSED_APP_OP_VALIDATE_OUT msgresponse */ -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_LEN 68 -/* feature expiry (time_t) */ -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_OFST 0 -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_LEN 4 -/* validation response */ -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST 4 -#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_LEN 64 - -/* MC_CMD_LICENSED_APP_OP_MASK_IN msgrequest */ -#define MC_CMD_LICENSED_APP_OP_MASK_IN_LEN 12 -/* application ID */ -#define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_OFST 0 -#define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_LEN 4 -/* the type of operation requested */ -#define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_OFST 4 -#define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_LEN 4 -/* flag */ -#define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_OFST 8 -#define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_LEN 4 - -/* MC_CMD_LICENSED_APP_OP_MASK_OUT msgresponse */ -#define MC_CMD_LICENSED_APP_OP_MASK_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_LICENSED_V3_VALIDATE_APP - * Perform validation for an individual licensed application - V3 licensing - * (Medford) - */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4 -#undef MC_CMD_0xd4_PRIVILEGE_CTG - -#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_LICENSED_V3_VALIDATE_APP_IN msgrequest */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_LEN 56 -/* challenge for validation (384 bits) */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_OFST 0 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_LEN 48 -/* application ID expressed as a single bit mask */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32 - -/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116 -/* validation response to challenge in the form of ECDSA signature consisting - * of two 384-bit integers, r and s, in big-endian order. The signature signs a - * SHA-384 digest of a message constructed from the concatenation of the input - * message and the remaining fields of this output message, e.g. challenge[48 - * bytes] ... expiry_time[4 bytes] ... - */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_OFST 0 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_LEN 96 -/* application expiry time */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_OFST 96 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_LEN 4 -/* application expiry units */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_OFST 100 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_LEN 4 -/* enum: expiry units are accounting units */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_ACC 0x0 -/* enum: expiry units are calendar days */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_DAYS 0x1 -/* base MAC address of the NIC stored in NVRAM (note that this is a constant - * value for a given NIC regardless which function is calling, effectively this - * is PF0 base MAC address) - */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_OFST 104 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_LEN 6 -/* MAC address of v-adaptor associated with the client. If no such v-adapator - * exists, then the field is filled with 0xFF. - */ -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_OFST 110 -#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_LEN 6 - - -/***********************************/ -/* MC_CMD_LICENSED_V3_MASK_FEATURES - * Mask features - V3 licensing (Medford) - */ -#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5 -#undef MC_CMD_0xd5_PRIVILEGE_CTG - -#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_LICENSED_V3_MASK_FEATURES_IN msgrequest */ -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_LEN 12 -/* mask to be applied to features to be changed */ -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32 -/* whether to turn on or turn off the masked features */ -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8 -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4 -/* enum: turn the features off */ -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_OFF 0x0 -/* enum: turn the features back on */ -#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_ON 0x1 - -/* MC_CMD_LICENSED_V3_MASK_FEATURES_OUT msgresponse */ -#define MC_CMD_LICENSED_V3_MASK_FEATURES_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_LICENSING_V3_TEMPORARY - * Perform operations to support installation of a single temporary license in - * the adapter, in addition to those found in the licensing partition. See - * SF-116124-SW for an overview of how this could be used. The license is - * stored in MC persistent data and so will survive a MC reboot, but will be - * erased when the adapter is power cycled - */ -#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6 -#undef MC_CMD_0xd6_PRIVILEGE_CTG - -#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_LICENSING_V3_TEMPORARY_IN msgrequest */ -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_LEN 4 -/* operation code */ -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_OFST 0 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_LEN 4 -/* enum: install a new license, overwriting any existing temporary license. - * This is an asynchronous operation owing to the time taken to validate an - * ECDSA license - */ -#define MC_CMD_LICENSING_V3_TEMPORARY_SET 0x0 -/* enum: clear the license immediately rather than waiting for the next power - * cycle - */ -#define MC_CMD_LICENSING_V3_TEMPORARY_CLEAR 0x1 -/* enum: get the status of the asynchronous MC_CMD_LICENSING_V3_TEMPORARY_SET - * operation - */ -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS 0x2 - -/* MC_CMD_LICENSING_V3_TEMPORARY_IN_SET msgrequest */ -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LEN 164 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_OFST 0 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_LEN 4 -/* ECDSA license and signature */ -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_OFST 4 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_LEN 160 - -/* MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR msgrequest */ -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_LEN 4 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_OFST 0 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_LEN 4 - -/* MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS msgrequest */ -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_LEN 4 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_OFST 0 -#define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_LEN 4 - -/* MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS msgresponse */ -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LEN 12 -/* status code */ -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_OFST 0 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_LEN 4 -/* enum: finished validating and installing license */ -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_OK 0x0 -/* enum: license validation and installation in progress */ -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_IN_PROGRESS 0x1 -/* enum: licensing error. More specific error messages are not provided to - * avoid exposing details of the licensing system to the client - */ -#define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_ERROR 0x2 -/* bitmask of licensed features */ -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64 -#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32 - - -/***********************************/ -/* MC_CMD_SET_PORT_SNIFF_CONFIG - * Configure RX port sniffing for the physical port associated with the calling - * function. Only a privileged function may change the port sniffing - * configuration. A copy of all traffic delivered to the host (non-promiscuous - * mode) or all traffic arriving at the port (promiscuous mode) may be - * delivered to a specific queue, or a set of queues with RSS. - */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7 -#undef MC_CMD_0xf7_PRIVILEGE_CTG - -#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SET_PORT_SNIFF_CONFIG_IN msgrequest */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_LEN 16 -/* configuration flags */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_LEN 4 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_OFST 0 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_OFST 0 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_LBN 1 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_WIDTH 1 -/* receive queue handle (for RSS mode, this is the base queue) */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_LEN 4 -/* receive mode */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_LEN 4 -/* enum: receive to just the specified queue */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0 -/* enum: receive to multiple queues using RSS context */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1 -/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note - * that these handles should be considered opaque to the host, although a value - * of 0xFFFFFFFF is guaranteed never to be a valid handle. - */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12 -#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_LEN 4 - -/* MC_CMD_SET_PORT_SNIFF_CONFIG_OUT msgresponse */ -#define MC_CMD_SET_PORT_SNIFF_CONFIG_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_GET_PORT_SNIFF_CONFIG - * Obtain the current RX port sniffing configuration for the physical port - * associated with the calling function. Only a privileged function may read - * the configuration. - */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8 -#undef MC_CMD_0xf8_PRIVILEGE_CTG - -#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_PORT_SNIFF_CONFIG_IN msgrequest */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_IN_LEN 0 - -/* MC_CMD_GET_PORT_SNIFF_CONFIG_OUT msgresponse */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_LEN 16 -/* configuration flags */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_LEN 4 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_OFST 0 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_OFST 0 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_LBN 1 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_WIDTH 1 -/* receiving queue handle (for RSS mode, this is the base queue) */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_LEN 4 -/* receive mode */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_LEN 4 -/* enum: receiving to just the specified queue */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0 -/* enum: receiving to multiple queues using RSS context */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1 -/* RSS context (for RX_MODE_RSS) */ -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12 -#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_LEN 4 - - /***********************************/ /* MC_CMD_SET_PARSER_DISP_CONFIG * Change configuration related to the parser-dispatcher subsystem. @@ -22072,305 +21171,6 @@ #define MC_CMD_SET_PARSER_DISP_CONFIG_OUT_LEN 0 -/***********************************/ -/* MC_CMD_GET_PARSER_DISP_CONFIG - * Read configuration related to the parser-dispatcher subsystem. - */ -#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa -#undef MC_CMD_0xfa_PRIVILEGE_CTG - -#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_PARSER_DISP_CONFIG_IN msgrequest */ -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_LEN 8 -/* the type of configuration setting to read */ -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_OFST 0 -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_SET_PARSER_DISP_CONFIG/MC_CMD_SET_PARSER_DISP_CONFIG_IN/TYPE */ -/* handle for the entity to query: queue handle, EVB port ID, etc. depending on - * the type of configuration setting being read - */ -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4 -#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_LEN 4 - -/* MC_CMD_GET_PARSER_DISP_CONFIG_OUT msgresponse */ -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN 4 -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX 252 -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_NUM(len) (((len)-0)/4) -/* current value: the details depend on the type of configuration setting being - * read - */ -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_OFST 0 -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN 4 -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MINNUM 1 -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM 63 -#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM_MCDI2 255 - - -/***********************************/ -/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG - * Configure TX port sniffing for the physical port associated with the calling - * function. Only a privileged function may change the port sniffing - * configuration. A copy of all traffic transmitted through the port may be - * delivered to a specific queue, or a set of queues with RSS. Note that these - * packets are delivered with transmit timestamps in the packet prefix, not - * receive timestamps, so it is likely that the queue(s) will need to be - * dedicated as TX sniff receivers. - */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb -#undef MC_CMD_0xfb_PRIVILEGE_CTG - -#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN msgrequest */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_LEN 16 -/* configuration flags */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0 -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_FLAGS_LEN 4 -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_OFST 0 -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0 -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1 -/* receive queue handle (for RSS mode, this is the base queue) */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4 -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_QUEUE_LEN 4 -/* receive mode */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8 -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_LEN 4 -/* enum: receive to just the specified queue */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0 -/* enum: receive to multiple queues using RSS context */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1 -/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note - * that these handles should be considered opaque to the host, although a value - * of 0xFFFFFFFF is guaranteed never to be a valid handle. - */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12 -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_LEN 4 - -/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */ -#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG - * Obtain the current TX port sniffing configuration for the physical port - * associated with the calling function. Only a privileged function may read - * the configuration. - */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc -#undef MC_CMD_0xfc_PRIVILEGE_CTG - -#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN msgrequest */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN_LEN 0 - -/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_LEN 16 -/* configuration flags */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0 -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_FLAGS_LEN 4 -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_OFST 0 -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0 -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1 -/* receiving queue handle (for RSS mode, this is the base queue) */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4 -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_LEN 4 -/* receive mode */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8 -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_LEN 4 -/* enum: receiving to just the specified queue */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0 -/* enum: receiving to multiple queues using RSS context */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1 -/* RSS context (for RX_MODE_RSS) */ -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12 -#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_LEN 4 - - -/***********************************/ -/* MC_CMD_RMON_STATS_RX_ERRORS - * Per queue rx error stats. - */ -#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe -#undef MC_CMD_0xfe_PRIVILEGE_CTG - -#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_RMON_STATS_RX_ERRORS_IN msgrequest */ -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_LEN 8 -/* The rx queue to get stats for. */ -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RX_QUEUE_OFST 0 -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RX_QUEUE_LEN 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_FLAGS_OFST 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_FLAGS_LEN 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_OFST 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_LBN 0 -#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_WIDTH 1 - -/* MC_CMD_RMON_STATS_RX_ERRORS_OUT msgresponse */ -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_LEN 16 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_CRC_ERRORS_OFST 0 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_CRC_ERRORS_LEN 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_TRUNC_ERRORS_OFST 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_TRUNC_ERRORS_LEN 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_NO_DESC_DROPS_OFST 8 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_NO_DESC_DROPS_LEN 4 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_ABORT_OFST 12 -#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_ABORT_LEN 4 - - -/***********************************/ -/* MC_CMD_GET_PCIE_RESOURCE_INFO - * Find out about available PCIE resources - */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd -#undef MC_CMD_0xfd_PRIVILEGE_CTG - -#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_PCIE_RESOURCE_INFO_IN msgrequest */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_IN_LEN 0 - -/* MC_CMD_GET_PCIE_RESOURCE_INFO_OUT msgresponse */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_LEN 28 -/* The maximum number of PFs the device can expose */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PFS_OFST 0 -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PFS_LEN 4 -/* The maximum number of VFs the device can expose in total */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VFS_OFST 4 -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VFS_LEN 4 -/* The maximum number of MSI-X vectors the device can provide in total */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VECTORS_OFST 8 -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VECTORS_LEN 4 -/* the number of MSI-X vectors the device will allocate by default to each PF - */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_PF_VECTORS_OFST 12 -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_PF_VECTORS_LEN 4 -/* the number of MSI-X vectors the device will allocate by default to each VF - */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_VF_VECTORS_OFST 16 -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_VF_VECTORS_LEN 4 -/* the maximum number of MSI-X vectors the device can allocate to any one PF */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PF_VECTORS_OFST 20 -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PF_VECTORS_LEN 4 -/* the maximum number of MSI-X vectors the device can allocate to any one VF */ -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VF_VECTORS_OFST 24 -#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VF_VECTORS_LEN 4 - - -/***********************************/ -/* MC_CMD_GET_PORT_MODES - * Find out about available port modes - */ -#define MC_CMD_GET_PORT_MODES 0xff -#undef MC_CMD_0xff_PRIVILEGE_CTG - -#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_PORT_MODES_IN msgrequest */ -#define MC_CMD_GET_PORT_MODES_IN_LEN 0 - -/* MC_CMD_GET_PORT_MODES_OUT msgresponse */ -#define MC_CMD_GET_PORT_MODES_OUT_LEN 12 -/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) - * that are supported for customer use in production firmware. - */ -#define MC_CMD_GET_PORT_MODES_OUT_MODES_OFST 0 -#define MC_CMD_GET_PORT_MODES_OUT_MODES_LEN 4 -/* Default (canonical) board mode */ -#define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_OFST 4 -#define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_LEN 4 -/* Current board mode */ -#define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_OFST 8 -#define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_LEN 4 - -/* MC_CMD_GET_PORT_MODES_OUT_V2 msgresponse */ -#define MC_CMD_GET_PORT_MODES_OUT_V2_LEN 16 -/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) - * that are supported for customer use in production firmware. - */ -#define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_OFST 0 -#define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_LEN 4 -/* Default (canonical) board mode */ -#define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_OFST 4 -#define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_LEN 4 -/* Current board mode */ -#define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_OFST 8 -#define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_LEN 4 -/* Bitmask of engineering port modes available on the board (indexed by - * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that - * contains all modes implemented in firmware for a particular board. Modes - * listed in MODES are considered production modes and should be exposed in - * userland tools. Modes listed in ENGINEERING_MODES, but not in MODES - * should be considered hidden (not to be exposed in userland tools) and for - * engineering use only. There are no other semantic differences and any mode - * listed in either MODES or ENGINEERING_MODES can be set on the board. - */ -#define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_OFST 12 -#define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_LEN 4 - - -/***********************************/ -/* MC_CMD_OVERRIDE_PORT_MODE - * Override flash config port mode for subsequent MC reboot(s). Override data - * is stored in the presistent data section of DMEM and activated on next MC - * warm reboot. A cold reboot resets the override. It is assumed that a - * sufficient number of PFs are available and that port mapping is valid for - * the new port mode, as the override does not affect PF configuration. - */ -#define MC_CMD_OVERRIDE_PORT_MODE 0x137 -#undef MC_CMD_0x137_PRIVILEGE_CTG - -#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_OVERRIDE_PORT_MODE_IN msgrequest */ -#define MC_CMD_OVERRIDE_PORT_MODE_IN_LEN 8 -#define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_OFST 0 -#define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_LEN 4 -#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_OFST 0 -#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_LBN 0 -#define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_WIDTH 1 -/* New mode (TLV_PORT_MODE_*) to set, if override enabled */ -#define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_OFST 4 -#define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_LEN 4 - -/* MC_CMD_OVERRIDE_PORT_MODE_OUT msgresponse */ -#define MC_CMD_OVERRIDE_PORT_MODE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_READ_ATB - * Sample voltages on the ATB - */ -#define MC_CMD_READ_ATB 0x100 -#undef MC_CMD_0x100_PRIVILEGE_CTG - -#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_READ_ATB_IN msgrequest */ -#define MC_CMD_READ_ATB_IN_LEN 16 -#define MC_CMD_READ_ATB_IN_SIGNAL_BUS_OFST 0 -#define MC_CMD_READ_ATB_IN_SIGNAL_BUS_LEN 4 -#define MC_CMD_READ_ATB_IN_BUS_CCOM 0x0 /* enum */ -#define MC_CMD_READ_ATB_IN_BUS_CKR 0x1 /* enum */ -#define MC_CMD_READ_ATB_IN_BUS_CPCIE 0x8 /* enum */ -#define MC_CMD_READ_ATB_IN_SIGNAL_EN_BITNO_OFST 4 -#define MC_CMD_READ_ATB_IN_SIGNAL_EN_BITNO_LEN 4 -#define MC_CMD_READ_ATB_IN_SIGNAL_SEL_OFST 8 -#define MC_CMD_READ_ATB_IN_SIGNAL_SEL_LEN 4 -#define MC_CMD_READ_ATB_IN_SETTLING_TIME_US_OFST 12 -#define MC_CMD_READ_ATB_IN_SETTLING_TIME_US_LEN 4 - -/* MC_CMD_READ_ATB_OUT msgresponse */ -#define MC_CMD_READ_ATB_OUT_LEN 4 -#define MC_CMD_READ_ATB_OUT_SAMPLE_MV_OFST 0 -#define MC_CMD_READ_ATB_OUT_SAMPLE_MV_LEN 4 - - /***********************************/ /* MC_CMD_GET_WORKAROUNDS * Read the list of all implemented and all currently enabled workarounds. The @@ -22538,447 +21338,6 @@ #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_OFST 0 #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_LEN 4 - -/***********************************/ -/* MC_CMD_GET_SNAPSHOT_LENGTH - * Obtain the current range of allowable values for the SNAPSHOT_LENGTH - * parameter to MC_CMD_INIT_RXQ. - */ -#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101 -#undef MC_CMD_0x101_PRIVILEGE_CTG - -#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_SNAPSHOT_LENGTH_IN msgrequest */ -#define MC_CMD_GET_SNAPSHOT_LENGTH_IN_LEN 0 - -/* MC_CMD_GET_SNAPSHOT_LENGTH_OUT msgresponse */ -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_LEN 8 -/* Minimum acceptable snapshot length. */ -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MIN_OFST 0 -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MIN_LEN 4 -/* Maximum acceptable snapshot length. */ -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MAX_OFST 4 -#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MAX_LEN 4 - - -/***********************************/ -/* MC_CMD_FUSE_DIAGS - * Additional fuse diagnostics - */ -#define MC_CMD_FUSE_DIAGS 0x102 -#undef MC_CMD_0x102_PRIVILEGE_CTG - -#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_FUSE_DIAGS_IN msgrequest */ -#define MC_CMD_FUSE_DIAGS_IN_LEN 0 - -/* MC_CMD_FUSE_DIAGS_OUT msgresponse */ -#define MC_CMD_FUSE_DIAGS_OUT_LEN 48 -/* Total number of mismatched bits between pairs in area 0 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_OFST 0 -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_LEN 4 -/* Total number of unexpectedly clear (set in B but not A) bits in area 0 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_OFST 4 -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_LEN 4 -/* Total number of unexpectedly clear (set in A but not B) bits in area 0 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_OFST 8 -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_LEN 4 -/* Checksum of data after logical OR of pairs in area 0 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_OFST 12 -#define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_LEN 4 -/* Total number of mismatched bits between pairs in area 1 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_OFST 16 -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_LEN 4 -/* Total number of unexpectedly clear (set in B but not A) bits in area 1 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_OFST 20 -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_LEN 4 -/* Total number of unexpectedly clear (set in A but not B) bits in area 1 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_OFST 24 -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_LEN 4 -/* Checksum of data after logical OR of pairs in area 1 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_OFST 28 -#define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_LEN 4 -/* Total number of mismatched bits between pairs in area 2 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_OFST 32 -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_LEN 4 -/* Total number of unexpectedly clear (set in B but not A) bits in area 2 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_OFST 36 -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_LEN 4 -/* Total number of unexpectedly clear (set in A but not B) bits in area 2 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_OFST 40 -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_LEN 4 -/* Checksum of data after logical OR of pairs in area 2 */ -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_OFST 44 -#define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_LEN 4 - - -/***********************************/ -/* MC_CMD_PRIVILEGE_MODIFY - * Modify the privileges of a set of PCIe functions. Note that this operation - * only effects non-admin functions unless the admin privilege itself is - * included in one of the masks provided. - */ -#define MC_CMD_PRIVILEGE_MODIFY 0x60 -#undef MC_CMD_0x60_PRIVILEGE_CTG - -#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_PRIVILEGE_MODIFY_IN msgrequest */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_LEN 16 -/* The groups of functions to have their privilege masks modified. */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_OFST 0 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_LEN 4 -#define MC_CMD_PRIVILEGE_MODIFY_IN_NONE 0x0 /* enum */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_ALL 0x1 /* enum */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_PFS_ONLY 0x2 /* enum */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_ONLY 0x3 /* enum */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_OF_PF 0x4 /* enum */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_ONE 0x5 /* enum */ -/* For VFS_OF_PF specify the PF, for ONE specify the target function */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_OFST 4 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_LEN 4 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_OFST 4 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_LBN 0 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_WIDTH 16 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_OFST 4 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_LBN 16 -#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_WIDTH 16 -/* Privileges to be added to the target functions. For privilege definitions - * refer to the command MC_CMD_PRIVILEGE_MASK - */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_OFST 8 -#define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_LEN 4 -/* Privileges to be removed from the target functions. For privilege - * definitions refer to the command MC_CMD_PRIVILEGE_MASK - */ -#define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_OFST 12 -#define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_LEN 4 - -/* MC_CMD_PRIVILEGE_MODIFY_OUT msgresponse */ -#define MC_CMD_PRIVILEGE_MODIFY_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_XPM_READ_BYTES - * Read XPM memory - */ -#define MC_CMD_XPM_READ_BYTES 0x103 -#undef MC_CMD_0x103_PRIVILEGE_CTG - -#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_XPM_READ_BYTES_IN msgrequest */ -#define MC_CMD_XPM_READ_BYTES_IN_LEN 8 -/* Start address (byte) */ -#define MC_CMD_XPM_READ_BYTES_IN_ADDR_OFST 0 -#define MC_CMD_XPM_READ_BYTES_IN_ADDR_LEN 4 -/* Count (bytes) */ -#define MC_CMD_XPM_READ_BYTES_IN_COUNT_OFST 4 -#define MC_CMD_XPM_READ_BYTES_IN_COUNT_LEN 4 - -/* MC_CMD_XPM_READ_BYTES_OUT msgresponse */ -#define MC_CMD_XPM_READ_BYTES_OUT_LENMIN 0 -#define MC_CMD_XPM_READ_BYTES_OUT_LENMAX 252 -#define MC_CMD_XPM_READ_BYTES_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_XPM_READ_BYTES_OUT_LEN(num) (0+1*(num)) -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_NUM(len) (((len)-0)/1) -/* Data */ -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_OFST 0 -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_LEN 1 -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MINNUM 0 -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM 252 -#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM_MCDI2 1020 - - -/***********************************/ -/* MC_CMD_XPM_WRITE_BYTES - * Write XPM memory - */ -#define MC_CMD_XPM_WRITE_BYTES 0x104 -#undef MC_CMD_0x104_PRIVILEGE_CTG - -#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_WRITE_BYTES_IN msgrequest */ -#define MC_CMD_XPM_WRITE_BYTES_IN_LENMIN 8 -#define MC_CMD_XPM_WRITE_BYTES_IN_LENMAX 252 -#define MC_CMD_XPM_WRITE_BYTES_IN_LENMAX_MCDI2 1020 -#define MC_CMD_XPM_WRITE_BYTES_IN_LEN(num) (8+1*(num)) -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_NUM(len) (((len)-8)/1) -/* Start address (byte) */ -#define MC_CMD_XPM_WRITE_BYTES_IN_ADDR_OFST 0 -#define MC_CMD_XPM_WRITE_BYTES_IN_ADDR_LEN 4 -/* Count (bytes) */ -#define MC_CMD_XPM_WRITE_BYTES_IN_COUNT_OFST 4 -#define MC_CMD_XPM_WRITE_BYTES_IN_COUNT_LEN 4 -/* Data */ -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_OFST 8 -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_LEN 1 -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MINNUM 0 -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM 244 -#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM_MCDI2 1012 - -/* MC_CMD_XPM_WRITE_BYTES_OUT msgresponse */ -#define MC_CMD_XPM_WRITE_BYTES_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_XPM_READ_SECTOR - * Read XPM sector - */ -#define MC_CMD_XPM_READ_SECTOR 0x105 -#undef MC_CMD_0x105_PRIVILEGE_CTG - -#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_READ_SECTOR_IN msgrequest */ -#define MC_CMD_XPM_READ_SECTOR_IN_LEN 8 -/* Sector index */ -#define MC_CMD_XPM_READ_SECTOR_IN_INDEX_OFST 0 -#define MC_CMD_XPM_READ_SECTOR_IN_INDEX_LEN 4 -/* Sector size */ -#define MC_CMD_XPM_READ_SECTOR_IN_SIZE_OFST 4 -#define MC_CMD_XPM_READ_SECTOR_IN_SIZE_LEN 4 - -/* MC_CMD_XPM_READ_SECTOR_OUT msgresponse */ -#define MC_CMD_XPM_READ_SECTOR_OUT_LENMIN 4 -#define MC_CMD_XPM_READ_SECTOR_OUT_LENMAX 36 -#define MC_CMD_XPM_READ_SECTOR_OUT_LENMAX_MCDI2 36 -#define MC_CMD_XPM_READ_SECTOR_OUT_LEN(num) (4+1*(num)) -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_NUM(len) (((len)-4)/1) -/* Sector type */ -#define MC_CMD_XPM_READ_SECTOR_OUT_TYPE_OFST 0 -#define MC_CMD_XPM_READ_SECTOR_OUT_TYPE_LEN 4 -#define MC_CMD_XPM_READ_SECTOR_OUT_BLANK 0x0 /* enum */ -#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_128 0x1 /* enum */ -#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_256 0x2 /* enum */ -#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_DATA 0x3 /* enum */ -#define MC_CMD_XPM_READ_SECTOR_OUT_INVALID 0xff /* enum */ -/* Sector data */ -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_OFST 4 -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_LEN 1 -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MINNUM 0 -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM 32 -#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM_MCDI2 32 - - -/***********************************/ -/* MC_CMD_XPM_WRITE_SECTOR - * Write XPM sector - */ -#define MC_CMD_XPM_WRITE_SECTOR 0x106 -#undef MC_CMD_0x106_PRIVILEGE_CTG - -#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_WRITE_SECTOR_IN msgrequest */ -#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMIN 12 -#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX 44 -#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX_MCDI2 44 -#define MC_CMD_XPM_WRITE_SECTOR_IN_LEN(num) (12+1*(num)) -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_NUM(len) (((len)-12)/1) -/* If writing fails due to an uncorrectable error, try up to RETRIES following - * sectors (or until no more space available). If 0, only one write attempt is - * made. Note that uncorrectable errors are unlikely, thanks to XPM self-repair - * mechanism. - */ -#define MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_OFST 0 -#define MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_LEN 1 -#define MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_OFST 1 -#define MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_LEN 3 -/* Sector type */ -#define MC_CMD_XPM_WRITE_SECTOR_IN_TYPE_OFST 4 -#define MC_CMD_XPM_WRITE_SECTOR_IN_TYPE_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_XPM_READ_SECTOR/MC_CMD_XPM_READ_SECTOR_OUT/TYPE */ -/* Sector size */ -#define MC_CMD_XPM_WRITE_SECTOR_IN_SIZE_OFST 8 -#define MC_CMD_XPM_WRITE_SECTOR_IN_SIZE_LEN 4 -/* Sector data */ -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_OFST 12 -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_LEN 1 -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MINNUM 0 -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM 32 -#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM_MCDI2 32 - -/* MC_CMD_XPM_WRITE_SECTOR_OUT msgresponse */ -#define MC_CMD_XPM_WRITE_SECTOR_OUT_LEN 4 -/* New sector index */ -#define MC_CMD_XPM_WRITE_SECTOR_OUT_INDEX_OFST 0 -#define MC_CMD_XPM_WRITE_SECTOR_OUT_INDEX_LEN 4 - - -/***********************************/ -/* MC_CMD_XPM_INVALIDATE_SECTOR - * Invalidate XPM sector - */ -#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107 -#undef MC_CMD_0x107_PRIVILEGE_CTG - -#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_INVALIDATE_SECTOR_IN msgrequest */ -#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_LEN 4 -/* Sector index */ -#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_INDEX_OFST 0 -#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_INDEX_LEN 4 - -/* MC_CMD_XPM_INVALIDATE_SECTOR_OUT msgresponse */ -#define MC_CMD_XPM_INVALIDATE_SECTOR_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_XPM_BLANK_CHECK - * Blank-check XPM memory and report bad locations - */ -#define MC_CMD_XPM_BLANK_CHECK 0x108 -#undef MC_CMD_0x108_PRIVILEGE_CTG - -#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_BLANK_CHECK_IN msgrequest */ -#define MC_CMD_XPM_BLANK_CHECK_IN_LEN 8 -/* Start address (byte) */ -#define MC_CMD_XPM_BLANK_CHECK_IN_ADDR_OFST 0 -#define MC_CMD_XPM_BLANK_CHECK_IN_ADDR_LEN 4 -/* Count (bytes) */ -#define MC_CMD_XPM_BLANK_CHECK_IN_COUNT_OFST 4 -#define MC_CMD_XPM_BLANK_CHECK_IN_COUNT_LEN 4 - -/* MC_CMD_XPM_BLANK_CHECK_OUT msgresponse */ -#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMIN 4 -#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX 252 -#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_XPM_BLANK_CHECK_OUT_LEN(num) (4+2*(num)) -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_NUM(len) (((len)-4)/2) -/* Total number of bad (non-blank) locations */ -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_OFST 0 -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_LEN 4 -/* Addresses of bad locations (may be less than BAD_COUNT, if all cannot fit - * into MCDI response) - */ -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_OFST 4 -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_LEN 2 -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MINNUM 0 -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM 124 -#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM_MCDI2 508 - - -/***********************************/ -/* MC_CMD_XPM_REPAIR - * Blank-check and repair XPM memory - */ -#define MC_CMD_XPM_REPAIR 0x109 -#undef MC_CMD_0x109_PRIVILEGE_CTG - -#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_REPAIR_IN msgrequest */ -#define MC_CMD_XPM_REPAIR_IN_LEN 8 -/* Start address (byte) */ -#define MC_CMD_XPM_REPAIR_IN_ADDR_OFST 0 -#define MC_CMD_XPM_REPAIR_IN_ADDR_LEN 4 -/* Count (bytes) */ -#define MC_CMD_XPM_REPAIR_IN_COUNT_OFST 4 -#define MC_CMD_XPM_REPAIR_IN_COUNT_LEN 4 - -/* MC_CMD_XPM_REPAIR_OUT msgresponse */ -#define MC_CMD_XPM_REPAIR_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_XPM_DECODER_TEST - * Test XPM memory address decoders for gross manufacturing defects. Can only - * be performed on an unprogrammed part. - */ -#define MC_CMD_XPM_DECODER_TEST 0x10a -#undef MC_CMD_0x10a_PRIVILEGE_CTG - -#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_DECODER_TEST_IN msgrequest */ -#define MC_CMD_XPM_DECODER_TEST_IN_LEN 0 - -/* MC_CMD_XPM_DECODER_TEST_OUT msgresponse */ -#define MC_CMD_XPM_DECODER_TEST_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_XPM_WRITE_TEST - * XPM memory write test. Test XPM write logic for gross manufacturing defects - * by writing to a dedicated test row. There are 16 locations in the test row - * and the test can only be performed on locations that have not been - * previously used (i.e. can be run at most 16 times). The test will pick the - * first available location to use, or fail with ENOSPC if none left. - */ -#define MC_CMD_XPM_WRITE_TEST 0x10b -#undef MC_CMD_0x10b_PRIVILEGE_CTG - -#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_XPM_WRITE_TEST_IN msgrequest */ -#define MC_CMD_XPM_WRITE_TEST_IN_LEN 0 - -/* MC_CMD_XPM_WRITE_TEST_OUT msgresponse */ -#define MC_CMD_XPM_WRITE_TEST_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_EXEC_SIGNED - * Check the CMAC of the contents of IMEM and DMEM against the value supplied - * and if correct begin execution from the start of IMEM. The caller supplies a - * key ID, the length of IMEM and DMEM to validate and the expected CMAC. CMAC - * computation runs from the start of IMEM, and from the start of DMEM + 16k, - * to match flash booting. The command will respond with EINVAL if the CMAC - * does match, otherwise it will respond with success before it jumps to IMEM. - */ -#define MC_CMD_EXEC_SIGNED 0x10c -#undef MC_CMD_0x10c_PRIVILEGE_CTG - -#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_EXEC_SIGNED_IN msgrequest */ -#define MC_CMD_EXEC_SIGNED_IN_LEN 28 -/* the length of code to include in the CMAC */ -#define MC_CMD_EXEC_SIGNED_IN_CODELEN_OFST 0 -#define MC_CMD_EXEC_SIGNED_IN_CODELEN_LEN 4 -/* the length of date to include in the CMAC */ -#define MC_CMD_EXEC_SIGNED_IN_DATALEN_OFST 4 -#define MC_CMD_EXEC_SIGNED_IN_DATALEN_LEN 4 -/* the XPM sector containing the key to use */ -#define MC_CMD_EXEC_SIGNED_IN_KEYSECTOR_OFST 8 -#define MC_CMD_EXEC_SIGNED_IN_KEYSECTOR_LEN 4 -/* the expected CMAC value */ -#define MC_CMD_EXEC_SIGNED_IN_CMAC_OFST 12 -#define MC_CMD_EXEC_SIGNED_IN_CMAC_LEN 16 - -/* MC_CMD_EXEC_SIGNED_OUT msgresponse */ -#define MC_CMD_EXEC_SIGNED_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_PREPARE_SIGNED - * Prepare to upload a signed image. This will scrub the specified length of - * the data region, which must be at least as large as the DATALEN supplied to - * MC_CMD_EXEC_SIGNED. - */ -#define MC_CMD_PREPARE_SIGNED 0x10d -#undef MC_CMD_0x10d_PRIVILEGE_CTG - -#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_PREPARE_SIGNED_IN msgrequest */ -#define MC_CMD_PREPARE_SIGNED_IN_LEN 4 -/* the length of data area to clear */ -#define MC_CMD_PREPARE_SIGNED_IN_DATALEN_OFST 0 -#define MC_CMD_PREPARE_SIGNED_IN_DATALEN_LEN 4 - -/* MC_CMD_PREPARE_SIGNED_OUT msgresponse */ -#define MC_CMD_PREPARE_SIGNED_OUT_LEN 0 - - /* TUNNEL_ENCAP_UDP_PORT_ENTRY structuredef */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_LEN 4 /* UDP port (the standard ports are named below but any port may be used) */ @@ -23048,110 +21407,6 @@ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_WIDTH 1 -/***********************************/ -/* MC_CMD_RX_BALANCING - * Configure a port upconverter to distribute the packets on both RX engines. - * Packets are distributed based on a table with the destination vFIFO. The - * index of the table is a hash of source and destination of IPV4 and VLAN - * priority. - */ -#define MC_CMD_RX_BALANCING 0x118 -#undef MC_CMD_0x118_PRIVILEGE_CTG - -#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_RX_BALANCING_IN msgrequest */ -#define MC_CMD_RX_BALANCING_IN_LEN 16 -/* The RX port whose upconverter table will be modified */ -#define MC_CMD_RX_BALANCING_IN_PORT_OFST 0 -#define MC_CMD_RX_BALANCING_IN_PORT_LEN 4 -/* The VLAN priority associated to the table index and vFIFO */ -#define MC_CMD_RX_BALANCING_IN_PRIORITY_OFST 4 -#define MC_CMD_RX_BALANCING_IN_PRIORITY_LEN 4 -/* The resulting bit of SRC^DST for indexing the table */ -#define MC_CMD_RX_BALANCING_IN_SRC_DST_OFST 8 -#define MC_CMD_RX_BALANCING_IN_SRC_DST_LEN 4 -/* The RX engine to which the vFIFO in the table entry will point to */ -#define MC_CMD_RX_BALANCING_IN_ENG_OFST 12 -#define MC_CMD_RX_BALANCING_IN_ENG_LEN 4 - -/* MC_CMD_RX_BALANCING_OUT msgresponse */ -#define MC_CMD_RX_BALANCING_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_NVRAM_PRIVATE_APPEND - * Append a single TLV to the MC_USAGE_TLV partition. Returns MC_CMD_ERR_EEXIST - * if the tag is already present. - */ -#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c -#undef MC_CMD_0x11c_PRIVILEGE_CTG - -#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_NVRAM_PRIVATE_APPEND_IN msgrequest */ -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMIN 9 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX 252 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX_MCDI2 1020 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LEN(num) (8+1*(num)) -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_NUM(len) (((len)-8)/1) -/* The tag to be appended */ -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_OFST 0 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_LEN 4 -/* The length of the data */ -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENGTH_OFST 4 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENGTH_LEN 4 -/* The data to be contained in the TLV structure */ -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_OFST 8 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_LEN 1 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MINNUM 1 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM 244 -#define MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM_MCDI2 1012 - -/* MC_CMD_NVRAM_PRIVATE_APPEND_OUT msgresponse */ -#define MC_CMD_NVRAM_PRIVATE_APPEND_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_XPM_VERIFY_CONTENTS - * Verify that the contents of the XPM memory is correct (Medford only). This - * is used during manufacture to check that the XPM memory has been programmed - * correctly at ATE. - */ -#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b -#undef MC_CMD_0x11b_PRIVILEGE_CTG - -#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_XPM_VERIFY_CONTENTS_IN msgrequest */ -#define MC_CMD_XPM_VERIFY_CONTENTS_IN_LEN 4 -/* Data type to be checked */ -#define MC_CMD_XPM_VERIFY_CONTENTS_IN_DATA_TYPE_OFST 0 -#define MC_CMD_XPM_VERIFY_CONTENTS_IN_DATA_TYPE_LEN 4 - -/* MC_CMD_XPM_VERIFY_CONTENTS_OUT msgresponse */ -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMIN 12 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX 252 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_LEN(num) (12+1*(num)) -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_NUM(len) (((len)-12)/1) -/* Number of sectors found (test builds only) */ -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_OFST 0 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_LEN 4 -/* Number of bytes found (test builds only) */ -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_BYTES_OFST 4 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_BYTES_LEN 4 -/* Length of signature */ -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIG_LENGTH_OFST 8 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIG_LENGTH_LEN 4 -/* Signature */ -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_OFST 12 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_LEN 1 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MINNUM 0 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM 240 -#define MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM_MCDI2 1008 - - /***********************************/ /* MC_CMD_SET_EVQ_TMR * Update the timer load, timer reload and timer mode values for a given EVQ. @@ -23242,595 +21497,25 @@ #define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_MCDI_TMR_STEP_NS_LEN 4 /* For timers updated using the bug35388 workaround, this is the time interval * (in nanoseconds) for each increment of the timer load/reload count. The - * requested duration of a timer is this value multiplied by the timer - * load/reload count. This field is only meaningful if the bug35388 workaround - * is enabled. - */ -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_OFST 24 -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_LEN 4 -/* For timers updated using the bug35388 workaround, this is the maximum value - * allowed for timer load/reload counts. This field is only meaningful if the - * bug35388 workaround is enabled. - */ -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_OFST 28 -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_LEN 4 -/* For timers updated using the bug35388 workaround, timer load/reload counts - * not a multiple of this step size will be rounded in an implementation - * defined manner. This field is only meaningful if the bug35388 workaround is - * enabled. - */ -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_OFST 32 -#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_LEN 4 - - -/***********************************/ -/* MC_CMD_ALLOCATE_TX_VFIFO_CP - * When we use the TX_vFIFO_ULL mode, we can allocate common pools using the - * non used switch buffers. - */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d -#undef MC_CMD_0x11d_PRIVILEGE_CTG - -#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20 -/* Desired instance. Must be set to a specific instance, which is a function - * local queue index. The calling client must be the currently-assigned user of - * this VI (see MC_CMD_SET_VI_USER). - */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0 -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4 -/* Will the common pool be used as TX_vFIFO_ULL (1) */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_MODE_OFST 4 -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_MODE_LEN 4 -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_ENABLED 0x1 /* enum */ -/* enum: Using this interface without TX_vFIFO_ULL is not supported for now */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_DISABLED 0x0 -/* Number of buffers to reserve for the common pool */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_SIZE_OFST 8 -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_SIZE_LEN 4 -/* TX datapath to which the Common Pool is connected to. */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INGRESS_OFST 12 -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INGRESS_LEN 4 -/* enum: Extracts information from function */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_USE_FUNCTION_VALUE -0x1 -/* Network port or RX Engine to which the common pool connects. */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_EGRESS_OFST 16 -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_EGRESS_LEN 4 -/* enum: Extracts information from function */ -/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_USE_FUNCTION_VALUE -0x1 */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT0 0x0 /* enum */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT1 0x1 /* enum */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT2 0x2 /* enum */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT3 0x3 /* enum */ -/* enum: To enable Switch loopback with Rx engine 0 */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_RX_ENGINE0 0x4 -/* enum: To enable Switch loopback with Rx engine 1 */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_RX_ENGINE1 0x5 - -/* MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT msgresponse */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_LEN 4 -/* ID of the common pool allocated */ -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_CP_ID_OFST 0 -#define MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_CP_ID_LEN 4 - - -/***********************************/ -/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO - * When we use the TX_vFIFO_ULL mode, we can allocate vFIFOs using the - * previously allocated common pools. - */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e -#undef MC_CMD_0x11e_PRIVILEGE_CTG - -#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN msgrequest */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_LEN 20 -/* Common pool previously allocated to which the new vFIFO will be associated - */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_CP_OFST 0 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_CP_LEN 4 -/* Port or RX engine to associate the vFIFO egress */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_EGRESS_OFST 4 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_EGRESS_LEN 4 -/* enum: Extracts information from common pool */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_USE_CP_VALUE -0x1 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT0 0x0 /* enum */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT1 0x1 /* enum */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT2 0x2 /* enum */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT3 0x3 /* enum */ -/* enum: To enable Switch loopback with Rx engine 0 */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_RX_ENGINE0 0x4 -/* enum: To enable Switch loopback with Rx engine 1 */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_RX_ENGINE1 0x5 -/* Minimum number of buffers that the pool must have */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_SIZE_OFST 8 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_SIZE_LEN 4 -/* enum: Do not check the space available */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_NO_MINIMUM 0x0 -/* Will the vFIFO be used as TX_vFIFO_ULL */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_MODE_OFST 12 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_MODE_LEN 4 -/* Network priority of the vFIFO,if applicable */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PRIORITY_OFST 16 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PRIORITY_LEN 4 -/* enum: Search for the lowest unused priority */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_LOWEST_AVAILABLE -0x1 - -/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT msgresponse */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_LEN 8 -/* Short vFIFO ID */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_VID_OFST 0 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_VID_LEN 4 -/* Network priority of the vFIFO */ -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_PRIORITY_OFST 4 -#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_PRIORITY_LEN 4 - - -/***********************************/ -/* MC_CMD_TEARDOWN_TX_VFIFO_VF - * This interface clears the configuration of the given vFIFO and leaves it - * ready to be re-used. - */ -#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f -#undef MC_CMD_0x11f_PRIVILEGE_CTG - -#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_TEARDOWN_TX_VFIFO_VF_IN msgrequest */ -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_LEN 4 -/* Short vFIFO ID */ -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_VFIFO_OFST 0 -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_VFIFO_LEN 4 - -/* MC_CMD_TEARDOWN_TX_VFIFO_VF_OUT msgresponse */ -#define MC_CMD_TEARDOWN_TX_VFIFO_VF_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_DEALLOCATE_TX_VFIFO_CP - * This interface clears the configuration of the given common pool and leaves - * it ready to be re-used. - */ -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121 -#undef MC_CMD_0x121_PRIVILEGE_CTG - -#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN msgrequest */ -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_LEN 4 -/* Common pool ID given when pool allocated */ -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_POOL_ID_OFST 0 -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_POOL_ID_LEN 4 - -/* MC_CMD_DEALLOCATE_TX_VFIFO_CP_OUT msgresponse */ -#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS - * This interface allows the host to find out how many common pool buffers are - * not yet assigned. - */ -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124 -#undef MC_CMD_0x124_PRIVILEGE_CTG - -#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_IN msgrequest */ -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_IN_LEN 0 - -/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT msgresponse */ -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_LEN 8 -/* Available buffers for the ENG to NET vFIFOs. */ -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_NET_OFST 0 -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_NET_LEN 4 -/* Available buffers for the ENG to ENG and NET to ENG vFIFOs. */ -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_ENG_OFST 4 -#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_ENG_LEN 4 - - -/***********************************/ -/* MC_CMD_SUC_VERSION - * Get the version of the SUC - */ -#define MC_CMD_SUC_VERSION 0x134 -#undef MC_CMD_0x134_PRIVILEGE_CTG - -#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_SUC_VERSION_IN msgrequest */ -#define MC_CMD_SUC_VERSION_IN_LEN 0 - -/* MC_CMD_SUC_VERSION_OUT msgresponse */ -#define MC_CMD_SUC_VERSION_OUT_LEN 24 -/* The SUC firmware version as four numbers - a.b.c.d */ -#define MC_CMD_SUC_VERSION_OUT_VERSION_OFST 0 -#define MC_CMD_SUC_VERSION_OUT_VERSION_LEN 4 -#define MC_CMD_SUC_VERSION_OUT_VERSION_NUM 4 -/* The date, in seconds since the Unix epoch, when the firmware image was - * built. - */ -#define MC_CMD_SUC_VERSION_OUT_BUILD_DATE_OFST 16 -#define MC_CMD_SUC_VERSION_OUT_BUILD_DATE_LEN 4 -/* The ID of the SUC chip. This is specific to the platform but typically - * indicates family, memory sizes etc. See SF-116728-SW for further details. - */ -#define MC_CMD_SUC_VERSION_OUT_CHIP_ID_OFST 20 -#define MC_CMD_SUC_VERSION_OUT_CHIP_ID_LEN 4 - -/* MC_CMD_SUC_BOOT_VERSION_IN msgrequest: Get the version of the SUC boot - * loader. - */ -#define MC_CMD_SUC_BOOT_VERSION_IN_LEN 4 -#define MC_CMD_SUC_BOOT_VERSION_IN_MAGIC_OFST 0 -#define MC_CMD_SUC_BOOT_VERSION_IN_MAGIC_LEN 4 -/* enum: Requests the SUC boot version. */ -#define MC_CMD_SUC_VERSION_GET_BOOT_VERSION 0xb007700b - -/* MC_CMD_SUC_BOOT_VERSION_OUT msgresponse */ -#define MC_CMD_SUC_BOOT_VERSION_OUT_LEN 4 -/* The SUC boot version */ -#define MC_CMD_SUC_BOOT_VERSION_OUT_VERSION_OFST 0 -#define MC_CMD_SUC_BOOT_VERSION_OUT_VERSION_LEN 4 - - -/***********************************/ -/* MC_CMD_GET_RX_PREFIX_ID - * This command is part of the mechanism for configuring the format of the RX - * packet prefix. It takes as input a bitmask of the fields the host would like - * to be in the prefix. If the hardware supports RX prefixes with that - * combination of fields, then this command returns a list of prefix-ids, - * opaque identifiers suitable for use in the RX_PREFIX_ID field of a - * MC_CMD_INIT_RXQ_V5_IN message. If the combination of fields is not - * supported, returns ENOTSUP. If the firmware can't create any new prefix-ids - * due to resource constraints, returns ENOSPC. - */ -#define MC_CMD_GET_RX_PREFIX_ID 0x13b -#undef MC_CMD_0x13b_PRIVILEGE_CTG - -#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_RX_PREFIX_ID_IN msgrequest */ -#define MC_CMD_GET_RX_PREFIX_ID_IN_LEN 8 -/* Field bitmask. */ -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32 -#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32 -#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_LBN 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_LBN 2 -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_LBN 3 -#define MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_LBN 4 -#define MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_LBN 5 -#define MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_LBN 6 -#define MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_LBN 7 -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_LBN 7 -#define MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_LBN 8 -#define MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_LBN 9 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_LBN 10 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_WIDTH 1 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_LBN 11 -#define MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_WIDTH 1 - -/* MC_CMD_GET_RX_PREFIX_ID_OUT msgresponse */ -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LENMIN 8 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX 252 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_LEN(num) (4+4*(num)) -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_NUM(len) (((len)-4)/4) -/* Number of prefix-ids returned */ -#define MC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_OFST 0 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_LEN 4 -/* Opaque prefix identifiers which can be passed into MC_CMD_INIT_RXQ_V5 or - * MC_CMD_QUERY_PREFIX_ID - */ -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_OFST 4 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_LEN 4 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MINNUM 1 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM 62 -#define MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM_MCDI2 254 - -/* RX_PREFIX_FIELD_INFO structuredef: Information about a single RX prefix - * field - */ -#define RX_PREFIX_FIELD_INFO_LEN 4 -/* The offset of the field from the start of the prefix, in bits */ -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_OFST 0 -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_LEN 2 -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_LBN 0 -#define RX_PREFIX_FIELD_INFO_OFFSET_BITS_WIDTH 16 -/* The width of the field, in bits */ -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_OFST 2 -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_LEN 1 -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_LBN 16 -#define RX_PREFIX_FIELD_INFO_WIDTH_BITS_WIDTH 8 -/* The type of the field. These enum values are in the same order as the fields - * in the MC_CMD_GET_RX_PREFIX_ID_IN bitmask - */ -#define RX_PREFIX_FIELD_INFO_TYPE_OFST 3 -#define RX_PREFIX_FIELD_INFO_TYPE_LEN 1 -#define RX_PREFIX_FIELD_INFO_LENGTH 0x0 /* enum */ -#define RX_PREFIX_FIELD_INFO_RSS_HASH_VALID 0x1 /* enum */ -#define RX_PREFIX_FIELD_INFO_USER_FLAG 0x2 /* enum */ -#define RX_PREFIX_FIELD_INFO_CLASS 0x3 /* enum */ -#define RX_PREFIX_FIELD_INFO_PARTIAL_TSTAMP 0x4 /* enum */ -#define RX_PREFIX_FIELD_INFO_RSS_HASH 0x5 /* enum */ -#define RX_PREFIX_FIELD_INFO_USER_MARK 0x6 /* enum */ -#define RX_PREFIX_FIELD_INFO_INGRESS_MPORT 0x7 /* enum */ -#define RX_PREFIX_FIELD_INFO_INGRESS_VPORT 0x7 /* enum */ -#define RX_PREFIX_FIELD_INFO_CSUM_FRAME 0x8 /* enum */ -#define RX_PREFIX_FIELD_INFO_VLAN_STRIP_TCI 0x9 /* enum */ -#define RX_PREFIX_FIELD_INFO_VLAN_STRIPPED 0xa /* enum */ -#define RX_PREFIX_FIELD_INFO_VSWITCH_STATUS 0xb /* enum */ -#define RX_PREFIX_FIELD_INFO_TYPE_LBN 24 -#define RX_PREFIX_FIELD_INFO_TYPE_WIDTH 8 - -/* RX_PREFIX_FIXED_RESPONSE structuredef: Information about an RX prefix in - * which every field has a fixed offset and width - */ -#define RX_PREFIX_FIXED_RESPONSE_LENMIN 4 -#define RX_PREFIX_FIXED_RESPONSE_LENMAX 252 -#define RX_PREFIX_FIXED_RESPONSE_LENMAX_MCDI2 1020 -#define RX_PREFIX_FIXED_RESPONSE_LEN(num) (4+4*(num)) -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_NUM(len) (((len)-4)/4) -/* Length of the RX prefix in bytes */ -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_OFST 0 -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LEN 1 -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LBN 0 -#define RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_WIDTH 8 -/* Number of fields present in the prefix */ -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_OFST 1 -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LEN 1 -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LBN 8 -#define RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_WIDTH 8 -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_OFST 2 -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_LEN 2 -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_LBN 16 -#define RX_PREFIX_FIXED_RESPONSE_RESERVED_WIDTH 16 -/* Array of RX_PREFIX_FIELD_INFO structures, of length FIELD_COUNT */ -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_OFST 4 -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_LEN 4 -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_MINNUM 0 -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM 62 -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM_MCDI2 254 -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_LBN 32 -#define RX_PREFIX_FIXED_RESPONSE_FIELDS_WIDTH 32 - - -/***********************************/ -/* MC_CMD_QUERY_RX_PREFIX_ID - * This command takes an RX prefix id (obtained from MC_CMD_GET_RX_PREFIX_ID) - * and returns a description of the RX prefix of packets delievered to an RXQ - * created with that prefix id - */ -#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c -#undef MC_CMD_0x13c_PRIVILEGE_CTG - -#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_QUERY_RX_PREFIX_ID_IN msgrequest */ -#define MC_CMD_QUERY_RX_PREFIX_ID_IN_LEN 4 -/* Prefix id to query */ -#define MC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_OFST 0 -#define MC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_LEN 4 - -/* MC_CMD_QUERY_RX_PREFIX_ID_OUT msgresponse */ -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMIN 4 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX 252 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_LEN(num) (4+1*(num)) -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_NUM(len) (((len)-4)/1) -/* An enum describing the structure of this response. */ -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_OFST 0 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_LEN 1 -/* enum: The response is of format RX_PREFIX_FIXED_RESPONSE */ -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_FIXED 0x0 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_OFST 1 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_LEN 3 -/* The response. Its format is as defined by the RESPONSE_TYPE value */ -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_OFST 4 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_LEN 1 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MINNUM 0 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM 248 -#define MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM_MCDI2 1016 - - -/***********************************/ -/* MC_CMD_BUNDLE - * A command to perform various bundle-related operations on insecure cards. - */ -#define MC_CMD_BUNDLE 0x13d -#undef MC_CMD_0x13d_PRIVILEGE_CTG - -#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE - -/* MC_CMD_BUNDLE_IN msgrequest */ -#define MC_CMD_BUNDLE_IN_LEN 4 -/* Sub-command code */ -#define MC_CMD_BUNDLE_IN_OP_OFST 0 -#define MC_CMD_BUNDLE_IN_OP_LEN 4 -/* enum: Get the current host access mode set on component partitions. */ -#define MC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_GET 0x0 -/* enum: Set the host access mode set on component partitions. */ -#define MC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_SET 0x1 - -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN msgrequest: Retrieve the current - * access mode on component partitions such as MC_FIRMWARE, SUC_FIRMWARE and - * EXPANSION_UEFI. This command only works on engineering (insecure) cards. On - * secure adapters, this command returns MC_CMD_ERR_EPERM. - */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_LEN 4 -/* Sub-command code. Must be OP_COMPONENT_ACCESS_GET. */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_OFST 0 -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_LEN 4 - -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT msgresponse: Returns the access - * control mode. - */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_LEN 4 -/* Access mode of component partitions. */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_OFST 0 -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_LEN 4 -/* enum: Component partitions are read-only from the host. */ -#define MC_CMD_BUNDLE_COMPONENTS_READ_ONLY 0x0 -/* enum: Component partitions can read read-from written-to by the host. */ -#define MC_CMD_BUNDLE_COMPONENTS_READ_WRITE 0x1 - -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN msgrequest: The component - * partitions such as MC_FIRMWARE, SUC_FIRMWARE, EXPANSION_UEFI are set as - * read-only on firmware built with bundle support. This command marks these - * partitions as read/writeable. The access status set by this command does not - * persist across MC reboots. This command only works on engineering (insecure) - * cards. On secure adapters, this command returns MC_CMD_ERR_EPERM. - */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_LEN 8 -/* Sub-command code. Must be OP_COMPONENT_ACCESS_SET. */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_OFST 0 -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_LEN 4 -/* Access mode of component partitions. */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_OFST 4 -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT/ACCESS_MODE */ - -/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT msgresponse */ -#define MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_GET_VPD - * Read all VPD starting from a given address + * requested duration of a timer is this value multiplied by the timer + * load/reload count. This field is only meaningful if the bug35388 workaround + * is enabled. */ -#define MC_CMD_GET_VPD 0x165 -#undef MC_CMD_0x165_PRIVILEGE_CTG - -#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_VPD_IN msgresponse */ -#define MC_CMD_GET_VPD_IN_LEN 4 -/* VPD address to start from. In case VPD is longer than MCDI buffer - * (unlikely), user can make multiple calls with different starting addresses. +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_OFST 24 +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_NS_PER_COUNT_LEN 4 +/* For timers updated using the bug35388 workaround, this is the maximum value + * allowed for timer load/reload counts. This field is only meaningful if the + * bug35388 workaround is enabled. */ -#define MC_CMD_GET_VPD_IN_ADDR_OFST 0 -#define MC_CMD_GET_VPD_IN_ADDR_LEN 4 - -/* MC_CMD_GET_VPD_OUT msgresponse */ -#define MC_CMD_GET_VPD_OUT_LENMIN 0 -#define MC_CMD_GET_VPD_OUT_LENMAX 252 -#define MC_CMD_GET_VPD_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_GET_VPD_OUT_LEN(num) (0+1*(num)) -#define MC_CMD_GET_VPD_OUT_DATA_NUM(len) (((len)-0)/1) -/* VPD data returned. */ -#define MC_CMD_GET_VPD_OUT_DATA_OFST 0 -#define MC_CMD_GET_VPD_OUT_DATA_LEN 1 -#define MC_CMD_GET_VPD_OUT_DATA_MINNUM 0 -#define MC_CMD_GET_VPD_OUT_DATA_MAXNUM 252 -#define MC_CMD_GET_VPD_OUT_DATA_MAXNUM_MCDI2 1020 - - -/***********************************/ -/* MC_CMD_GET_NCSI_INFO - * Provide information about the NC-SI stack - */ -#define MC_CMD_GET_NCSI_INFO 0x167 -#undef MC_CMD_0x167_PRIVILEGE_CTG - -#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_NCSI_INFO_IN msgrequest */ -#define MC_CMD_GET_NCSI_INFO_IN_LEN 8 -/* Operation to be performed */ -#define MC_CMD_GET_NCSI_INFO_IN_OP_OFST 0 -#define MC_CMD_GET_NCSI_INFO_IN_OP_LEN 4 -/* enum: Information on the link settings. */ -#define MC_CMD_GET_NCSI_INFO_IN_OP_LINK 0x0 -/* enum: Statistics associated with the channel */ -#define MC_CMD_GET_NCSI_INFO_IN_OP_STATISTICS 0x1 -/* The NC-SI channel on which the operation is to be performed */ -#define MC_CMD_GET_NCSI_INFO_IN_CHANNEL_OFST 4 -#define MC_CMD_GET_NCSI_INFO_IN_CHANNEL_LEN 4 - -/* MC_CMD_GET_NCSI_INFO_LINK_OUT msgresponse */ -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_LEN 12 -/* Settings as received from BMC. */ -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_OFST 0 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_LEN 4 -/* Advertised capabilities applied to channel. */ -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_OFST 4 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_LEN 4 -/* General status */ -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_OFST 8 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_LEN 4 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_OFST 8 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_LBN 0 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_WIDTH 2 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_OFST 8 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_LBN 2 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_WIDTH 1 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_OFST 8 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_LBN 3 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_WIDTH 1 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_OFST 8 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_LBN 4 -#define MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_WIDTH 1 - -/* MC_CMD_GET_NCSI_INFO_STATISTICS_OUT msgresponse */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_LEN 28 -/* The number of NC-SI commands received. */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_OFST 0 -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_LEN 4 -/* The number of NC-SI commands dropped. */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_OFST 4 -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_LEN 4 -/* The number of invalid NC-SI commands received. */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_OFST 8 -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_LEN 4 -/* The number of checksum errors seen. */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_OFST 12 -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_LEN 4 -/* The number of NC-SI requests received. */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_OFST 16 -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_LEN 4 -/* The number of NC-SI responses sent (includes AENs) */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_OFST 20 -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_LEN 4 -/* The number of NC-SI AENs sent */ -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_OFST 24 -#define MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_LEN 4 +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_OFST 28 +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_MAX_COUNT_LEN 4 +/* For timers updated using the bug35388 workaround, timer load/reload counts + * not a multiple of this step size will be rounded in an implementation + * defined manner. This field is only meaningful if the bug35388 workaround is + * enabled. + */ +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_OFST 32 +#define MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_LEN 4 /* CLIENT_HANDLE structuredef: A client is an abstract entity that can make * requests of the device and that can own resources managed by the device. @@ -23848,59 +21533,10 @@ #define CLIENT_HANDLE_OPAQUE_LBN 0 #define CLIENT_HANDLE_OPAQUE_WIDTH 32 -/* CLOCK_INFO structuredef: Information about a single hardware clock */ -#define CLOCK_INFO_LEN 28 -/* Enumeration that uniquely identifies the clock */ -#define CLOCK_INFO_CLOCK_ID_OFST 0 -#define CLOCK_INFO_CLOCK_ID_LEN 2 -/* enum: The Riverhead CMC (card MC) */ -#define CLOCK_INFO_CLOCK_CMC 0x0 -/* enum: The Riverhead NMC (network MC) */ -#define CLOCK_INFO_CLOCK_NMC 0x1 -/* enum: The Riverhead SDNET slice main logic */ -#define CLOCK_INFO_CLOCK_SDNET 0x2 -/* enum: The Riverhead SDNET LUT */ -#define CLOCK_INFO_CLOCK_SDNET_LUT 0x3 -/* enum: The Riverhead SDNET control logic */ -#define CLOCK_INFO_CLOCK_SDNET_CTRL 0x4 -/* enum: The Riverhead Streaming SubSystem */ -#define CLOCK_INFO_CLOCK_SSS 0x5 -/* enum: The Riverhead network MAC and associated CSR registers */ -#define CLOCK_INFO_CLOCK_MAC 0x6 -#define CLOCK_INFO_CLOCK_ID_LBN 0 -#define CLOCK_INFO_CLOCK_ID_WIDTH 16 -/* Assorted flags */ -#define CLOCK_INFO_FLAGS_OFST 2 -#define CLOCK_INFO_FLAGS_LEN 2 -#define CLOCK_INFO_SETTABLE_OFST 2 -#define CLOCK_INFO_SETTABLE_LBN 0 -#define CLOCK_INFO_SETTABLE_WIDTH 1 -#define CLOCK_INFO_FLAGS_LBN 16 -#define CLOCK_INFO_FLAGS_WIDTH 16 -/* The frequency in HZ */ -#define CLOCK_INFO_FREQUENCY_OFST 4 -#define CLOCK_INFO_FREQUENCY_LEN 8 -#define CLOCK_INFO_FREQUENCY_LO_OFST 4 -#define CLOCK_INFO_FREQUENCY_LO_LEN 4 -#define CLOCK_INFO_FREQUENCY_LO_LBN 32 -#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32 -#define CLOCK_INFO_FREQUENCY_HI_OFST 8 -#define CLOCK_INFO_FREQUENCY_HI_LEN 4 -#define CLOCK_INFO_FREQUENCY_HI_LBN 64 -#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32 -#define CLOCK_INFO_FREQUENCY_LBN 32 -#define CLOCK_INFO_FREQUENCY_WIDTH 64 -/* Human-readable ASCII name for clock, with NUL termination */ -#define CLOCK_INFO_NAME_OFST 12 -#define CLOCK_INFO_NAME_LEN 1 -#define CLOCK_INFO_NAME_NUM 16 -#define CLOCK_INFO_NAME_LBN 96 -#define CLOCK_INFO_NAME_WIDTH 8 - /* SCHED_CREDIT_CHECK_RESULT structuredef */ #define SCHED_CREDIT_CHECK_RESULT_LEN 16 -/* The instance of the scheduler. Refer to XN-200389-AW for the location of - * these schedulers in the hardware. +/* The instance of the scheduler. Refer to XN-200389-AW (snic/hnic) and + * XN-200425-TC (cdx) for the location of these schedulers in the hardware. */ #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0 #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1 @@ -23914,6 +21550,16 @@ #define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */ #define SCHED_CREDIT_CHECK_RESULT_HUB_NET_B 0x8 /* enum */ #define SCHED_CREDIT_CHECK_RESULT_HUB_NET_REPLAY 0x9 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_ADAPTER_C2H_C 0xa /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A2_H2C_C 0xb /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A3_SOFT_ADAPTOR_C 0xc /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A4_DPU_WRITE_C 0xd /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_JRC_RRU 0xe /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_CDM_SINK 0xf /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_PCIE_SINK 0x10 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_UPORT_SINK 0x11 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_PSX_SINK 0x12 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A5_DPU_READ_C 0x13 /* enum */ #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0 #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8 /* The type of node that this result refers to. */ @@ -23923,6 +21569,10 @@ #define SCHED_CREDIT_CHECK_RESULT_DEST 0x0 /* enum: Source node */ #define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1 +/* enum: Destination node credit type 1 (new to the Keystone schedulers, see + * SF-120268-TC) + */ +#define SCHED_CREDIT_CHECK_RESULT_DEST_CREDIT1 0x2 #define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8 #define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8 /* Level of node in scheduler hierarchy (level 0 is the bottom of the @@ -23949,592 +21599,6 @@ #define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32 -/***********************************/ -/* MC_CMD_GET_CLOCKS_INFO - * Get information about the device clocks - */ -#define MC_CMD_GET_CLOCKS_INFO 0x166 -#undef MC_CMD_0x166_PRIVILEGE_CTG - -#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_CLOCKS_INFO_IN msgrequest */ -#define MC_CMD_GET_CLOCKS_INFO_IN_LEN 0 - -/* MC_CMD_GET_CLOCKS_INFO_OUT msgresponse */ -#define MC_CMD_GET_CLOCKS_INFO_OUT_LENMIN 0 -#define MC_CMD_GET_CLOCKS_INFO_OUT_LENMAX 252 -#define MC_CMD_GET_CLOCKS_INFO_OUT_LENMAX_MCDI2 1008 -#define MC_CMD_GET_CLOCKS_INFO_OUT_LEN(num) (0+28*(num)) -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_NUM(len) (((len)-0)/28) -/* An array of CLOCK_INFO structures. */ -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_OFST 0 -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_LEN 28 -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MINNUM 0 -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM 9 -#define MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM_MCDI2 36 - - -/***********************************/ -/* MC_CMD_VNIC_ENCAP_RULE_ADD - * Add a rule for detecting encapsulations in the VNIC stage. Currently this - * only affects checksum validation in VNIC RX - on TX the send descriptor - * explicitly specifies encapsulation. These rules are per-VNIC, i.e. only - * apply to the current driver. If a rule matches, then the packet is - * considered to have the corresponding encapsulation type, and the inner - * packet is parsed. It is up to the driver to ensure that overlapping rules - * are not inserted. (If a packet would match multiple rules, a random one of - * them will be used.) A rule with the exact same match criteria may not be - * inserted twice (EALREADY). Only a limited number MATCH_FLAGS values are - * supported, use MC_CMD_GET_PARSER_DISP_INFO with OP - * OP_GET_SUPPORTED_VNIC_ENCAP_RULE_MATCHES to get a list of supported - * combinations. Each driver may only have a limited set of active rules - - * returns ENOSPC if the caller's table is full. - */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d -#undef MC_CMD_0x16d_PRIVILEGE_CTG - -#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_VNIC_ENCAP_RULE_ADD_IN msgrequest */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_LEN 36 -/* Set to MAE_MPORT_SELECTOR_ASSIGNED. In the future this may be relaxed. */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_OFST 0 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_LEN 4 -/* Any non-zero bits other than the ones named below or an unsupported - * combination will cause the NIC to return EOPNOTSUPP. In the future more - * flags may be added. - */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_OFST 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_LEN 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_OFST 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_LBN 0 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_WIDTH 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_OFST 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_LBN 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_WIDTH 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_OFST 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_LBN 2 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_WIDTH 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_OFST 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_LBN 3 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_WIDTH 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_OFST 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_LBN 4 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_WIDTH 1 -/* Only if MATCH_ETHER_TYPE is set. Ethertype value as bytes in network order. - * Currently only IPv4 (0x0800) and IPv6 (0x86DD) ethertypes may be used. - */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_OFST 8 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_LEN 2 -/* Only if MATCH_OUTER_VLAN is set. VID value as bytes in network order. - * (Deprecated) - */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_LBN 80 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WIDTH 12 -/* Only if MATCH_OUTER_VLAN is set. Aligned wrapper for OUTER_VLAN_VID. */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_OFST 10 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_LEN 2 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_OFST 10 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_LBN 0 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_WIDTH 12 -/* Only if MATCH_DST_IP is set. IP address as bytes in network order. In the - * case of IPv4, the IP should be in the first 4 bytes and all other bytes - * should be zero. - */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_OFST 12 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_LEN 16 -/* Only if MATCH_IP_PROTO is set. Currently only UDP proto (17) may be used. */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_OFST 28 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_LEN 1 -/* Actions that should be applied to packets match the rule. */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_OFST 29 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_LEN 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_OFST 29 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_LBN 0 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_WIDTH 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_OFST 29 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_LBN 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_WIDTH 1 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_OFST 29 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_LBN 2 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_WIDTH 1 -/* Only if MATCH_DST_PORT is set. Port number as bytes in network order. */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_OFST 30 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_LEN 2 -/* Resulting encapsulation type, as per MAE_MCDI_ENCAP_TYPE enumeration. */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_OFST 32 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_LEN 4 - -/* MC_CMD_VNIC_ENCAP_RULE_ADD_OUT msgresponse */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_LEN 4 -/* Handle to inserted rule. Used for removing the rule. */ -#define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_OFST 0 -#define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_LEN 4 - - -/***********************************/ -/* MC_CMD_VNIC_ENCAP_RULE_REMOVE - * Remove a VNIC encapsulation rule. Packets which would have previously - * matched the rule will then be considered as unencapsulated. Returns EALREADY - * if the input HANDLE doesn't correspond to an existing rule. - */ -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e -#undef MC_CMD_0x16e_PRIVILEGE_CTG - -#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN msgrequest */ -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_LEN 4 -/* Handle which was returned by MC_CMD_VNIC_ENCAP_RULE_ADD. */ -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_OFST 0 -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_LEN 4 - -/* MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT msgresponse */ -#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT_LEN 0 - -/* UUID structuredef: An RFC4122 standard UUID. The values here are stored in - * the endianness specified by the RFC; users should ignore the broken-out - * fields and instead do straight memory copies to ensure correct ordering. - */ -#define UUID_LEN 16 -#define UUID_TIME_LOW_OFST 0 -#define UUID_TIME_LOW_LEN 4 -#define UUID_TIME_LOW_LBN 0 -#define UUID_TIME_LOW_WIDTH 32 -#define UUID_TIME_MID_OFST 4 -#define UUID_TIME_MID_LEN 2 -#define UUID_TIME_MID_LBN 32 -#define UUID_TIME_MID_WIDTH 16 -#define UUID_TIME_HI_LBN 52 -#define UUID_TIME_HI_WIDTH 12 -#define UUID_VERSION_LBN 48 -#define UUID_VERSION_WIDTH 4 -#define UUID_RESERVED_LBN 64 -#define UUID_RESERVED_WIDTH 2 -#define UUID_CLK_SEQ_LBN 66 -#define UUID_CLK_SEQ_WIDTH 14 -#define UUID_NODE_OFST 10 -#define UUID_NODE_LEN 6 -#define UUID_NODE_LBN 80 -#define UUID_NODE_WIDTH 48 - - -/***********************************/ -/* MC_CMD_PLUGIN_ALLOC - * Create a handle to a datapath plugin's extension. This involves finding a - * currently-loaded plugin offering the given functionality (as identified by - * the UUID) and allocating a handle to track the usage of it. Plugin - * functionality is identified by 'extension' rather than any other identifier - * so that a single plugin bitfile may offer more than one piece of independent - * functionality. If two bitfiles are loaded which both offer the same - * extension, then the metadata is interrogated further to determine which is - * the newest and that is the one opened. See SF-123625-SW for architectural - * detail on datapath plugins. - */ -#define MC_CMD_PLUGIN_ALLOC 0x1ad -#undef MC_CMD_0x1ad_PRIVILEGE_CTG - -#define MC_CMD_0x1ad_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_PLUGIN_ALLOC_IN msgrequest */ -#define MC_CMD_PLUGIN_ALLOC_IN_LEN 24 -/* The functionality requested of the plugin, as a UUID structure */ -#define MC_CMD_PLUGIN_ALLOC_IN_UUID_OFST 0 -#define MC_CMD_PLUGIN_ALLOC_IN_UUID_LEN 16 -/* Additional options for opening the handle */ -#define MC_CMD_PLUGIN_ALLOC_IN_FLAGS_OFST 16 -#define MC_CMD_PLUGIN_ALLOC_IN_FLAGS_LEN 4 -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_OFST 16 -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_LBN 0 -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_WIDTH 1 -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_OFST 16 -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_LBN 1 -#define MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_WIDTH 1 -/* Load the extension only if it is in the specified administrative group. - * Specify ANY to load the extension wherever it is found (if there are - * multiple choices then the extension with the highest MINOR_VER/PATCH_VER - * will be loaded). See MC_CMD_PLUGIN_GET_META_GLOBAL for a description of - * administrative groups. - */ -#define MC_CMD_PLUGIN_ALLOC_IN_ADMIN_GROUP_OFST 20 -#define MC_CMD_PLUGIN_ALLOC_IN_ADMIN_GROUP_LEN 2 -/* enum: Load the extension from any ADMIN_GROUP. */ -#define MC_CMD_PLUGIN_ALLOC_IN_ANY 0xffff -/* Reserved */ -#define MC_CMD_PLUGIN_ALLOC_IN_RESERVED_OFST 22 -#define MC_CMD_PLUGIN_ALLOC_IN_RESERVED_LEN 2 - -/* MC_CMD_PLUGIN_ALLOC_OUT msgresponse */ -#define MC_CMD_PLUGIN_ALLOC_OUT_LEN 4 -/* Unique identifier of this usage */ -#define MC_CMD_PLUGIN_ALLOC_OUT_HANDLE_OFST 0 -#define MC_CMD_PLUGIN_ALLOC_OUT_HANDLE_LEN 4 - - -/***********************************/ -/* MC_CMD_PLUGIN_FREE - * Delete a handle to a plugin's extension. - */ -#define MC_CMD_PLUGIN_FREE 0x1ae -#undef MC_CMD_0x1ae_PRIVILEGE_CTG - -#define MC_CMD_0x1ae_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_PLUGIN_FREE_IN msgrequest */ -#define MC_CMD_PLUGIN_FREE_IN_LEN 4 -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ -#define MC_CMD_PLUGIN_FREE_IN_HANDLE_OFST 0 -#define MC_CMD_PLUGIN_FREE_IN_HANDLE_LEN 4 - -/* MC_CMD_PLUGIN_FREE_OUT msgresponse */ -#define MC_CMD_PLUGIN_FREE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_PLUGIN_GET_META_GLOBAL - * Returns the global metadata applying to the whole plugin extension. See the - * other metadata calls for subtypes of data. - */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL 0x1af -#undef MC_CMD_0x1af_PRIVILEGE_CTG - -#define MC_CMD_0x1af_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_PLUGIN_GET_META_GLOBAL_IN msgrequest */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_IN_LEN 4 -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_IN_HANDLE_OFST 0 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_IN_HANDLE_LEN 4 - -/* MC_CMD_PLUGIN_GET_META_GLOBAL_OUT msgresponse */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_LEN 36 -/* Unique identifier of this plugin extension. This is identical to the value - * which was requested when the handle was allocated. - */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_UUID_OFST 0 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_UUID_LEN 16 -/* semver sub-version of this plugin extension */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MINOR_VER_OFST 16 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MINOR_VER_LEN 2 -/* semver micro-version of this plugin extension */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PATCH_VER_OFST 18 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PATCH_VER_LEN 2 -/* Number of different messages which can be sent to this extension */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_NUM_MSGS_OFST 20 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_NUM_MSGS_LEN 4 -/* Byte offset within the VI window of the plugin's mapped CSR window. */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_OFFSET_OFST 24 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_OFFSET_LEN 2 -/* Number of bytes mapped through to the plugin's CSRs. 0 if that feature was - * not requested by the plugin (in which case MAPPED_CSR_OFFSET and - * MAPPED_CSR_FLAGS are ignored). - */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_SIZE_OFST 26 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_SIZE_LEN 2 -/* Flags indicating how to perform the CSR window mapping. */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAGS_OFST 28 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAGS_LEN 4 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_OFST 28 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_LBN 0 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_WIDTH 1 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_OFST 28 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_LBN 1 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_WIDTH 1 -/* Identifier of the set of extensions which all change state together. - * Extensions having the same ADMIN_GROUP will always load and unload at the - * same time. ADMIN_GROUP values themselves are arbitrary (but they contain a - * generation number as an implementation detail to ensure that they're not - * reused rapidly). - */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_ADMIN_GROUP_OFST 32 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_ADMIN_GROUP_LEN 1 -/* Bitshift in MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY's MASK parameters - * corresponding to this extension, i.e. set the bit 1<<PRIVILEGE_BIT to permit - * access to this extension. - */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PRIVILEGE_BIT_OFST 33 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PRIVILEGE_BIT_LEN 1 -/* Reserved */ -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_RESERVED_OFST 34 -#define MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_RESERVED_LEN 2 - - -/***********************************/ -/* MC_CMD_PLUGIN_GET_META_PUBLISHER - * Returns metadata supplied by the plugin author which describes this - * extension in a human-readable way. Contrast with - * MC_CMD_PLUGIN_GET_META_GLOBAL, which returns information needed for software - * to operate. - */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER 0x1b0 -#undef MC_CMD_0x1b0_PRIVILEGE_CTG - -#define MC_CMD_0x1b0_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_PLUGIN_GET_META_PUBLISHER_IN msgrequest */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_LEN 12 -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_HANDLE_OFST 0 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_HANDLE_LEN 4 -/* Category of data to return */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_SUBTYPE_OFST 4 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_SUBTYPE_LEN 4 -/* enum: Top-level information about the extension. The returned data is an - * array of key/value pairs using the keys in RFC5013 (Dublin Core) to describe - * the extension. The data is a back-to-back list of zero-terminated strings; - * the even-numbered fields (0,2,4,...) are keys and their following odd- - * numbered fields are the corresponding values. Both keys and values are - * nominally UTF-8. Per RFC5013, the same key may be repeated any number of - * times. Note that all information (including the key/value structure itself - * and the UTF-8 encoding) may have been provided by the plugin author, so - * callers must be cautious about parsing it. Callers should parse only the - * top-level structure to separate out the keys and values; the contents of the - * values is not expected to be machine-readable. - */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_EXTENSION_KVS 0x0 -/* Byte position of the data to be returned within the full data block of the - * given SUBTYPE. - */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_OFFSET_OFST 8 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_OFFSET_LEN 4 - -/* MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT msgresponse */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMIN 4 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMAX 252 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LEN(num) (4+1*(num)) -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_NUM(len) (((len)-4)/1) -/* Full length of the data block of the requested SUBTYPE, in bytes. */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_TOTAL_SIZE_OFST 0 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_TOTAL_SIZE_LEN 4 -/* The information requested by SUBTYPE. */ -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_OFST 4 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_LEN 1 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MINNUM 0 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MAXNUM 248 -#define MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MAXNUM_MCDI2 1016 - - -/***********************************/ -/* MC_CMD_PLUGIN_GET_META_MSG - * Returns the simple metadata for a specific plugin request message. This - * supplies information necessary for the host to know how to build an - * MC_CMD_PLUGIN_REQ request. - */ -#define MC_CMD_PLUGIN_GET_META_MSG 0x1b1 -#undef MC_CMD_0x1b1_PRIVILEGE_CTG - -#define MC_CMD_0x1b1_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_PLUGIN_GET_META_MSG_IN msgrequest */ -#define MC_CMD_PLUGIN_GET_META_MSG_IN_LEN 8 -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ -#define MC_CMD_PLUGIN_GET_META_MSG_IN_HANDLE_OFST 0 -#define MC_CMD_PLUGIN_GET_META_MSG_IN_HANDLE_LEN 4 -/* Unique message ID to obtain */ -#define MC_CMD_PLUGIN_GET_META_MSG_IN_ID_OFST 4 -#define MC_CMD_PLUGIN_GET_META_MSG_IN_ID_LEN 4 - -/* MC_CMD_PLUGIN_GET_META_MSG_OUT msgresponse */ -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_LEN 44 -/* Unique message ID. This is the same value as the input parameter; it exists - * to allow future MCDI extensions which enumerate all messages. - */ -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_ID_OFST 0 -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_ID_LEN 4 -/* Packed index number of this message, assigned by the MC to give each message - * a unique ID in an array to allow for more efficient storage/management. - */ -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_INDEX_OFST 4 -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_INDEX_LEN 4 -/* Short human-readable codename for this message. This is conventionally - * formatted as a C identifier in the basic ASCII character set with any spare - * bytes at the end set to 0, however this convention is not enforced by the MC - * so consumers must check for all potential malformations before using it for - * a trusted purpose. - */ -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_NAME_OFST 8 -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_NAME_LEN 32 -/* Number of bytes of data which must be passed from the host kernel to the MC - * for this message's payload, and which are passed back again in the response. - * The MC's plugin metadata loader will have validated that the number of bytes - * specified here will fit in to MC_CMD_PLUGIN_REQ_IN_DATA in a single MCDI - * message. - */ -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_DATA_SIZE_OFST 40 -#define MC_CMD_PLUGIN_GET_META_MSG_OUT_DATA_SIZE_LEN 4 - -/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe - * an individual extension. - */ -#define PLUGIN_EXTENSION_LEN 20 -#define PLUGIN_EXTENSION_UUID_OFST 0 -#define PLUGIN_EXTENSION_UUID_LEN 16 -#define PLUGIN_EXTENSION_UUID_LBN 0 -#define PLUGIN_EXTENSION_UUID_WIDTH 128 -#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16 -#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1 -#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128 -#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8 -#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136 -#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1 -#define PLUGIN_EXTENSION_RESERVED_LBN 137 -#define PLUGIN_EXTENSION_RESERVED_WIDTH 23 - - -/***********************************/ -/* MC_CMD_PLUGIN_GET_ALL - * Returns a list of all plugin extensions currently loaded and available. The - * UUIDs returned can be passed to MC_CMD_PLUGIN_ALLOC in order to obtain more - * detailed metadata via the MC_CMD_PLUGIN_GET_META_* family of requests. The - * ADMIN_GROUP field collects how extensions are grouped in to units which are - * loaded/unloaded together; extensions with the same value are in the same - * group. - */ -#define MC_CMD_PLUGIN_GET_ALL 0x1b2 -#undef MC_CMD_0x1b2_PRIVILEGE_CTG - -#define MC_CMD_0x1b2_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_PLUGIN_GET_ALL_IN msgrequest */ -#define MC_CMD_PLUGIN_GET_ALL_IN_LEN 4 -/* Additional options for querying. Note that if neither FLAG_INCLUDE_ENABLED - * nor FLAG_INCLUDE_DISABLED are specified then the result set will be empty. - */ -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAGS_OFST 0 -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAGS_LEN 4 -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_OFST 0 -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_LBN 0 -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_WIDTH 1 -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_OFST 0 -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_LBN 1 -#define MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_WIDTH 1 - -/* MC_CMD_PLUGIN_GET_ALL_OUT msgresponse */ -#define MC_CMD_PLUGIN_GET_ALL_OUT_LENMIN 0 -#define MC_CMD_PLUGIN_GET_ALL_OUT_LENMAX 240 -#define MC_CMD_PLUGIN_GET_ALL_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_PLUGIN_GET_ALL_OUT_LEN(num) (0+20*(num)) -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_NUM(len) (((len)-0)/20) -/* The list of available plugin extensions, as an array of PLUGIN_EXTENSION - * structs. - */ -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_OFST 0 -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_LEN 20 -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MINNUM 0 -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MAXNUM 12 -#define MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MAXNUM_MCDI2 51 - - -/***********************************/ -/* MC_CMD_PLUGIN_REQ - * Send a command to a plugin. A plugin may define an arbitrary number of - * 'messages' which it allows applications on the host system to send, each - * identified by a 32-bit ID. - */ -#define MC_CMD_PLUGIN_REQ 0x1b3 -#undef MC_CMD_0x1b3_PRIVILEGE_CTG - -#define MC_CMD_0x1b3_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_PLUGIN_REQ_IN msgrequest */ -#define MC_CMD_PLUGIN_REQ_IN_LENMIN 8 -#define MC_CMD_PLUGIN_REQ_IN_LENMAX 252 -#define MC_CMD_PLUGIN_REQ_IN_LENMAX_MCDI2 1020 -#define MC_CMD_PLUGIN_REQ_IN_LEN(num) (8+1*(num)) -#define MC_CMD_PLUGIN_REQ_IN_DATA_NUM(len) (((len)-8)/1) -/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */ -#define MC_CMD_PLUGIN_REQ_IN_HANDLE_OFST 0 -#define MC_CMD_PLUGIN_REQ_IN_HANDLE_LEN 4 -/* Message ID defined by the plugin author */ -#define MC_CMD_PLUGIN_REQ_IN_ID_OFST 4 -#define MC_CMD_PLUGIN_REQ_IN_ID_LEN 4 -/* Data blob being the parameter to the message. This must be of the length - * specified by MC_CMD_PLUGIN_GET_META_MSG_IN_MCDI_PARAM_SIZE. - */ -#define MC_CMD_PLUGIN_REQ_IN_DATA_OFST 8 -#define MC_CMD_PLUGIN_REQ_IN_DATA_LEN 1 -#define MC_CMD_PLUGIN_REQ_IN_DATA_MINNUM 0 -#define MC_CMD_PLUGIN_REQ_IN_DATA_MAXNUM 244 -#define MC_CMD_PLUGIN_REQ_IN_DATA_MAXNUM_MCDI2 1012 - -/* MC_CMD_PLUGIN_REQ_OUT msgresponse */ -#define MC_CMD_PLUGIN_REQ_OUT_LENMIN 0 -#define MC_CMD_PLUGIN_REQ_OUT_LENMAX 252 -#define MC_CMD_PLUGIN_REQ_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_PLUGIN_REQ_OUT_LEN(num) (0+1*(num)) -#define MC_CMD_PLUGIN_REQ_OUT_DATA_NUM(len) (((len)-0)/1) -/* The input data, as transformed and/or updated by the plugin's eBPF. Will be - * the same size as the input DATA parameter. - */ -#define MC_CMD_PLUGIN_REQ_OUT_DATA_OFST 0 -#define MC_CMD_PLUGIN_REQ_OUT_DATA_LEN 1 -#define MC_CMD_PLUGIN_REQ_OUT_DATA_MINNUM 0 -#define MC_CMD_PLUGIN_REQ_OUT_DATA_MAXNUM 252 -#define MC_CMD_PLUGIN_REQ_OUT_DATA_MAXNUM_MCDI2 1020 - -/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR - * space that maps to a contiguous region of TRGT_ADDR space. Addresses - * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 << - * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE + - * TRGT_ADDR_BASE. - */ -#define DESC_ADDR_REGION_LEN 32 -/* The start of the region in DESC_ADDR space. */ -#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0 -#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64 -/* The start of the region in TRGT_ADDR space. Drivers can set this via - * MC_CMD_SET_DESC_ADDR_REGIONS. - */ -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64 -#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64 -/* The size of the region. */ -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16 -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4 -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128 -#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32 -/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver - * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2. - */ -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20 -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4 -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160 -#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32 -#define DESC_ADDR_REGION_RSVD_OFST 24 -#define DESC_ADDR_REGION_RSVD_LEN 8 -#define DESC_ADDR_REGION_RSVD_LO_OFST 24 -#define DESC_ADDR_REGION_RSVD_LO_LEN 4 -#define DESC_ADDR_REGION_RSVD_LO_LBN 192 -#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32 -#define DESC_ADDR_REGION_RSVD_HI_OFST 28 -#define DESC_ADDR_REGION_RSVD_HI_LEN 4 -#define DESC_ADDR_REGION_RSVD_HI_LBN 224 -#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32 -#define DESC_ADDR_REGION_RSVD_LBN 192 -#define DESC_ADDR_REGION_RSVD_WIDTH 64 - - /***********************************/ /* MC_CMD_GET_DESC_ADDR_INFO * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space. @@ -24835,122 +21899,6 @@ #define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0 -/***********************************/ -/* MC_CMD_GET_BOARD_ATTR - * Retrieve physical build-level board attributes as configured at - * manufacturing stage. Fields originate from EEPROM and per-platform constants - * in firmware. Fields are used in development to identify/ differentiate - * boards based on build levels/parameters, and also in manufacturing to cross - * check "what was programmed in manufacturing" is same as "what firmware - * thinks has been programmed" as there are two layers to translation within - * firmware before the attributes reach this MCDI handler. Some parameters are - * retrieved as part of other commands and therefore not replicated here. See - * GET_VERSION_OUT. - */ -#define MC_CMD_GET_BOARD_ATTR 0x1c6 -#undef MC_CMD_0x1c6_PRIVILEGE_CTG - -#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */ -#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0 - -/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */ -#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16 -/* Defines board capabilities and validity of attributes returned in this - * response-message. - */ -#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0 -#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2 -#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4 -#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4 -#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4 -#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0 -#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4 -#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4 -#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16 -#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8 -/* enum: The FPGA voltage on the adapter can be set to low */ -#define MC_CMD_FPGA_VOLTAGE_LOW 0x0 -/* enum: The FPGA voltage on the adapter can be set to regular */ -#define MC_CMD_FPGA_VOLTAGE_REG 0x1 -/* enum: The FPGA voltage on the adapter can be set to high */ -#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2 -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4 -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24 -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8 -/* An array of cage types on the board */ -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8 -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1 -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8 -/* enum: The cages are not known */ -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0 -/* enum: The cages are SFP/SFP+ */ -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1 -/* enum: The cages are QSFP/QSFP+ */ -#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2 - - -/***********************************/ -/* MC_CMD_GET_SOC_STATE - * Retrieve current state of the System-on-Chip. This command is valid when - * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set. - */ -#define MC_CMD_GET_SOC_STATE 0x1c7 -#undef MC_CMD_0x1c7_PRIVILEGE_CTG - -#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_GET_SOC_STATE_IN msgrequest */ -#define MC_CMD_GET_SOC_STATE_IN_LEN 0 - -/* MC_CMD_GET_SOC_STATE_OUT msgresponse */ -#define MC_CMD_GET_SOC_STATE_OUT_LEN 12 -/* Status flags for the SoC */ -#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0 -#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4 -#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0 -#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0 -#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1 -#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0 -#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1 -#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1 -#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0 -#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2 -#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1 -/* Status fields for the SoC */ -#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4 -#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4 -#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4 -#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0 -#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8 -/* enum: Power on (set by SUC on power up) */ -#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0 -/* enum: Running bootloader */ -#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1 -/* enum: Bootloader has started OS. OS is booting */ -#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2 -/* enum: OS is running */ -#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3 -/* enum: Maintenance OS is running */ -#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4 -/* Number of SoC resets since power on */ -#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8 -#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4 - - /***********************************/ /* MC_CMD_CHECK_SCHEDULER_CREDITS * For debugging purposes. For each source and destination node in the hardware @@ -25009,76 +21957,6 @@ #define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62 -/***********************************/ -/* MC_CMD_TXQ_STATS - * Query per-TXQ statistics. - */ -#define MC_CMD_TXQ_STATS 0x1d5 -#undef MC_CMD_0x1d5_PRIVILEGE_CTG - -#define MC_CMD_0x1d5_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_TXQ_STATS_IN msgrequest */ -#define MC_CMD_TXQ_STATS_IN_LEN 8 -/* Instance of TXQ to retrieve statistics for */ -#define MC_CMD_TXQ_STATS_IN_INSTANCE_OFST 0 -#define MC_CMD_TXQ_STATS_IN_INSTANCE_LEN 4 -/* Flags for the request */ -#define MC_CMD_TXQ_STATS_IN_FLAGS_OFST 4 -#define MC_CMD_TXQ_STATS_IN_FLAGS_LEN 4 -#define MC_CMD_TXQ_STATS_IN_CLEAR_OFST 4 -#define MC_CMD_TXQ_STATS_IN_CLEAR_LBN 0 -#define MC_CMD_TXQ_STATS_IN_CLEAR_WIDTH 1 - -/* MC_CMD_TXQ_STATS_OUT msgresponse */ -#define MC_CMD_TXQ_STATS_OUT_LENMIN 0 -#define MC_CMD_TXQ_STATS_OUT_LENMAX 248 -#define MC_CMD_TXQ_STATS_OUT_LENMAX_MCDI2 1016 -#define MC_CMD_TXQ_STATS_OUT_LEN(num) (0+8*(num)) -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_NUM(len) (((len)-0)/8) -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_OFST 0 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LEN 8 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_OFST 0 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LEN 4 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LBN 0 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_WIDTH 32 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_OFST 4 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LEN 4 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LBN 32 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_WIDTH 32 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MINNUM 0 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM 31 -#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM_MCDI2 127 -#define MC_CMD_TXQ_STATS_CTPIO_MAX_FILL 0x0 /* enum */ - -/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are - * defined in SF-120734-TC with more information in SF-122717-TC. - */ -#define FUNCTION_PERSONALITY_LEN 4 -#define FUNCTION_PERSONALITY_ID_OFST 0 -#define FUNCTION_PERSONALITY_ID_LEN 4 -/* enum: Function has no assigned personality */ -#define FUNCTION_PERSONALITY_NULL 0x0 -/* enum: Function has an EF100-style function control window and VI windows - * with both EF100 and vDPA doorbells. - */ -#define FUNCTION_PERSONALITY_EF100 0x1 -/* enum: Function has virtio net device configuration registers and doorbells - * for virtio queue pairs. - */ -#define FUNCTION_PERSONALITY_VIRTIO_NET 0x2 -/* enum: Function has virtio block device configuration registers and a - * doorbell for a single virtqueue. - */ -#define FUNCTION_PERSONALITY_VIRTIO_BLK 0x3 -/* enum: Function is a Xilinx acceleration device - management function */ -#define FUNCTION_PERSONALITY_ACCEL_MGMT 0x4 -/* enum: Function is a Xilinx acceleration device - user function */ -#define FUNCTION_PERSONALITY_ACCEL_USR 0x5 -#define FUNCTION_PERSONALITY_ID_LBN 0 -#define FUNCTION_PERSONALITY_ID_WIDTH 32 - - /***********************************/ /* MC_CMD_VIRTIO_GET_FEATURES * Get a list of the virtio features supported by the device. @@ -25161,37 +22039,6 @@ #define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0 -/***********************************/ -/* MC_CMD_VIRTIO_GET_CAPABILITIES - * Get virtio capabilities supported by the device. Returns general virtio - * capabilities and limitations of the hardware / firmware implementation - * (hardware device as a whole), rather than that of individual configured - * virtio devices. At present, only the absolute maximum number of queues - * allowed on multi-queue devices is returned. Response is expected to be - * extended as necessary in the future. - */ -#define MC_CMD_VIRTIO_GET_CAPABILITIES 0x1d3 -#undef MC_CMD_0x1d3_PRIVILEGE_CTG - -#define MC_CMD_0x1d3_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_VIRTIO_GET_CAPABILITIES_IN msgrequest */ -#define MC_CMD_VIRTIO_GET_CAPABILITIES_IN_LEN 4 -/* Type of device to get capabilities for. Matches the device id as defined by - * the virtio spec. - */ -#define MC_CMD_VIRTIO_GET_CAPABILITIES_IN_DEVICE_ID_OFST 0 -#define MC_CMD_VIRTIO_GET_CAPABILITIES_IN_DEVICE_ID_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_IN/DEVICE_ID */ - -/* MC_CMD_VIRTIO_GET_CAPABILITIES_OUT msgresponse */ -#define MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_LEN 4 -/* Maximum number of queues supported for a single device instance */ -#define MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_MAX_QUEUES_OFST 0 -#define MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_MAX_QUEUES_LEN 4 - - /***********************************/ /* MC_CMD_VIRTIO_INIT_QUEUE * Create a virtio virtqueue. Fails with EALREADY if the queue already exists. @@ -25474,866 +22321,6 @@ #define PCIE_FUNCTION_INTF_LBN 32 #define PCIE_FUNCTION_INTF_WIDTH 32 -/* QUEUE_ID structuredef: Structure representing an absolute queue identifier - * (absolute VI number + VI relative queue number). On Keystone, a VI can - * contain multiple queues (at present, up to 2), each with separate controls - * for direction. This structure is required to uniquely identify the absolute - * source queue for descriptor proxy functions. - */ -#define QUEUE_ID_LEN 4 -/* Absolute VI number */ -#define QUEUE_ID_ABS_VI_OFST 0 -#define QUEUE_ID_ABS_VI_LEN 2 -#define QUEUE_ID_ABS_VI_LBN 0 -#define QUEUE_ID_ABS_VI_WIDTH 16 -/* Relative queue number within the VI */ -#define QUEUE_ID_REL_QUEUE_LBN 16 -#define QUEUE_ID_REL_QUEUE_WIDTH 1 -#define QUEUE_ID_RESERVED_LBN 17 -#define QUEUE_ID_RESERVED_WIDTH 15 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_CREATE - * Descriptor proxy functions are abstract devices that forward all request - * submitted to the host PCIe function (descriptors submitted to Virtio or - * EF100 queues) to be handled on another function (most commonly on the - * embedded Application Processor), via EF100 descriptor proxy, memory-to- - * memory and descriptor-to-completion mechanisms. Primary user is Virtio-blk - * subsystem, see SF-122927-TC. This function allocates a new descriptor proxy - * function on the host and assigns a user-defined label. The actual function - * configuration is not persisted until the caller configures it with - * MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN and commits with - * MC_CMD_DESC_PROXY_FUNC_COMMIT_IN. - */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172 -#undef MC_CMD_0x172_PRIVILEGE_CTG - -#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_CREATE_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LEN 52 -/* PCIe Function ID to allocate (as struct PCIE_FUNCTION). Set to - * {PF_ANY,VF_ANY,interface} for "any available function" Set to - * {PF_ANY,VF_NULL,interface} for "any available PF" - */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4 -/* The personality to set. The meanings of the personalities are defined in - * SF-120734-TC with more information in SF-122717-TC. At present, we only - * support proxying for VIRTIO_BLK - */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_PERSONALITY_OFST 8 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_PERSONALITY_LEN 4 -/* Enum values, see field(s): */ -/* FUNCTION_PERSONALITY/ID */ -/* User-defined label (zero-terminated ASCII string) to uniquely identify the - * function - */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LABEL_OFST 12 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LABEL_LEN 40 - -/* MC_CMD_DESC_PROXY_FUNC_CREATE_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_LEN 12 -/* Handle to the descriptor proxy function */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_HANDLE_LEN 4 -/* Allocated function ID (as struct PCIE_FUNCTION) */ -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8 -#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_DESTROY - * Remove an existing descriptor proxy function. Underlying function - * personality and configuration reverts back to factory default. Function - * configuration is committed immediately to specified store and any function - * ownership is released. - */ -#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173 -#undef MC_CMD_0x173_PRIVILEGE_CTG - -#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_DESTROY_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LEN 44 -/* User-defined label (zero-terminated ASCII string) to uniquely identify the - * function - */ -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LABEL_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LABEL_LEN 40 -/* Store from which to remove function configuration */ -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_STORE_OFST 40 -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_STORE_LEN 4 -/* Enum values, see field(s): */ -/* MC_CMD_DESC_PROXY_FUNC_COMMIT/MC_CMD_DESC_PROXY_FUNC_COMMIT_IN/STORE */ - -/* MC_CMD_DESC_PROXY_FUNC_DESTROY_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_DESTROY_OUT_LEN 0 - -/* VIRTIO_BLK_CONFIG structuredef: Virtio block device configuration. See - * Virtio specification v1.1, Sections 5.2.3 and 6 for definition of feature - * bits. See Virtio specification v1.1, Section 5.2.4 (struct - * virtio_blk_config) for definition of remaining configuration fields - */ -#define VIRTIO_BLK_CONFIG_LEN 68 -/* Virtio block device features to advertise, per Virtio 1.1, 5.2.3 and 6 */ -#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0 -#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8 -#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0 -#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4 -#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0 -#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32 -#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4 -#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4 -#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32 -#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_LBN 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_LBN 2 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_LBN 4 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_LBN 5 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_LBN 6 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_LBN 7 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_LBN 9 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_LBN 10 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_LBN 11 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_LBN 12 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_LBN 13 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_LBN 14 -#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_LBN 28 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_LBN 29 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_LBN 32 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_LBN 33 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_LBN 34 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_LBN 35 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_LBN 36 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_LBN 37 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_WIDTH 1 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_OFST 0 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_LBN 38 -#define VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_WIDTH 1 -#define VIRTIO_BLK_CONFIG_FEATURES_LBN 0 -#define VIRTIO_BLK_CONFIG_FEATURES_WIDTH 64 -/* The capacity of the device (expressed in 512-byte sectors) */ -#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8 -#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8 -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8 -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4 -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64 -#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32 -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12 -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4 -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96 -#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32 -#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64 -#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64 -/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is - * set. - */ -#define VIRTIO_BLK_CONFIG_SIZE_MAX_OFST 16 -#define VIRTIO_BLK_CONFIG_SIZE_MAX_LEN 4 -#define VIRTIO_BLK_CONFIG_SIZE_MAX_LBN 128 -#define VIRTIO_BLK_CONFIG_SIZE_MAX_WIDTH 32 -/* Maximum number of segments in a request. Only valid when - * VIRTIO_BLK_F_SEG_MAX is set. - */ -#define VIRTIO_BLK_CONFIG_SEG_MAX_OFST 20 -#define VIRTIO_BLK_CONFIG_SEG_MAX_LEN 4 -#define VIRTIO_BLK_CONFIG_SEG_MAX_LBN 160 -#define VIRTIO_BLK_CONFIG_SEG_MAX_WIDTH 32 -/* Disk-style geometry - cylinders. Only valid when VIRTIO_BLK_F_GEOMETRY is - * set. - */ -#define VIRTIO_BLK_CONFIG_CYLINDERS_OFST 24 -#define VIRTIO_BLK_CONFIG_CYLINDERS_LEN 2 -#define VIRTIO_BLK_CONFIG_CYLINDERS_LBN 192 -#define VIRTIO_BLK_CONFIG_CYLINDERS_WIDTH 16 -/* Disk-style geometry - heads. Only valid when VIRTIO_BLK_F_GEOMETRY is set. - */ -#define VIRTIO_BLK_CONFIG_HEADS_OFST 26 -#define VIRTIO_BLK_CONFIG_HEADS_LEN 1 -#define VIRTIO_BLK_CONFIG_HEADS_LBN 208 -#define VIRTIO_BLK_CONFIG_HEADS_WIDTH 8 -/* Disk-style geometry - sectors. Only valid when VIRTIO_BLK_F_GEOMETRY is set. - */ -#define VIRTIO_BLK_CONFIG_SECTORS_OFST 27 -#define VIRTIO_BLK_CONFIG_SECTORS_LEN 1 -#define VIRTIO_BLK_CONFIG_SECTORS_LBN 216 -#define VIRTIO_BLK_CONFIG_SECTORS_WIDTH 8 -/* Block size of disk. Only valid when VIRTIO_BLK_F_BLK_SIZE is set. */ -#define VIRTIO_BLK_CONFIG_BLK_SIZE_OFST 28 -#define VIRTIO_BLK_CONFIG_BLK_SIZE_LEN 4 -#define VIRTIO_BLK_CONFIG_BLK_SIZE_LBN 224 -#define VIRTIO_BLK_CONFIG_BLK_SIZE_WIDTH 32 -/* Block topology - number of logical blocks per physical block (log2). Only - * valid when VIRTIO_BLK_F_TOPOLOGY is set. - */ -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_OFST 32 -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_LEN 1 -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_LBN 256 -#define VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_WIDTH 8 -/* Block topology - offset of first aligned logical block. Only valid when - * VIRTIO_BLK_F_TOPOLOGY is set. - */ -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_OFST 33 -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_LEN 1 -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_LBN 264 -#define VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_WIDTH 8 -/* Block topology - suggested minimum I/O size in blocks. Only valid when - * VIRTIO_BLK_F_TOPOLOGY is set. - */ -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_OFST 34 -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_LEN 2 -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_LBN 272 -#define VIRTIO_BLK_CONFIG_MIN_IO_SIZE_WIDTH 16 -/* Block topology - optimal (suggested maximum) I/O size in blocks. Only valid - * when VIRTIO_BLK_F_TOPOLOGY is set. - */ -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_OFST 36 -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_LEN 4 -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_LBN 288 -#define VIRTIO_BLK_CONFIG_OPT_IO_SIZE_WIDTH 32 -/* Unused, set to zero. Note that virtio_blk_config.writeback is volatile and - * not carried in config data. - */ -#define VIRTIO_BLK_CONFIG_UNUSED0_OFST 40 -#define VIRTIO_BLK_CONFIG_UNUSED0_LEN 2 -#define VIRTIO_BLK_CONFIG_UNUSED0_LBN 320 -#define VIRTIO_BLK_CONFIG_UNUSED0_WIDTH 16 -/* Number of queues. Only valid if the VIRTIO_BLK_F_MQ feature is negotiated. - */ -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_OFST 42 -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_LEN 2 -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_LBN 336 -#define VIRTIO_BLK_CONFIG_NUM_QUEUES_WIDTH 16 -/* Maximum discard sectors size, in 512-byte units. Only valid if - * VIRTIO_BLK_F_DISCARD is set. - */ -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_OFST 44 -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_LEN 4 -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_LBN 352 -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_WIDTH 32 -/* Maximum discard segment number. Only valid if VIRTIO_BLK_F_DISCARD is set. - */ -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_OFST 48 -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_LEN 4 -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_LBN 384 -#define VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_WIDTH 32 -/* Discard sector alignment, in 512-byte units. Only valid if - * VIRTIO_BLK_F_DISCARD is set. - */ -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_OFST 52 -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_LEN 4 -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_LBN 416 -#define VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_WIDTH 32 -/* Maximum write zeroes sectors size, in 512-byte units. Only valid if - * VIRTIO_BLK_F_WRITE_ZEROES is set. - */ -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_OFST 56 -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_LEN 4 -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_LBN 448 -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_WIDTH 32 -/* Maximum write zeroes segment number. Only valid if VIRTIO_BLK_F_WRITE_ZEROES - * is set. - */ -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_OFST 60 -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_LEN 4 -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_LBN 480 -#define VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_WIDTH 32 -/* Write zeroes request can result in deallocating one or more sectors. Only - * valid if VIRTIO_BLK_F_WRITE_ZEROES is set. - */ -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_OFST 64 -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_LEN 1 -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_LBN 512 -#define VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_WIDTH 8 -/* Unused, set to zero. */ -#define VIRTIO_BLK_CONFIG_UNUSED1_OFST 65 -#define VIRTIO_BLK_CONFIG_UNUSED1_LEN 3 -#define VIRTIO_BLK_CONFIG_UNUSED1_LBN 520 -#define VIRTIO_BLK_CONFIG_UNUSED1_WIDTH 24 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET - * Set configuration for an existing descriptor proxy function. Configuration - * data must match function personality. The actual function configuration is - * not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN - */ -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174 -#undef MC_CMD_0x174_PRIVILEGE_CTG - -#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMIN 20 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMAX 252 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMAX_MCDI2 1020 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LEN(num) (20+1*(num)) -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_NUM(len) (((len)-20)/1) -/* Handle to descriptor proxy function (as returned by - * MC_CMD_DESC_PROXY_FUNC_OPEN) - */ -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_HANDLE_LEN 4 -/* Reserved for future extension, set to zero. */ -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_RESERVED_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_RESERVED_LEN 16 -/* Configuration data. Format of configuration data is determined implicitly - * from function personality referred to by HANDLE. Currently, only supported - * format is VIRTIO_BLK_CONFIG. - */ -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_OFST 20 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_LEN 1 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MINNUM 0 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MAXNUM 232 -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MAXNUM_MCDI2 1000 - -/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_COMMIT - * Commit function configuration to non-volatile or volatile store. Once - * configuration is applied to hardware (which may happen immediately or on - * next function/device reset) a DESC_PROXY_FUNC_CONFIG_SET MCDI event will be - * delivered to callers MCDI event queue. - */ -#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175 -#undef MC_CMD_0x175_PRIVILEGE_CTG - -#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_LEN 8 -/* Handle to descriptor proxy function (as returned by - * MC_CMD_DESC_PROXY_FUNC_OPEN) - */ -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_HANDLE_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_STORE_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_STORE_LEN 4 -/* enum: Store into non-volatile (dynamic) config */ -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_NON_VOLATILE 0x0 -/* enum: Store into volatile (ephemeral) config */ -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_VOLATILE 0x1 - -/* MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_LEN 4 -/* Generation count to be delivered in an event once configuration becomes live - */ -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_CONFIG_GENERATION_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_CONFIG_GENERATION_LEN 4 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_OPEN - * Retrieve a handle for an existing descriptor proxy function. Returns an - * integer handle, valid until function is deallocated, MC rebooted or power- - * cycle. Returns ENODEV if no function with given label exists. - */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176 -#undef MC_CMD_0x176_PRIVILEGE_CTG - -#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_OPEN_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LEN 40 -/* User-defined label (zero-terminated ASCII string) to uniquely identify the - * function - */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LABEL_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LABEL_LEN 40 - -/* MC_CMD_DESC_PROXY_FUNC_OPEN_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMIN 40 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMAX 252 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LEN(num) (40+1*(num)) -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_NUM(len) (((len)-40)/1) -/* Handle to the descriptor proxy function */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_HANDLE_LEN 4 -/* PCIe Function ID (as struct PCIE_FUNCTION) */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4 -/* Function personality */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4 -/* Enum values, see field(s): */ -/* FUNCTION_PERSONALITY/ID */ -/* Function configuration state */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_STATUS_OFST 16 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_STATUS_LEN 4 -/* enum: Function configuration is visible to the host (live) */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LIVE 0x0 -/* enum: Function configuration is pending reset */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PENDING 0x1 -/* enum: Function configuration is missing (created, but no configuration - * committed) - */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_UNCONFIGURED 0x2 -/* Generation count to be delivered in an event once the configuration becomes - * live (if status is "pending") - */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_GENERATION_OFST 20 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_GENERATION_LEN 4 -/* Reserved for future extension, set to zero. */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_RESERVED_OFST 24 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_RESERVED_LEN 16 -/* Configuration data corresponding to function personality. Currently, only - * supported format is VIRTIO_BLK_CONFIG. Not valid if status is UNCONFIGURED. - */ -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_OFST 40 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_LEN 1 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MINNUM 0 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MAXNUM 212 -#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MAXNUM_MCDI2 980 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_CLOSE - * Releases a handle for an open descriptor proxy function. If proxying was - * enabled on the device, the caller is expected to gracefully stop it using - * MC_CMD_DESC_PROXY_FUNC_DISABLE prior to calling this function. Closing an - * active device without disabling proxying will result in forced close, which - * will put the device into a failed state and signal the host driver of the - * error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side) - */ -#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1 -#undef MC_CMD_0x1a1_PRIVILEGE_CTG - -#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_CLOSE_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_LEN 4 -/* Handle to the descriptor proxy function */ -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_HANDLE_LEN 4 - -/* MC_CMD_DESC_PROXY_FUNC_CLOSE_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_CLOSE_OUT_LEN 0 - -/* DESC_PROXY_FUNC_MAP structuredef */ -#define DESC_PROXY_FUNC_MAP_LEN 52 -/* PCIe function ID (as struct PCIE_FUNCTION) */ -#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0 -#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8 -#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0 -#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4 -#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0 -#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32 -#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4 -#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4 -#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32 -#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32 -#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0 -#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64 -#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0 -#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2 -#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0 -#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16 -#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2 -#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2 -#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16 -#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16 -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4 -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4 -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32 -#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32 -/* Function personality */ -#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8 -#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4 -/* Enum values, see field(s): */ -/* FUNCTION_PERSONALITY/ID */ -#define DESC_PROXY_FUNC_MAP_PERSONALITY_LBN 64 -#define DESC_PROXY_FUNC_MAP_PERSONALITY_WIDTH 32 -/* User-defined label (zero-terminated ASCII string) to uniquely identify the - * function - */ -#define DESC_PROXY_FUNC_MAP_LABEL_OFST 12 -#define DESC_PROXY_FUNC_MAP_LABEL_LEN 40 -#define DESC_PROXY_FUNC_MAP_LABEL_LBN 96 -#define DESC_PROXY_FUNC_MAP_LABEL_WIDTH 320 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_ENUM - * Enumerate existing descriptor proxy functions - */ -#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177 -#undef MC_CMD_0x177_PRIVILEGE_CTG - -#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_ENUM_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_ENUM_IN_LEN 4 -/* Starting index, set to 0 on first request. See - * MC_CMD_DESC_PROXY_FUNC_ENUM_OUT/FLAGS. - */ -#define MC_CMD_DESC_PROXY_FUNC_ENUM_IN_START_IDX_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_IN_START_IDX_LEN 4 - -/* MC_CMD_DESC_PROXY_FUNC_ENUM_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMIN 4 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMAX 212 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMAX_MCDI2 992 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LEN(num) (4+52*(num)) -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_NUM(len) (((len)-4)/52) -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FLAGS_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FLAGS_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_LBN 0 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_WIDTH 1 -/* Function map, as array of DESC_PROXY_FUNC_MAP */ -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_LEN 52 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MINNUM 0 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM 4 -#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM_MCDI2 19 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_ENABLE - * Enable descriptor proxying for function into target event queue. Returns VI - * allocation info for the proxy source function, so that the caller can map - * absolute VI IDs from descriptor proxy events back to the originating - * function. This is a legacy function that only supports single queue proxy - * devices. It is also limited in that it can only be called after host driver - * attach (once VI allocation is known) and will return MC_CMD_ERR_ENOTCONN - * otherwise. For new code, see MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE which - * supports multi-queue devices and has no dependency on host driver attach. - */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178 -#undef MC_CMD_0x178_PRIVILEGE_CTG - -#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_LEN 8 -/* Handle to descriptor proxy function (as returned by - * MC_CMD_DESC_PROXY_FUNC_OPEN) - */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_HANDLE_LEN 4 -/* Descriptor proxy sink queue (caller function relative). Must be extended - * width event queue - */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_TARGET_EVQ_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_TARGET_EVQ_LEN 4 - -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_LEN 8 -/* The number of VIs allocated on the function */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_COUNT_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_COUNT_LEN 4 -/* The base absolute VI number allocated to the function. */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_BASE_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_BASE_LEN 4 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE - * Enable descriptor proxying for a source queue on a host function into target - * event queue. Source queue number is a relative virtqueue number on the - * source function (0 to max_virtqueues-1). For a multi-queue device, the - * caller must enable all source queues individually. To retrieve absolute VI - * information for the source function (so that VI IDs from descriptor proxy - * events can be mapped back to source function / queue) see - * MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO - */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE 0x1d0 -#undef MC_CMD_0x1d0_PRIVILEGE_CTG - -#define MC_CMD_0x1d0_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_LEN 12 -/* Handle to descriptor proxy function (as returned by - * MC_CMD_DESC_PROXY_FUNC_OPEN) - */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_HANDLE_LEN 4 -/* Source relative queue number to enable proxying on */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_SOURCE_QUEUE_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_SOURCE_QUEUE_LEN 4 -/* Descriptor proxy sink queue (caller function relative). Must be extended - * width event queue - */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_TARGET_EVQ_OFST 8 -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_TARGET_EVQ_LEN 4 - -/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_DISABLE - * Disable descriptor proxying for function. For multi-queue functions, - * disables all queues. - */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179 -#undef MC_CMD_0x179_PRIVILEGE_CTG - -#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_LEN 4 -/* Handle to descriptor proxy function (as returned by - * MC_CMD_DESC_PROXY_FUNC_OPEN) - */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_HANDLE_LEN 4 - -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE - * Disable descriptor proxying for a specific source queue on a function. - */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE 0x1d1 -#undef MC_CMD_0x1d1_PRIVILEGE_CTG - -#define MC_CMD_0x1d1_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN msgrequest */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_LEN 8 -/* Handle to descriptor proxy function (as returned by - * MC_CMD_DESC_PROXY_FUNC_OPEN) - */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_HANDLE_LEN 4 -/* Source relative queue number to disable proxying on */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_SOURCE_QUEUE_OFST 4 -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_SOURCE_QUEUE_LEN 4 - -/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_DESC_PROXY_GET_VI_INFO - * Returns absolute VI allocation information for the descriptor proxy source - * function referenced by HANDLE, so that the caller can map absolute VI IDs - * from descriptor proxy events back to the originating function and queue. The - * call is only valid after the host driver for the source function has - * attached (after receiving a driver attach event for the descriptor proxy - * function) and will fail with ENOTCONN otherwise. - */ -#define MC_CMD_DESC_PROXY_GET_VI_INFO 0x1d2 -#undef MC_CMD_0x1d2_PRIVILEGE_CTG - -#define MC_CMD_0x1d2_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_DESC_PROXY_GET_VI_INFO_IN msgrequest */ -#define MC_CMD_DESC_PROXY_GET_VI_INFO_IN_LEN 4 -/* Handle to descriptor proxy function (as returned by - * MC_CMD_DESC_PROXY_FUNC_OPEN) - */ -#define MC_CMD_DESC_PROXY_GET_VI_INFO_IN_HANDLE_OFST 0 -#define MC_CMD_DESC_PROXY_GET_VI_INFO_IN_HANDLE_LEN 4 - -/* MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT msgresponse */ -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMIN 0 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMAX 252 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LEN(num) (0+4*(num)) -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_NUM(len) (((len)-0)/4) -/* VI information (VI ID + VI relative queue number) for each of the source - * queues (in order from 0 to max_virtqueues-1), as array of QUEUE_ID - * structures. - */ -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_LEN 4 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MINNUM 0 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM 63 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM_MCDI2 255 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_OFST 0 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_LEN 2 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_LBN 16 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_WIDTH 1 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_RESERVED_LBN 17 -#define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_RESERVED_WIDTH 15 - - -/***********************************/ -/* MC_CMD_GET_ADDR_SPC_ID - * Get Address space identifier for use in mem2mem descriptors for a given - * target. See SF-120734-TC for details on ADDR_SPC_IDs and mem2mem - * descriptors. - */ -#define MC_CMD_GET_ADDR_SPC_ID 0x1a0 -#undef MC_CMD_0x1a0_PRIVILEGE_CTG - -#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN - -/* MC_CMD_GET_ADDR_SPC_ID_IN msgrequest */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_LEN 16 -/* Resource type to get ADDR_SPC_ID for */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_TYPE_OFST 0 -#define MC_CMD_GET_ADDR_SPC_ID_IN_TYPE_LEN 4 -/* enum: Address space ID for host/AP memory DMA over the same interface this - * MCDI was called on - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_SELF 0x0 -/* enum: Address space ID for host/AP memory DMA via PCI interface and function - * specified by FUNC - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_PCI_FUNC 0x1 -/* enum: Address space ID for host/AP memory DMA via PCI interface and function - * specified by FUNC with PASID value specified by PASID - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_PCI_FUNC_PASID 0x2 -/* enum: Address space ID for host/AP memory DMA via PCI interface and function - * specified by FUNC with PASID value of relative VI specified by VI - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_REL_VI 0x3 -/* enum: Address space ID for host/AP memory DMA via PCI interface, function - * and PASID value of absolute VI specified by VI - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_ABS_VI 0x4 -/* enum: Address space ID for host memory DMA via PCI interface and function of - * descriptor proxy function specified by HANDLE - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_DESC_PROXY_HANDLE 0x5 -/* enum: Address space ID for DMA to/from MC memory */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_MC_MEM 0x6 -/* enum: Address space ID for DMA to/from other SmartNIC memory (on-chip, DDR) - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_NIC_MEM 0x7 -/* PCIe Function ID (as struct PCIE_FUNCTION). Only valid if TYPE is PCI_FUNC, - * PCI_FUNC_PASID or REL_VI. - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8 -#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4 -/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12 -#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4 -/* Relative or absolute VI number. Only valid if TYPE is REL_VI or ABS_VI */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_VI_OFST 12 -#define MC_CMD_GET_ADDR_SPC_ID_IN_VI_LEN 4 -/* Descriptor proxy function handle. Only valid if TYPE is DESC_PROXY_HANDLE. - */ -#define MC_CMD_GET_ADDR_SPC_ID_IN_HANDLE_OFST 4 -#define MC_CMD_GET_ADDR_SPC_ID_IN_HANDLE_LEN 4 - -/* MC_CMD_GET_ADDR_SPC_ID_OUT msgresponse */ -#define MC_CMD_GET_ADDR_SPC_ID_OUT_LEN 8 -/* Address Space ID for the requested target. Only the lower 36 bits are valid - * in the current SmartNIC implementation. - */ -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32 -#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32 - /***********************************/ /* MC_CMD_GET_CLIENT_HANDLE @@ -26359,7 +22346,8 @@ * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a - * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF + * VF on the calling interface - INTF=..., PF=PF_NULL, VF=VF_NULL to refer to + * the named interface itself - INTF=..., PF=..., VF=VF_NULL to refer to a PF * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named * interface where ... refers to a small integer for the VF/PF fields, and to * values from the PCIE_INTERFACE enum for for the INTF field. It's only @@ -26380,6 +22368,7 @@ * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER. */ #define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff +/* See structuredef: PCIE_FUNCTION */ #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4 #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2 #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6 @@ -27350,7 +23339,7 @@ /* MAE_MPORT_SELECTOR structuredef: MPORTS are identified by an opaque unsigned * integer value (mport_id) that is guaranteed to be representable within * 32-bits or within any NIC interface field that needs store the value - * (whichever is narrowers). This selector structure provides a stable way to + * (whichever is narrower). This selector structure provides a stable way to * refer to m-ports. */ #define MAE_MPORT_SELECTOR_LEN 4 @@ -27425,10 +23414,22 @@ #define MAE_MPORT_SELECTOR_FLAT_WIDTH 32 /* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or - * virtual network port by MAE port and link end + * virtual network port by MAE port and link end. Intended to be used by + * network port MCDI commands. Setting FLAT to MAE_LINK_ENDPOINT_COMPAT is + * equivalent to using the previous version of the command. Not all possible + * combinations of MPORT_END and MPORT_SELECTOR in MAE_LINK_ENDPOINT_SELECTOR + * will work in all circumstances. 1. Some will always work (e.g. a VF can + * always address its logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), + * 2. Some are not meaningful and will always fail with EINVAL (e.g. attempting + * to address the VNIC end of a link to a physical port), 3. Some are + * meaningful but require the MCDI client to have the required permission and + * fail with EPERM otherwise (e.g. trying to set the MAC on a VF the caller + * cannot administer), and 4. Some could be implementation-specific and fail + * with ENOTSUP if not available (no examples exist right now). See + * SF-123581-TC section 4.3 for more details. */ #define MAE_LINK_ENDPOINT_SELECTOR_LEN 8 -/* The MAE MPORT of interest */ +/* Identifier for the MAE MPORT of interest */ #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0 #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4 #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0 @@ -27829,6 +23830,8 @@ #define MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_MAXNUM_MCDI2 253 /* enum: A counter ID that is guaranteed never to represent a real counter */ #define MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_NULL 0xffffffff +/* Other enum values, see field(s): */ +/* MAE_COUNTER_ID */ /***********************************/ @@ -28266,6 +24269,24 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_LBN 15 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_LBN 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_LBN 18 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_LBN 19 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_LBN 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_WIDTH 1 /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2 @@ -28291,19 +24312,23 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_OFST 20 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_LEN 4 /* Allows an action set to trigger several counter updates. Set to - * COUNTER_LIST_ID_NULL to request no counter action. + * MAE_COUNTER_ID_NULL to request no counter action. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_OFST 24 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ /* If a driver only wished to update one counter within this action set, then * it can supply a COUNTER_ID instead of allocating a single-element counter * list. The ID must have been allocated with COUNTER_TYPE=AR. This field - * should be set to COUNTER_ID_NULL if this behaviour is not required. It is - * not valid to supply a non-NULL value for both COUNTER_LIST_ID and + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and * COUNTER_ID. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_OFST 28 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_OFST 32 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_LEN 4 /* Set to MAC_ID_NULL to request no source MAC replacement. */ @@ -28347,6 +24372,24 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_LBN 15 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_LBN 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_LBN 18 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_LBN 19 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_LBN 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_WIDTH 1 /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2 @@ -28372,19 +24415,23 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4 /* Allows an action set to trigger several counter updates. Set to - * COUNTER_LIST_ID_NULL to request no counter action. + * MAE_COUNTER_ID_NULL to request no counter action. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ /* If a driver only wished to update one counter within this action set, then * it can supply a COUNTER_ID instead of allocating a single-element counter * list. The ID must have been allocated with COUNTER_TYPE=AR. This field - * should be set to COUNTER_ID_NULL if this behaviour is not required. It is - * not valid to supply a non-NULL value for both COUNTER_LIST_ID and + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and * COUNTER_ID. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4 /* Set to MAC_ID_NULL to request no source MAC replacement. */ @@ -28437,6 +24484,172 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1 +/* MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN msgrequest: Only supported if + * MAE_ACTION_SET_ALLOC_V3_SUPPORTED is advertised in + * MC_CMD_GET_CAPABILITIES_V10_OUT. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LEN 53 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_LEN 4 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_WIDTH 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_LBN 4 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_WIDTH 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_LBN 8 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_LBN 9 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_LBN 10 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_LBN 11 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_LBN 12 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_LBN 13 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_LBN 14 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_LBN 15 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_LBN 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_LBN 18 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_LBN 19 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_LBN 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_WIDTH 1 +/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_OFST 4 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_LEN 2 +/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_OFST 6 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_LEN 2 +/* If VLAN_PUSH == 2, inner TCI value to be inserted. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_OFST 8 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_LEN 2 +/* If VLAN_PUSH == 2, inner TPID value to be inserted. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_OFST 10 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_LEN 2 +/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_OFST 12 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_LEN 4 +/* Set to ENCAP_HEADER_ID_NULL to request no encap action */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_OFST 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_LEN 4 +/* An m-port selector identifying the m-port that the modified packet should be + * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the + * packet. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_OFST 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_LEN 4 +/* Allows an action set to trigger several counter updates. Set to + * MAE_COUNTER_ID_NULL to request no counter action. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_OFST 24 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ +/* If a driver only wished to update one counter within this action set, then + * it can supply a COUNTER_ID instead of allocating a single-element counter + * list. The ID must have been allocated with COUNTER_TYPE=AR. This field + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and + * COUNTER_ID. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_OFST 28 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_OFST 32 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_LEN 4 +/* Set to MAC_ID_NULL to request no source MAC replacement. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_OFST 36 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_LEN 4 +/* Set to MAC_ID_NULL to request no destination MAC replacement. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_OFST 40 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_LEN 4 +/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_OFST 44 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_LEN 4 +/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits + * within IPv4 and IPv6 headers. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_LEN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_LBN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_LBN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_LBN 3 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_WIDTH 6 +/* Actions for modifying the Explicit Congestion Notification (ECN) bits within + * IPv4 and IPv6 headers. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_LEN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_LBN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_LBN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_LBN 3 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_WIDTH 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_LBN 5 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_LBN 6 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_WIDTH 1 +/* Actions for overwriting CH_ROUTE subfields. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_LEN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_LBN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_LBN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_LBN 3 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_WIDTH 1 +/* Override outgoing CH_VC to network port for DO_SET_NET_CHAN action. Cannot + * be used in conjunction with DO_SET_SRC_MPORT action. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_OFST 52 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_LEN 1 + /* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */ #define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4 /* The MSB of the AS_ID is guaranteed to be clear if the ID is not @@ -28680,58 +24893,6 @@ #define MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM 32 #define MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM_MCDI2 32 - -/***********************************/ -/* MC_CMD_MAE_OUTER_RULE_UPDATE - * Atomically change the response of an Outer Rule. - */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE 0x17d -#undef MC_CMD_0x17d_PRIVILEGE_CTG - -#define MC_CMD_0x17d_PRIVILEGE_CTG SRIOV_CTG_MAE - -/* MC_CMD_MAE_OUTER_RULE_UPDATE_IN msgrequest */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_LEN 16 -/* ID of outer rule to update */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_OFST 0 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_LEN 4 -/* Packets matching the rule will be parsed with this encapsulation. */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_OFST 4 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_LEN 4 -/* Enum values, see field(s): */ -/* MAE_MCDI_ENCAP_TYPE */ -/* This field controls the actions that are performed when a rule is hit. */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_OFST 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_LEN 4 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_OFST 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_LBN 0 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_WIDTH 1 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_OFST 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_LBN 1 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_WIDTH 2 -/* Enum values, see field(s): */ -/* MAE_CT_VNI_MODE */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_OFST 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_LBN 3 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_WIDTH 1 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_OFST 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_LBN 4 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_WIDTH 1 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_OFST 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_LBN 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_WIDTH 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_OFST 8 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_LBN 16 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_WIDTH 16 -/* ID of counter to increment when the rule is hit. Only used if the DO_COUNT - * flag is set. The ID must have been allocated with COUNTER_TYPE=OR. - */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_OFST 12 -#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_LEN 4 - -/* MC_CMD_MAE_OUTER_RULE_UPDATE_OUT msgresponse */ -#define MC_CMD_MAE_OUTER_RULE_UPDATE_OUT_LEN 0 - /* MAE_ACTION_RULE_RESPONSE structuredef */ #define MAE_ACTION_RULE_RESPONSE_LEN 16 #define MAE_ACTION_RULE_RESPONSE_ASL_ID_OFST 0 @@ -29122,142 +25283,6 @@ #define MAE_MPORT_DESC_VNIC_PLUGIN_TBD_LBN 352 #define MAE_MPORT_DESC_VNIC_PLUGIN_TBD_WIDTH 32 -/* MAE_MPORT_DESC_V2 structuredef */ -#define MAE_MPORT_DESC_V2_LEN 56 -#define MAE_MPORT_DESC_V2_MPORT_ID_OFST 0 -#define MAE_MPORT_DESC_V2_MPORT_ID_LEN 4 -#define MAE_MPORT_DESC_V2_MPORT_ID_LBN 0 -#define MAE_MPORT_DESC_V2_MPORT_ID_WIDTH 32 -/* Reserved for future purposes, contains information independent of caller */ -#define MAE_MPORT_DESC_V2_FLAGS_OFST 4 -#define MAE_MPORT_DESC_V2_FLAGS_LEN 4 -#define MAE_MPORT_DESC_V2_FLAGS_LBN 32 -#define MAE_MPORT_DESC_V2_FLAGS_WIDTH 32 -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_OFST 8 -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_LEN 4 -#define MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_OFST 8 -#define MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_LBN 0 -#define MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_WIDTH 1 -#define MAE_MPORT_DESC_V2_CAN_DELIVER_TO_OFST 8 -#define MAE_MPORT_DESC_V2_CAN_DELIVER_TO_LBN 1 -#define MAE_MPORT_DESC_V2_CAN_DELIVER_TO_WIDTH 1 -#define MAE_MPORT_DESC_V2_CAN_DELETE_OFST 8 -#define MAE_MPORT_DESC_V2_CAN_DELETE_LBN 2 -#define MAE_MPORT_DESC_V2_CAN_DELETE_WIDTH 1 -#define MAE_MPORT_DESC_V2_IS_ZOMBIE_OFST 8 -#define MAE_MPORT_DESC_V2_IS_ZOMBIE_LBN 3 -#define MAE_MPORT_DESC_V2_IS_ZOMBIE_WIDTH 1 -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_LBN 64 -#define MAE_MPORT_DESC_V2_CALLER_FLAGS_WIDTH 32 -/* Not the ideal name; it's really the type of thing connected to the m-port */ -#define MAE_MPORT_DESC_V2_MPORT_TYPE_OFST 12 -#define MAE_MPORT_DESC_V2_MPORT_TYPE_LEN 4 -/* enum: Connected to a MAC... */ -#define MAE_MPORT_DESC_V2_MPORT_TYPE_NET_PORT 0x0 -/* enum: Adds metadata and delivers to another m-port */ -#define MAE_MPORT_DESC_V2_MPORT_TYPE_ALIAS 0x1 -/* enum: Connected to a VNIC. */ -#define MAE_MPORT_DESC_V2_MPORT_TYPE_VNIC 0x2 -#define MAE_MPORT_DESC_V2_MPORT_TYPE_LBN 96 -#define MAE_MPORT_DESC_V2_MPORT_TYPE_WIDTH 32 -/* 128-bit value available to drivers for m-port identification. */ -#define MAE_MPORT_DESC_V2_UUID_OFST 16 -#define MAE_MPORT_DESC_V2_UUID_LEN 16 -#define MAE_MPORT_DESC_V2_UUID_LBN 128 -#define MAE_MPORT_DESC_V2_UUID_WIDTH 128 -/* Big wadge of space reserved for other common properties */ -#define MAE_MPORT_DESC_V2_RESERVED_OFST 32 -#define MAE_MPORT_DESC_V2_RESERVED_LEN 8 -#define MAE_MPORT_DESC_V2_RESERVED_LO_OFST 32 -#define MAE_MPORT_DESC_V2_RESERVED_LO_LEN 4 -#define MAE_MPORT_DESC_V2_RESERVED_LO_LBN 256 -#define MAE_MPORT_DESC_V2_RESERVED_LO_WIDTH 32 -#define MAE_MPORT_DESC_V2_RESERVED_HI_OFST 36 -#define MAE_MPORT_DESC_V2_RESERVED_HI_LEN 4 -#define MAE_MPORT_DESC_V2_RESERVED_HI_LBN 288 -#define MAE_MPORT_DESC_V2_RESERVED_HI_WIDTH 32 -#define MAE_MPORT_DESC_V2_RESERVED_LBN 256 -#define MAE_MPORT_DESC_V2_RESERVED_WIDTH 64 -/* Logical port index. Only valid when type NET Port. */ -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_OFST 40 -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_LEN 4 -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_LBN 320 -#define MAE_MPORT_DESC_V2_NET_PORT_IDX_WIDTH 32 -/* The m-port delivered to */ -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_OFST 40 -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_LEN 4 -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_LBN 320 -#define MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_WIDTH 32 -/* The type of thing that owns the VNIC */ -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_OFST 40 -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_LEN 4 -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_FUNCTION 0x1 /* enum */ -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_PLUGIN 0x2 /* enum */ -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_LBN 320 -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_WIDTH 32 -/* The PCIe interface on which the function lives. CJK: We need an enumeration - * of interfaces that we extend as new interface (types) appear. This belongs - * elsewhere and should be referenced from here - */ -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_OFST 44 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_LEN 4 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_LBN 352 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_WIDTH 32 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_OFST 48 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_LEN 2 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_LBN 384 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_WIDTH 16 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_OFST 50 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_LEN 2 -/* enum: Indicates that the function is a PF */ -#define MAE_MPORT_DESC_V2_VF_IDX_NULL 0xffff -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_LBN 400 -#define MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_WIDTH 16 -/* Reserved. Should be ignored for now. */ -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_OFST 44 -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_LEN 4 -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_LBN 352 -#define MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_WIDTH 32 -/* A client handle for the VNIC's owner. Only valid for type VNIC. */ -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_OFST 52 -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_LEN 4 -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_LBN 416 -#define MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_WIDTH 32 - - -/***********************************/ -/* MC_CMD_MAE_MPORT_ENUMERATE - * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command - * will be removed at some future point. - */ -#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c -#undef MC_CMD_0x17c_PRIVILEGE_CTG - -#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_MAE_MPORT_ENUMERATE_IN msgrequest */ -#define MC_CMD_MAE_MPORT_ENUMERATE_IN_LEN 0 - -/* MC_CMD_MAE_MPORT_ENUMERATE_OUT msgresponse */ -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMIN 8 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMAX 252 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMAX_MCDI2 1020 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_LEN(num) (8+1*(num)) -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_NUM(len) (((len)-8)/1) -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_COUNT_OFST 0 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_COUNT_LEN 4 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_SIZEOF_MPORT_DESC_OFST 4 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_SIZEOF_MPORT_DESC_LEN 4 -/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may - * grow in future version of this command. Drivers should use a stride of - * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present. - */ -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_OFST 8 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_LEN 1 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MINNUM 0 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244 -#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012 - /***********************************/ /* MC_CMD_MAE_MPORT_READ_JOURNAL @@ -29569,73 +25594,6 @@ #define MC_CMD_TABLE_INSERT_OUT_LEN 0 -/***********************************/ -/* MC_CMD_TABLE_UPDATE - * Update an existing entry in a table with a new response value. May return - * EINVAL for unknown table ID or other bad request parameters, ENOENT if the - * entry does not already exist, or EPERM if the operation is not permitted. In - * case of an error, the additional MCDI error argument field returns the raw - * error code from the underlying CAM driver. - */ -#define MC_CMD_TABLE_UPDATE 0x1ce -#undef MC_CMD_0x1ce_PRIVILEGE_CTG - -#define MC_CMD_0x1ce_PRIVILEGE_CTG SRIOV_CTG_GENERAL - -/* MC_CMD_TABLE_UPDATE_IN msgrequest */ -#define MC_CMD_TABLE_UPDATE_IN_LENMIN 16 -#define MC_CMD_TABLE_UPDATE_IN_LENMAX 252 -#define MC_CMD_TABLE_UPDATE_IN_LENMAX_MCDI2 1020 -#define MC_CMD_TABLE_UPDATE_IN_LEN(num) (12+4*(num)) -#define MC_CMD_TABLE_UPDATE_IN_DATA_NUM(len) (((len)-12)/4) -/* Table identifier. */ -#define MC_CMD_TABLE_UPDATE_IN_TABLE_ID_OFST 0 -#define MC_CMD_TABLE_UPDATE_IN_TABLE_ID_LEN 4 -/* Enum values, see field(s): */ -/* TABLE_ID */ -/* Width in bits of supplied key data (must match table properties). */ -#define MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_OFST 4 -#define MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_LEN 2 -/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM - * when allocated MASK_ID is used instead). - */ -#define MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_OFST 6 -#define MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_LEN 2 -/* Width in bits of supplied response data (for INSERT and UPDATE operations - * this must match the table properties; for DELETE operations, no response - * data is required and this must be 0). - */ -#define MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_OFST 8 -#define MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_LEN 2 -/* Mask ID for STCAM table - used instead of mask data if the table descriptor - * reports ALLOC_MASKS==1. Otherwise set to 0. - */ -#define MC_CMD_TABLE_UPDATE_IN_MASK_ID_OFST 6 -#define MC_CMD_TABLE_UPDATE_IN_MASK_ID_LEN 2 -/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */ -#define MC_CMD_TABLE_UPDATE_IN_PRIORITY_OFST 8 -#define MC_CMD_TABLE_UPDATE_IN_PRIORITY_LEN 2 -/* (32-bit alignment padding - set to 0) */ -#define MC_CMD_TABLE_UPDATE_IN_RESERVED_OFST 10 -#define MC_CMD_TABLE_UPDATE_IN_RESERVED_LEN 2 -/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0) - * data values. Each of these items is logically treated as a single wide N-bit - * value, in which the individual fields have been placed within that value per - * the LBN and WIDTH information from the table field descriptors. The wide - * N-bit value is padded with 0 bits at the MSB end if necessary to make a - * multiple of 32 bits. The value is then packed into this command as a - * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc. - */ -#define MC_CMD_TABLE_UPDATE_IN_DATA_OFST 12 -#define MC_CMD_TABLE_UPDATE_IN_DATA_LEN 4 -#define MC_CMD_TABLE_UPDATE_IN_DATA_MINNUM 1 -#define MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM 60 -#define MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM_MCDI2 252 - -/* MC_CMD_TABLE_UPDATE_OUT msgresponse */ -#define MC_CMD_TABLE_UPDATE_OUT_LEN 0 - - /***********************************/ /* MC_CMD_TABLE_DELETE * Delete an existing entry in a table. May return EINVAL for unknown table ID @@ -29702,5 +25660,124 @@ /* MC_CMD_TABLE_DELETE_OUT msgresponse */ #define MC_CMD_TABLE_DELETE_OUT_LEN 0 +/* MC_CMD_QUEUE_HANDLE structuredef: On X4, to distinguish between full- + * featured (X2-style) VIs and low-latency (X3-style) queues, we use the top + * bits of the queue handle to specify the queue type in all MCDI calls which + * refer to VIs/queues. These bits should be masked off when indexing into a + * queue in the BAR. + */ +#define MC_CMD_QUEUE_HANDLE_LEN 4 +/* Combined queue number and type. This is the ID returned by and passed into + * MCDI calls that use queues. + */ +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_OFST 0 +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_LEN 4 +#define MC_CMD_QUEUE_HANDLE_QUEUE_NUM_OFST 0 +#define MC_CMD_QUEUE_HANDLE_QUEUE_NUM_LBN 0 +#define MC_CMD_QUEUE_HANDLE_QUEUE_NUM_WIDTH 24 +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_OFST 0 +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LBN 24 +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_WIDTH 8 +/* enum: Indicates that the queue instance is a full-featured VI */ +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_FF_VI 0x0 +/* enum: Indicates that the queue instance is a LL TXQ */ +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_TXQ 0x1 +/* enum: Indicates that the queue instance is a LL RXQ */ +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_RXQ 0x2 +/* enum: Indicates that the queue instance is a LL EVQ */ +#define MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_EVQ 0x3 +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_LBN 0 +#define MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_WIDTH 32 + + +/***********************************/ +/* MC_CMD_ALLOC_LL_QUEUES + * Allocate low latency (X3-style) queues for current PCI function. Can be + * called more than once if desired to allocate more queues. + */ +#define MC_CMD_ALLOC_LL_QUEUES 0x1dd +#undef MC_CMD_0x1dd_PRIVILEGE_CTG + +#define MC_CMD_0x1dd_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_ALLOC_LL_QUEUES_IN msgrequest */ +#define MC_CMD_ALLOC_LL_QUEUES_IN_LEN 24 +/* The minimum number of TXQs that is acceptable */ +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_TXQ_COUNT_OFST 0 +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_TXQ_COUNT_LEN 4 +/* The maximum number of TXQs that would be useful */ +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_TXQ_COUNT_OFST 4 +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_TXQ_COUNT_LEN 4 +/* The minimum number of RXQs that is acceptable */ +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_RXQ_COUNT_OFST 8 +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_RXQ_COUNT_LEN 4 +/* The maximum number of RXQs that would be useful */ +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_RXQ_COUNT_OFST 12 +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_RXQ_COUNT_LEN 4 +/* The minimum number of EVQs that is acceptable */ +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_EVQ_COUNT_OFST 16 +#define MC_CMD_ALLOC_LL_QUEUES_IN_MIN_EVQ_COUNT_LEN 4 +/* The maximum number of EVQs that would be useful */ +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_EVQ_COUNT_OFST 20 +#define MC_CMD_ALLOC_LL_QUEUES_IN_MAX_EVQ_COUNT_LEN 4 + +/* MC_CMD_ALLOC_LL_QUEUES_OUT msgresponse */ +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LENMIN 16 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LENMAX 252 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LENMAX_MCDI2 1020 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_LEN(num) (12+4*(num)) +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_NUM(len) (((len)-12)/4) +/* The number of TXQs allocated in this request */ +#define MC_CMD_ALLOC_LL_QUEUES_OUT_TXQ_COUNT_OFST 0 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_TXQ_COUNT_LEN 4 +/* The number of RXQs allocated in this request */ +#define MC_CMD_ALLOC_LL_QUEUES_OUT_RXQ_COUNT_OFST 4 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_RXQ_COUNT_LEN 4 +/* The number of EVQs allocated in this request */ +#define MC_CMD_ALLOC_LL_QUEUES_OUT_EVQ_COUNT_OFST 8 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_EVQ_COUNT_LEN 4 +/* A list of allocated queues, returned as MC_CMD_QUEUE_HANDLEs, not + * necessarily contiguous. TXQs are first in the list, followed by RXQs then + * EVQs. The type of each queue is indicated by the top bits (see the + * QUEUE_TYPE enum) + */ +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_OFST 12 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_LEN 4 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MINNUM 1 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MAXNUM 60 +#define MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MAXNUM_MCDI2 252 + + +/***********************************/ +/* MC_CMD_FREE_LL_QUEUES + * Free low latency (X3-style) queues for current PCI function. + */ +#define MC_CMD_FREE_LL_QUEUES 0x1de +#undef MC_CMD_0x1de_PRIVILEGE_CTG + +#define MC_CMD_0x1de_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_FREE_LL_QUEUES_IN msgrequest */ +#define MC_CMD_FREE_LL_QUEUES_IN_LENMIN 8 +#define MC_CMD_FREE_LL_QUEUES_IN_LENMAX 252 +#define MC_CMD_FREE_LL_QUEUES_IN_LENMAX_MCDI2 1020 +#define MC_CMD_FREE_LL_QUEUES_IN_LEN(num) (4+4*(num)) +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_NUM(len) (((len)-4)/4) +/* The number of queues to free. */ +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUE_COUNT_OFST 0 +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUE_COUNT_LEN 4 +/* A list of queues to free, as a list of MC_CMD_QUEUE_HANDLEs. They must have + * all been previously allocated by MC_CMD_ALLOC_LL_QUEUES. The type of each + * queue should be indicated by the top bits. + */ +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_OFST 4 +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_LEN 4 +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MINNUM 1 +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MAXNUM 62 +#define MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MAXNUM_MCDI2 254 + +/* MC_CMD_FREE_LL_QUEUES_OUT msgresponse */ +#define MC_CMD_FREE_LL_QUEUES_OUT_LEN 0 + #endif /* MCDI_PCOL_H */