diff mbox series

[2/2] net: phy: realtek: add dt property to disable broadcast PHY address

Message ID 20241202195029.2045633-2-kmlinuxm@gmail.com (mailing list archive)
State Changes Requested
Delegated to: Netdev Maintainers
Headers show
Series [1/2] net: phy: realtek: add combo mode support for RTL8211FS | expand

Checks

Context Check Description
netdev/series_format warning Single patches do not need cover letters; Target tree name not specified in the subject
netdev/tree_selection success Guessed tree name to be net-next
netdev/ynl success Generated files up to date; no warnings/errors; no diff in generated;
netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 3 this patch: 3
netdev/build_tools success No tools touched, skip
netdev/cc_maintainers warning 4 maintainers not CCed: linux@armlinux.org.uk edumazet@google.com pabeni@redhat.com hkallweit1@gmail.com
netdev/build_clang success Errors and warnings before: 3 this patch: 3
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
netdev/build_allmodconfig_warn success Errors and warnings before: 304 this patch: 304
netdev/checkpatch warning WARNING: line length of 88 exceeds 80 columns
netdev/build_clang_rust success No Rust files in patch. Skipping build
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0
netdev/contest success net-next-2024-12-02--21-00 (tests: 760)

Commit Message

Zhiyuan Wan Dec. 2, 2024, 7:50 p.m. UTC
This patch add support to disable 'broadcast PHY address' feature of
RTL8211F.

This feature is enabled defaultly after a reset of this transceiver.
When this feature is enabled, the phy not only responds to the
configuration PHY address by pin states on board, but also responds
to address 0, the optional broadcast address of the MDIO bus.

But not every transceiver supports this feature, when RTL8211
shares one MDIO bus with other transceivers which doesn't support
this feature, like mt7530 switch chip (integrated in mt7621 SoC),
it usually causes address conflict, leads to the
port of RTL8211FS stops working.

This patch adds dt property `realtek,phyad0-disable` to disable
broadcast PHY address feature of this transceiver.

This patch did not change the default behavior of this driver.

Signed-off-by: Yuki Lee <febrieac@outlook.com>
Signed-off-by: Zhiyuan Wan <kmlinuxm@gmail.com>
---
 drivers/net/phy/realtek.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

Comments

Andrew Lunn Dec. 3, 2024, 12:04 a.m. UTC | #1
On Tue, Dec 03, 2024 at 03:50:29AM +0800, Zhiyuan Wan wrote:
> This patch add support to disable 'broadcast PHY address' feature of
> RTL8211F.
> 
> This feature is enabled defaultly after a reset of this transceiver.
> When this feature is enabled, the phy not only responds to the
> configuration PHY address by pin states on board, but also responds
> to address 0, the optional broadcast address of the MDIO bus.
> 
> But not every transceiver supports this feature, when RTL8211
> shares one MDIO bus with other transceivers which doesn't support
> this feature, like mt7530 switch chip (integrated in mt7621 SoC),
> it usually causes address conflict, leads to the
> port of RTL8211FS stops working.

I think you can do this without needing a new property. The DT binding
has:

            reg = <4>;

This is the address the PHY should respond on. If reg is not 0, then
broadcast is not wanted.

If reg is 0, it means one of two things:

The DT author did not know about this broadcast feature, the PHY
appeared at address 0, so they wrote that. It might actually be
strapped to another address, but it does not matter.

The DT author wants it to use the broadcast address, it might even be
strapped to address 0.

Am i missing anything?

	Andrew
diff mbox series

Patch

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 10a87d58c..014dd2da1 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -31,6 +31,7 @@ 
 #define RTL8211F_PHYCR1				0x18
 #define RTL8211F_PHYCR2				0x19
 #define RTL8211F_INSR				0x1d
+#define RTL8211F_PHYAD0_EN			BIT(13)
 
 #define RTL8211FS_FIBER_ESR			0x0F
 #define RTL8211FS_MODE_MASK			0xC000
@@ -421,12 +422,18 @@  static int rtl8211f_config_init(struct phy_device *phydev)
 	struct device *dev = &phydev->mdio.dev;
 	u16 val_txdly, val_rxdly;
 	int ret;
+	u16 phyad0_disable = 0;
 
+	if (of_property_read_bool(dev->of_node, "realtek,phyad0-disable")) {
+		phyad0_disable = RTL8211F_PHYAD0_EN;
+		dev_dbg(dev, "disabling MDIO address 0 for this phy");
+	}
 	ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
-				       RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,
+				       RTL8211F_ALDPS_PLL_OFF  | RTL8211F_ALDPS_ENABLE |
+				       RTL8211F_ALDPS_XTAL_OFF | phyad0_disable,
 				       priv->phycr1);
 	if (ret < 0) {
-		dev_err(dev, "aldps mode  configuration failed: %pe\n",
+		dev_err(dev, "mode configuration failed: %pe\n",
 			ERR_PTR(ret));
 		return ret;
 	}