Message ID | 20241202195029.2045633-2-kmlinuxm@gmail.com (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | [1/2] net: phy: realtek: add combo mode support for RTL8211FS | expand |
On Tue, Dec 03, 2024 at 03:50:29AM +0800, Zhiyuan Wan wrote: > This patch add support to disable 'broadcast PHY address' feature of > RTL8211F. > > This feature is enabled defaultly after a reset of this transceiver. > When this feature is enabled, the phy not only responds to the > configuration PHY address by pin states on board, but also responds > to address 0, the optional broadcast address of the MDIO bus. > > But not every transceiver supports this feature, when RTL8211 > shares one MDIO bus with other transceivers which doesn't support > this feature, like mt7530 switch chip (integrated in mt7621 SoC), > it usually causes address conflict, leads to the > port of RTL8211FS stops working. I think you can do this without needing a new property. The DT binding has: reg = <4>; This is the address the PHY should respond on. If reg is not 0, then broadcast is not wanted. If reg is 0, it means one of two things: The DT author did not know about this broadcast feature, the PHY appeared at address 0, so they wrote that. It might actually be strapped to another address, but it does not matter. The DT author wants it to use the broadcast address, it might even be strapped to address 0. Am i missing anything? Andrew
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 10a87d58c..014dd2da1 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -31,6 +31,7 @@ #define RTL8211F_PHYCR1 0x18 #define RTL8211F_PHYCR2 0x19 #define RTL8211F_INSR 0x1d +#define RTL8211F_PHYAD0_EN BIT(13) #define RTL8211FS_FIBER_ESR 0x0F #define RTL8211FS_MODE_MASK 0xC000 @@ -421,12 +422,18 @@ static int rtl8211f_config_init(struct phy_device *phydev) struct device *dev = &phydev->mdio.dev; u16 val_txdly, val_rxdly; int ret; + u16 phyad0_disable = 0; + if (of_property_read_bool(dev->of_node, "realtek,phyad0-disable")) { + phyad0_disable = RTL8211F_PHYAD0_EN; + dev_dbg(dev, "disabling MDIO address 0 for this phy"); + } ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1, - RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF, + RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | + RTL8211F_ALDPS_XTAL_OFF | phyad0_disable, priv->phycr1); if (ret < 0) { - dev_err(dev, "aldps mode configuration failed: %pe\n", + dev_err(dev, "mode configuration failed: %pe\n", ERR_PTR(ret)); return ret; }