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Tue, 3 Dec 2024 12:29:58 -0800 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , , Cosmin Ratiu , Tariq Toukan Subject: [PATCH mlx5-next V4 01/11] net/mlx5: ifc: Reorganize mlx5_ifc_flow_table_context_bits Date: Tue, 3 Dec 2024 22:29:14 +0200 Message-ID: <20241203202924.228440-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241203202924.228440-1-tariqt@nvidia.com> References: <20241203202924.228440-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003442:EE_|DS7PR12MB8324:EE_ X-MS-Office365-Filtering-Correlation-Id: abbfdf2c-7390-4467-3154-08dd13d9493e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: lL19uq44g88gkegTZHRVOzOUtL6KvKOOFM2WizTwZrg7Oh2hPc6L1OUf7gzRgbBteBx/dFgBmAj0iZTczxlPEramIrgkXkTFSadiXLb2Z81jr8wzKVO90QYwJqXr0O8nr4JfElKRwg/Us68OFalO8U1hhDVT/eokFtaVoYeumK5iviNxOA/R1+tAtwIeO2uWsJzjEQt4D3yOEDMzbr6CgTBR8UdG78XRUmyHs6XhNMwddNHJu4/VqwXu9ZCcGq7ZMYnH0+aZKYiV+EPARbX/ukKwkOsWrjR2ujx5mz2omP2BItDKQNn2/dEDET3ZHa2jad4XJ/f2S4+trVIYyJZ++wwEfliHzZig8cEKNPde+AXjYdMOhTQTaKAkpd1Szq0ragoer4DAPRHF1fbNO1IvNrUcOIK0f+gR/U4wBG3m0fQGl4T9GOJ+r2/5g8jszYp9J9i7CXeerVjKVA8XsWBweCH7IYjtego7yWTV+QRI3IMeD8k7/U1lOfhLRyIyUsW6bd/3nvUgjNhdTSw0hyni5BFxY7aleUKvc56Hw/FC/Z6rE20hDsIOlz2q0GHUMv6XgM+fwaCQCJy4JRTEFpzdmP8eNr1IpoamLZjKd3I2oEioMWiMs7+sgVSyyyzrCLFiSaq98uYA7x/UTmEgwNwYvYJITVf9b69rle+gAwV9MS5/e2tnTfOmN6EXycargYxFu2ra8lzsZjhwgZfAqlHkzf6VW+RL1D5KIP+UjtcsAI3fIU2QwgDZZWilX6Rv/EvnuqR4bX+Q9eIjq7YjDjVoThqzdiYdIJzhJLS7JNZ6ADSrFTGNJMxEQBWaayFedbQ58tjY8Vtlf77Q6f1I5ZHMQDYro4pIsnd6Ou4VXa8JI6jKFA7Xllnaun/ZIoGQid70kvybbmIRvXRLmN6Wr5JmUHSZpctE523pM96oUhjBt1EXp84LzGGFAtSw8MZBpUay4mwzCPhdSA9tVl+9YH8o2+hxM6cx/rDe3f+CMWyg8IZukZ0r9C4OBghDMDc91FfB8Z8tFOTOcZ3xTevVzgWKy0NaJ3SYv7ZPGJXslCv9G+2I9Pen4SDtBkM2l+gSk/YSfP87nnhgzXkxAuMau4t2gx+hWAoklYfkqnyRjT+S4ZrreQ35HBD4ryQfn0/DZ/p1ycXdZEiGJErDZk55Skef6xP2JfqsPQFzvZm+f4t12tdYn+/2bLGCHIKe5rMuoFDbWYFW3AUHTvNbXPAei2cygpbBK6BdaepLGP39TqzUmBIRrRFU9xfu8imaiOKYNXMUhxxqy3UWtaKhlAo6GUBbuOD3Z6phJ9u4EdnoG1gpkhUkw4EgKDAEETM7egZtimPMIzHs/NM01CKjeOElPxANi1VTqDVNtOIQZFBYAqYG6t6TtZkh1GMRXVpW63mTzWNzhjPka2PG/M5UFc12FtnXiGeWwG0ClS3o88OGDNlvdZWHu/p+yVAtM8b/n2Jy0PkA X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Dec 2024 20:30:11.2872 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: abbfdf2c-7390-4467-3154-08dd13d9493e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003442.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8324 From: Cosmin Ratiu The nested union at the end is not in the same style as the rest of the code, so un-nest it to make the style uniformly applied again. Signed-off-by: Cosmin Ratiu Reviewed-by: Saeed Mahameed Signed-off-by: Tariq Toukan --- include/linux/mlx5/mlx5_ifc.h | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 4fbbcf35498b..f3650f989e68 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -6324,6 +6324,20 @@ struct mlx5_ifc_modify_other_hca_cap_in_bits { struct mlx5_ifc_other_hca_cap_bits other_capability; }; +struct mlx5_ifc_sw_owner_icm_root_params_bits { + u8 sw_owner_icm_root_1[0x40]; + + u8 sw_owner_icm_root_0[0x40]; +}; + +struct mlx5_ifc_rtc_params_bits { + u8 rtc_id_0[0x20]; + + u8 rtc_id_1[0x20]; + + u8 reserved_at_40[0x40]; +}; + struct mlx5_ifc_flow_table_context_bits { u8 reformat_en[0x1]; u8 decap_en[0x1]; @@ -6342,20 +6356,10 @@ struct mlx5_ifc_flow_table_context_bits { u8 lag_master_next_table_id[0x18]; u8 reserved_at_60[0x60]; - union { - struct { - u8 sw_owner_icm_root_1[0x40]; - - u8 sw_owner_icm_root_0[0x40]; - } sws; - struct { - u8 rtc_id_0[0x20]; - u8 rtc_id_1[0x20]; - - u8 reserved_at_100[0x40]; - - } hws; + union { + struct mlx5_ifc_sw_owner_icm_root_params_bits sws; + struct mlx5_ifc_rtc_params_bits hws; }; };