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[93.34.91.161]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-38621909644sm8719170f8f.76.2024.12.07.16.21.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Dec 2024 16:21:47 -0800 (PST) From: Christian Marangi To: Christian Marangi , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Srinivas Kandagatla , Heiner Kallweit , Russell King , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@airoha.com Subject: [net-next PATCH v10 3/9] dt-bindings: net: dsa: Document support for Airoha AN8855 DSA Switch Date: Sun, 8 Dec 2024 01:20:38 +0100 Message-ID: <20241208002105.18074-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241208002105.18074-1-ansuelsmth@gmail.com> References: <20241208002105.18074-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Document support for Airoha AN8855 5-port Gigabit Switch. It does expose the 5 Internal PHYs on the MDIO bus and each port can access the Switch register space by configurting the PHY page. Each internal PHY might require calibration with the fused EFUSE on the switch exposed by the Airoha AN8855 SoC NVMEM. Signed-off-by: Christian Marangi --- .../net/dsa/airoha,an8855-switch.yaml | 105 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml diff --git a/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml b/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml new file mode 100644 index 000000000000..63bcbebd6a29 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/airoha,an8855-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha AN8855 Gigabit Switch + +maintainers: + - Christian Marangi + +description: > + Airoha AN8855 is a 5-port Gigabit Switch. + + It does expose the 5 Internal PHYs on the MDIO bus and each port + can access the Switch register space by configurting the PHY page. + + Each internal PHY might require calibration with the fused EFUSE on + the switch exposed by the Airoha AN8855 SoC NVMEM. + +$ref: dsa.yaml# + +properties: + compatible: + const: airoha,an8855-switch + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + + airoha,ext-surge: + $ref: /schemas/types.yaml#/definitions/flag + description: + Calibrate the internal PHY with the calibration values stored in EFUSE + for the r50Ohm values. + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include + + ethernet-switch { + compatible = "airoha,an8855-switch"; + reset-gpios = <&pio 39 0>; + + airoha,ext-surge; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&internal_phy1>; + }; + + port@1 { + reg = <1>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&internal_phy2>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&internal_phy3>; + }; + + port@3 { + reg = <3>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&internal_phy4>; + }; + + port@4 { + reg = <4>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&internal_phy5>; + }; + + port@5 { + reg = <5>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index e3569fe5f3de..fd37e829fab5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -718,6 +718,7 @@ L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) L: netdev@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml +F: Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml F: Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml AIROHA ETHERNET DRIVER