diff mbox series

[1/4] dt-bindings: net: Add Realtek MDIO controller

Message ID 20241211235342.1573926-2-chris.packham@alliedtelesis.co.nz (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series RTL9300 MDIO driver | expand

Checks

Context Check Description
netdev/series_format success Posting correctly formatted
netdev/tree_selection success Guessed tree name to be net-next
netdev/ynl success Generated files up to date; no warnings/errors; no diff in generated;
netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/build_tools success No tools touched, skip
netdev/cc_maintainers success CCed 10 of 10 maintainers
netdev/build_clang success Errors and warnings before: 1 this patch: 1
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
netdev/build_allmodconfig_warn success Errors and warnings before: 5 this patch: 5
netdev/checkpatch warning WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
netdev/build_clang_rust success No Rust files in patch. Skipping build
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0
netdev/contest success net-next-2024-12-12--09-01 (tests: 795)

Commit Message

Chris Packham Dec. 11, 2024, 11:53 p.m. UTC 
Add dtschema for the MDIO controller found in the RTL9300 SoCs. The
controller is slightly unusual in that direct MDIO communication is not
possible. Instead, the SMI bus and PHY address are associated with a
switch port and the port number is used when talking to the PHY.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 .../bindings/net/realtek,rtl9301-mdio.yaml    | 82 +++++++++++++++++++
 1 file changed, 82 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml

Comments

Andrew Lunn Dec. 12, 2024, 5:13 p.m. UTC | #1 
> +      realtek,smi-address:
> +        $ref: /schemas/types.yaml#/definitions/uint32-array
> +        description: SMI interface and address for the connected PHY
> +        items:
> +          - description: SMI interface number associated with the port.
> +          - description: SMI address of the PHY for the port.

Is the hardware really random here with its mapping of PHYs?
Generally, hardware is pretty predictable, logical. I'm just wondering
if this property is really required, or if it can be replaced with
some logic, avoiding typ0s.

	Andrew
Chris Packham Dec. 13, 2024, 12:56 a.m. UTC | #2 
Hi Andrew,

On 13/12/2024 06:13, Andrew Lunn wrote:
>> +      realtek,smi-address:
>> +        $ref: /schemas/types.yaml#/definitions/uint32-array
>> +        description: SMI interface and address for the connected PHY
>> +        items:
>> +          - description: SMI interface number associated with the port.
>> +          - description: SMI address of the PHY for the port.
> Is the hardware really random here with its mapping of PHYs?
> Generally, hardware is pretty predictable, logical. I'm just wondering
> if this property is really required, or if it can be replaced with
> some logic, avoiding typ0s.

The hardware is pretty flexible in this respect. You can pretty 
arbitrarily arrange your PHYs. Not all ports support the same kind of 
SERDES interface but as far as the MDIO interface goes you can arrange 
things however you like.
Andrew Lunn Dec. 13, 2024, 11:58 a.m. UTC | #3 
On Fri, Dec 13, 2024 at 01:56:52PM +1300, Chris Packham wrote:
> Hi Andrew,
> 
> On 13/12/2024 06:13, Andrew Lunn wrote:
> > > +      realtek,smi-address:
> > > +        $ref: /schemas/types.yaml#/definitions/uint32-array
> > > +        description: SMI interface and address for the connected PHY
> > > +        items:
> > > +          - description: SMI interface number associated with the port.
> > > +          - description: SMI address of the PHY for the port.
> > Is the hardware really random here with its mapping of PHYs?
> > Generally, hardware is pretty predictable, logical. I'm just wondering
> > if this property is really required, or if it can be replaced with
> > some logic, avoiding typ0s.
> 
> The hardware is pretty flexible in this respect. You can pretty arbitrarily
> arrange your PHYs. Not all ports support the same kind of SERDES interface
> but as far as the MDIO interface goes you can arrange things however you
> like.

Is there a reason to not just statically define it, maybe with a table
in the driver? Does a DT developer actually need this flexibility?

	Andrew
Chris Packham Dec. 15, 2024, 7:52 p.m. UTC | #4 
Hi Andrew,

On 14/12/2024 00:58, Andrew Lunn wrote:
> On Fri, Dec 13, 2024 at 01:56:52PM +1300, Chris Packham wrote:
>> Hi Andrew,
>>
>> On 13/12/2024 06:13, Andrew Lunn wrote:
>>>> +      realtek,smi-address:
>>>> +        $ref: /schemas/types.yaml#/definitions/uint32-array
>>>> +        description: SMI interface and address for the connected PHY
>>>> +        items:
>>>> +          - description: SMI interface number associated with the port.
>>>> +          - description: SMI address of the PHY for the port.
>>> Is the hardware really random here with its mapping of PHYs?
>>> Generally, hardware is pretty predictable, logical. I'm just wondering
>>> if this property is really required, or if it can be replaced with
>>> some logic, avoiding typ0s.
>> The hardware is pretty flexible in this respect. You can pretty arbitrarily
>> arrange your PHYs. Not all ports support the same kind of SERDES interface
>> but as far as the MDIO interface goes you can arrange things however you
>> like.
> Is there a reason to not just statically define it, maybe with a table
> in the driver? Does a DT developer actually need this flexibility?

It's a part of the board design so I think it's something that should go 
into the device tree. For example I've got 3 different boards right now 
that use different arrangements of MDIO connections to the PHYs mostly 
for ease of board layout (and one because it has different PHYs).
Andrew Lunn Dec. 15, 2024, 9:38 p.m. UTC | #5 
> It's a part of the board design so I think it's something that should go
> into the device tree. For example I've got 3 different boards right now that
> use different arrangements of MDIO connections to the PHYs mostly for ease
> of board layout (and one because it has different PHYs).

O.K. Lets keep this property then.

	Andrew
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml
new file mode 100644
index 000000000000..95ed77ff8dcc
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml
@@ -0,0 +1,82 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek RTL9300 MDIO Controller
+
+maintainers:
+  - Chris Packham <chris.packham@alliedtelesis.co.nz>
+
+allOf:
+  - $ref: mdio.yaml#
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - realtek,rtl9302b-mdio
+              - realtek,rtl9302c-mdio
+              - realtek,rtl9303-mdio
+          - const: realtek,rtl9301-mdio
+      - const: realtek,rtl9301-mdio
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 0
+
+  reg:
+    maxItems: 1
+
+patternProperties:
+  '^ethernet-phy(@[a-f0-9]+)?':
+    type: object
+    $ref: ethernet-phy.yaml#
+
+    properties:
+      reg:
+        description:
+          The MDIO communication on the RTL9300 is abstracted by the switch. At
+          the software level communication uses the switch port to address the
+          PHY with the actual MDIO bus and address having been setup via the
+          realtek,smi-address property.
+
+      realtek,smi-address:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description: SMI interface and address for the connected PHY
+        items:
+          - description: SMI interface number associated with the port.
+          - description: SMI address of the PHY for the port.
+
+    unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    mdio@ca00 {
+        compatible = "realtek,rtl9301-mdio";
+        reg = <0xca00 0x200>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        ethernet-phy@0 {
+            compatible = "ethernet-phy-ieee802.3-c45";
+            reg = <0>;
+            realtek,smi-address = <0 1>;
+        };
+
+        ethernet-phy@8 {
+            compatible = "ethernet-phy-ieee802.3-c45";
+            reg = <8>;
+            realtek,smi-address = <1 1>;
+        };
+    };