From patchwork Mon Dec 16 06:47:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abdul Rahim, Faizal" X-Patchwork-Id: 13909275 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1E0D1D416E; Mon, 16 Dec 2024 06:48:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331738; cv=none; b=k9DCH8YyQeNQbMABU64zb6CuxFtgV6sXIMF9o590idxy1cUHtvZZXJGP3Pl2H7JJrER/5N0HCtXA7yeZ0CcmfDFV5+Xvxkw6m4kAbm26FGqgpdV5AkyBhHSdKPi0IOmRW4/IYRLIvwuDTZ2GgvZHR18+MfQ9I7LWMirNgyM8jgs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734331738; c=relaxed/simple; bh=SH1knRUZnCuOeW48/BTbg9x3crY0Xqb3zWnodThDr08=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cUkHrUtSd1HvtQfqjlhOSEAR8NiI+Tl8x2uu+VwXYAKF4RalH87OS/861RKIP93LJYC//CVuZuDxTULvowLGw+xpXrLvqyTR12w+NJrmsmEK4aArZueMIev+tr9IoOg/ZTjdMvQucaM6U3187bBtpkqVGyRErzT+Jh69/S3gHjU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EfGDCoob; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EfGDCoob" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734331737; x=1765867737; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SH1knRUZnCuOeW48/BTbg9x3crY0Xqb3zWnodThDr08=; b=EfGDCoobXY8CA163Rj+EjTnRED6pKhrXx5TcVnd23+gI+d8c5c0Y+f2R 2DAUvHeE/ZRQeCSuddc+RC//7jqUvm+C6Q/SjAbbxmdDU2OZ4LHbYx+I/ /j3lJRzKKI5kPrHm3m1gphuAXHlq42dXO7jzw6K8VBdBqO8agjnzp9cHY Yi95oR/NzB6Z+fBNv7FmbGRL8GybRS03GXYwUIKK8ySCzJFhOvvP4/Ssc qVzfs3Huzs/9wrE+Y/OD0dDCSjYMvRh8CZqPLSfAAteXrUPJ2nwUXT5Ar BivKg56Ga0nje0bOaVMnCGjlfy9sNvQ7VibJuqlozspFKjBybUE+QJ40y A==; X-CSE-ConnectionGUID: FKz2NFXKTaWTYzIGU+ny9Q== X-CSE-MsgGUID: YruelxcYSiOeRH0/MelPXA== X-IronPort-AV: E=McAfee;i="6700,10204,11287"; a="34848208" X-IronPort-AV: E=Sophos;i="6.12,237,1728975600"; d="scan'208";a="34848208" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2024 22:48:56 -0800 X-CSE-ConnectionGUID: SsYkkiMFS5+xDZspKZwaww== X-CSE-MsgGUID: BjoyvCGVQUyitmnScZcIjw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="128101859" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa001.fm.intel.com with ESMTP; 15 Dec 2024 22:48:52 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Vinicius Costa Gomes Cc: Faizal Rahim , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH iwl-next 3/9] igc: Set the RX packet buffer size for TSN mode Date: Mon, 16 Dec 2024 01:47:14 -0500 Message-Id: <20241216064720.931522-4-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> References: <20241216064720.931522-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Vinicius Costa Gomes In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_defines.h | 3 +++ drivers/net/ethernet/intel/igc/igc_tsn.c | 13 +++++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 1f63a523faf2..3a78753ab050 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -400,7 +400,10 @@ #define I225_TXPBSIZE_DEFAULT 0x04000014 /* TXPBSIZE default */ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ +/* The total (RX + TX) packet buffers must sum to less than 64KB */ #define IGC_TXPBSIZE_TSN 0x041c71c7 /* 7k bytes buffer for each queue + 4KB for BMC*/ +#define IGC_RXPBSIZE_TSN 0x0000f08f /* 15KB for EXP + 15KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 1e44374ca1ff..f0213cfce07d 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -132,13 +132,17 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter) { u16 queue_per_tc[4] = { 3, 2, 1, 0 }; struct igc_hw *hw = &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; wr32(IGC_GTXOFFSET, 0); wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= I225_RXPBSIZE_DEFAULT; + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_restore_retx_default(adapter); @@ -194,7 +198,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; @@ -202,6 +206,11 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN); wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= IGC_RXPBSIZE_TSN; + + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_set_retx_qbvfullthreshold(adapter);