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b=HwHlB4L8G+F23plW3pwJ9SOk4l2iHbfdgrbHCRB6fH5UF+sel5endwvNDfs/dQcRI+lOGAjkTNmTcEVocmsKkMecrS+KMu1ILobImOTjAH4LQRkAX9iqN8mKh1BsWTtIq/3WlEAqMKarma0zjA9w+J8ducSbVt0t9IUOz62vXKZDnNBVL0QDAa9FEIcQiDp0IynKFYHVK9ubuVZJAZkDGM6j1TlbJ2nCBsgY/k/w1BWEHWAeWBDjNxNp5IyCX7VdLc/DKwWp4inqxx7vnDfHUuzW9Wr2lbHmb1DyAAJnaWtDKia9sM2aCKmLYhVAav3RJZZFAJ/DdXtLgPBaOQjy+w== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from PAXPR04MB8510.eurprd04.prod.outlook.com (2603:10a6:102:211::7) by AM7PR04MB7032.eurprd04.prod.outlook.com (2603:10a6:20b:112::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8272.13; Thu, 19 Dec 2024 06:04:23 +0000 Received: from PAXPR04MB8510.eurprd04.prod.outlook.com ([fe80::a7c2:e2fa:8e04:40db]) by PAXPR04MB8510.eurprd04.prod.outlook.com ([fe80::a7c2:e2fa:8e04:40db%6]) with mapi id 15.20.8272.005; Thu, 19 Dec 2024 06:04:23 +0000 From: Wei Fang To: claudiu.manoil@nxp.com, vladimir.oltean@nxp.com, xiaoning.wang@nxp.com, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, frank.li@nxp.com, horms@kernel.org, idosch@idosch.org, aleksander.lobakin@intel.com Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH v9 net-next 1/4] net: enetc: add Tx checksum offload for i.MX95 ENETC Date: Thu, 19 Dec 2024 13:47:52 +0800 Message-Id: <20241219054755.1615626-2-wei.fang@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241219054755.1615626-1-wei.fang@nxp.com> References: <20241219054755.1615626-1-wei.fang@nxp.com> X-ClientProxiedBy: JH0PR01CA0107.apcprd01.prod.exchangelabs.com (2603:1096:990:59::7) To PAXPR04MB8510.eurprd04.prod.outlook.com (2603:10a6:102:211::7) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB8510:EE_|AM7PR04MB7032:EE_ X-MS-Office365-Filtering-Correlation-Id: d27a440f-5d6c-4877-68ec-08dd1ff2fc05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|7416014|376014|1800799024|366016|921020|38350700014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: aHwTbXCuiFpPBZt2vnKsUWe0M/ROwogOFCSKke8g+IjlaApMU7FoNKEURJ6EKTelMfoo2nq8q1WFieCCx6uiYMv9qWJpikhf9Nm9x8RUekIDEpmdf0AlJsnumFdzLs7Io038roDYOQndmNRXxfGCpQcMWqJZ09aRC8p6Y8PBNWLppDJubk7ZPCzpT/CqSTRnDj2q3Y+ix59gsS7PTMrP6t0EwEYgRhzklXMSKiX+8UX5X7dOhfevXUKquHplrsA+Qm1a9m0T2I1oE/2mfJ0JakE1LcSf2Z3ga2N4ntDFjs+Js/ahMJB1jT+QFuuHLD0WF0po1PKhCMo/tetHkR9AdSJceOlRGoyXkw5Fzz282HJJJbaI4a2Vbb3rZS9NExeZ6I5H0j0wcq6DfPVZJyBiTsgv+H6FuKARN0lr/TZ6rRprmkZO3uyTULspT3Xf5AsnfPCoFBS7XT1bhKtCf92Btk44IT3Wt8wOlI5N+e2ipHCRkFlz4ZdZdl2A0r+W6egpM02VsSNKGHCjEZ/Mpco72Jo3IqJ3V+312umNIAg1ujpOFcerkZGEdQaL2XzEHemANgHlqVh+5kITA7CHsNuDSIJI37eAlz4brXIyGMD4r4lnuLQCaScrY3cElQxuxywFKy9LeJmpHL5Kt2Ze5GHCFZyC2khThcpm+nGgYXwJH8PLpfeozb/ixrRAaMH1QsRquHEylhrCV8Ozq6ijy8hIgcaVP/gnzTr3/ktPBv1SKhwctAQWlzBHUACl3zwUAr7QIc6Qy540+19+zqsG1uWUHZnDsCNgHRbCKnrcPCJ/8sAt44YLvRZhf6DYrQS6HIZN9GpaSvjNQsWC9KhQ2bRa1sbU5wqZ3pM+pPmV4+/WxWddOVbvpwE0YMZ6xKyynf/6cKDs2+ykuYl+jTo311l4MjwdNgIks1pL+vr3bd+b2L4ug8K4igQiA14tCKOh7Y3BNyNMXkZ9+qCi8TUfkWPMyQXBPCjRUw0PO+Hhj5VIVRqRqOpL0KJp9IRyOPpHIsAHWAtwBXK6AsVb1c7+wLg6oehCwMUbJ8aiXebthyWDknE+578rdZTI8hr8M1U9LMbDIELxpuEGAk5y2b6yBHYswgQFMxu/lXAmKTb50YkMW+rePoit94UKpxMiUSf2nEByKLn+9vUgWpgNaE+98OQ4isngppn1lELzGN4hw+UfK5IirCsV5JQ893uXvc75Y4UcIaAIHMN5pwPGA4ZNe6kmlRLDBNj7H/Nv+Y/r0iwzkMpZpzCXKvQWULCKmwAoGYqpBpsMQwsvNrH+XfUhlY57BOthU2zuZd0Oj0ZH64nuxouVKBLr1l2vvN9SmaT0g0T4Kitz8dUrCZspWXoJQGQGJp07hway4MiSQG+siqp03epdixKBTNOtxL22bSgr8qYnNOg1gKh89IL5iGWBpXYpN8GEkMJIKyLh58YyuMaPe5W1z2pcY/pMHDTVHxAiGDqkYP6m0ychiyV6ol85micnX2+7iUITVs2RHDZYo54v+g43H/U0TyOFhbimlFrROV4TrRJELmzWaNCrt2jxBy6ozZqPPAYfeqCni6ON6sfNBBmH1MbpsLz6kaPnXdHE/sdN X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d27a440f-5d6c-4877-68ec-08dd1ff2fc05 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB8510.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2024 06:04:23.0189 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: anifCuIwlpN8nrT2sRvAI2IY2bcHJ6hodT1kFBEuxgGYkKChPeTUj74ILUHuhgiku1EzfzBSDeYCCusCSlHwMQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR04MB7032 X-Patchwork-Delegate: kuba@kernel.org In addition to supporting Rx checksum offload, i.MX95 ENETC also supports Tx checksum offload. The transmit checksum offload is implemented through the Tx BD. To support Tx checksum offload, software needs to fill some auxiliary information in Tx BD, such as IP version, IP header offset and size, whether L4 is UDP or TCP, etc. Same as Rx checksum offload, Tx checksum offload capability isn't defined in register, so tx_csum bit is added to struct enetc_drvdata to indicate whether the device supports Tx checksum offload. Signed-off-by: Wei Fang Reviewed-by: Frank Li Reviewed-by: Claudiu Manoil --- v2: refine enetc_tx_csum_offload_check(). v3: 1. refine enetc_tx_csum_offload_check() and enetc_skb_is_tcp() through skb->csum_offset instead of touching skb->data. 2. add enetc_skb_is_ipv6() helper function v4: no changes v5: 1. remove 'inline' from enetc_skb_is_ipv6() and enetc_skb_is_tcp(). 2. temp_bd.ipcs is no need to be set due to Linux always aclculates the IPv4 checksum, so remove it. 3. simplify the setting of temp_bd.l3t. 4. remove the error log from the datapath v6: no changes v7: 1. Change the layout of enetc_tx_bd to fix the issue on big-endian hosts. 2. Rebase the patch due to remove the Rx checksum offload patch from v6. v8: no changes v9: Improve the else branch in enetc_map_tx_buffs(). --- drivers/net/ethernet/freescale/enetc/enetc.c | 53 ++++++++++++++++--- drivers/net/ethernet/freescale/enetc/enetc.h | 2 + .../net/ethernet/freescale/enetc/enetc_hw.h | 15 ++++-- .../freescale/enetc/enetc_pf_common.c | 3 ++ 4 files changed, 63 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/freescale/enetc/enetc.c b/drivers/net/ethernet/freescale/enetc/enetc.c index 535969fa0fdb..88f12c88110f 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc.c +++ b/drivers/net/ethernet/freescale/enetc/enetc.c @@ -146,6 +146,27 @@ static int enetc_ptp_parse(struct sk_buff *skb, u8 *udp, return 0; } +static bool enetc_tx_csum_offload_check(struct sk_buff *skb) +{ + switch (skb->csum_offset) { + case offsetof(struct tcphdr, check): + case offsetof(struct udphdr, check): + return true; + default: + return false; + } +} + +static bool enetc_skb_is_ipv6(struct sk_buff *skb) +{ + return vlan_get_protocol(skb) == htons(ETH_P_IPV6); +} + +static bool enetc_skb_is_tcp(struct sk_buff *skb) +{ + return skb->csum_offset == offsetof(struct tcphdr, check); +} + static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb) { bool do_vlan, do_onestep_tstamp = false, do_twostep_tstamp = false; @@ -163,6 +184,29 @@ static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb) dma_addr_t dma; u8 flags = 0; + enetc_clear_tx_bd(&temp_bd); + if (skb->ip_summed == CHECKSUM_PARTIAL) { + /* Can not support TSD and checksum offload at the same time */ + if (priv->active_offloads & ENETC_F_TXCSUM && + enetc_tx_csum_offload_check(skb) && !tx_ring->tsd_enable) { + temp_bd.l3_aux0 = FIELD_PREP(ENETC_TX_BD_L3_START, + skb_network_offset(skb)); + temp_bd.l3_aux1 = FIELD_PREP(ENETC_TX_BD_L3_HDR_LEN, + skb_network_header_len(skb) / 4); + temp_bd.l3_aux1 |= FIELD_PREP(ENETC_TX_BD_L3T, + enetc_skb_is_ipv6(skb)); + if (enetc_skb_is_tcp(skb)) + temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T, + ENETC_TXBD_L4T_TCP); + else + temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T, + ENETC_TXBD_L4T_UDP); + flags |= ENETC_TXBD_FLAGS_CSUM_LSO | ENETC_TXBD_FLAGS_L4CS; + } else if (skb_checksum_help(skb)) { + return 0; + } + } + i = tx_ring->next_to_use; txbd = ENETC_TXBD(*tx_ring, i); prefetchw(txbd); @@ -173,7 +217,6 @@ static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb) temp_bd.addr = cpu_to_le64(dma); temp_bd.buf_len = cpu_to_le16(len); - temp_bd.lstatus = 0; tx_swbd = &tx_ring->tx_swbd[i]; tx_swbd->dma = dma; @@ -594,7 +637,7 @@ static netdev_tx_t enetc_start_xmit(struct sk_buff *skb, { struct enetc_ndev_priv *priv = netdev_priv(ndev); struct enetc_bdr *tx_ring; - int count, err; + int count; /* Queue one-step Sync packet if already locked */ if (skb->cb[0] & ENETC_F_TX_ONESTEP_SYNC_TSTAMP) { @@ -627,11 +670,6 @@ static netdev_tx_t enetc_start_xmit(struct sk_buff *skb, return NETDEV_TX_BUSY; } - if (skb->ip_summed == CHECKSUM_PARTIAL) { - err = skb_checksum_help(skb); - if (err) - goto drop_packet_err; - } enetc_lock_mdio(); count = enetc_map_tx_buffs(tx_ring, skb); enetc_unlock_mdio(); @@ -3274,6 +3312,7 @@ static const struct enetc_drvdata enetc_pf_data = { static const struct enetc_drvdata enetc4_pf_data = { .sysclk_freq = ENETC_CLK_333M, + .tx_csum = true, .pmac_offset = ENETC4_PMAC_OFFSET, .eth_ops = &enetc4_pf_ethtool_ops, }; diff --git a/drivers/net/ethernet/freescale/enetc/enetc.h b/drivers/net/ethernet/freescale/enetc/enetc.h index 72fa03dbc2dd..e82eb9a9137c 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc.h +++ b/drivers/net/ethernet/freescale/enetc/enetc.h @@ -234,6 +234,7 @@ enum enetc_errata { struct enetc_drvdata { u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */ + u8 tx_csum:1; u64 sysclk_freq; const struct ethtool_ops *eth_ops; }; @@ -341,6 +342,7 @@ enum enetc_active_offloads { ENETC_F_QBV = BIT(9), ENETC_F_QCI = BIT(10), ENETC_F_QBU = BIT(11), + ENETC_F_TXCSUM = BIT(12), }; enum enetc_flags_bit { diff --git a/drivers/net/ethernet/freescale/enetc/enetc_hw.h b/drivers/net/ethernet/freescale/enetc/enetc_hw.h index 55ba949230ff..0e259baf36ee 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc_hw.h +++ b/drivers/net/ethernet/freescale/enetc/enetc_hw.h @@ -558,7 +558,16 @@ union enetc_tx_bd { __le16 frm_len; union { struct { - u8 reserved[3]; + u8 l3_aux0; +#define ENETC_TX_BD_L3_START GENMASK(6, 0) +#define ENETC_TX_BD_IPCS BIT(7) + u8 l3_aux1; +#define ENETC_TX_BD_L3_HDR_LEN GENMASK(6, 0) +#define ENETC_TX_BD_L3T BIT(7) + u8 l4_aux; +#define ENETC_TX_BD_L4T GENMASK(7, 5) +#define ENETC_TXBD_L4T_UDP 1 +#define ENETC_TXBD_L4T_TCP 2 u8 flags; }; /* default layout */ __le32 txstart; @@ -582,10 +591,10 @@ union enetc_tx_bd { }; enum enetc_txbd_flags { - ENETC_TXBD_FLAGS_RES0 = BIT(0), /* reserved */ + ENETC_TXBD_FLAGS_L4CS = BIT(0), /* For ENETC 4.1 and later */ ENETC_TXBD_FLAGS_TSE = BIT(1), ENETC_TXBD_FLAGS_W = BIT(2), - ENETC_TXBD_FLAGS_RES3 = BIT(3), /* reserved */ + ENETC_TXBD_FLAGS_CSUM_LSO = BIT(3), /* For ENETC 4.1 and later */ ENETC_TXBD_FLAGS_TXSTART = BIT(4), ENETC_TXBD_FLAGS_EX = BIT(6), ENETC_TXBD_FLAGS_F = BIT(7) diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c index 0eecfc833164..09f2d7ec44eb 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c +++ b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c @@ -119,6 +119,9 @@ void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev, ndev->priv_flags |= IFF_UNICAST_FLT; + if (si->drvdata->tx_csum) + priv->active_offloads |= ENETC_F_TXCSUM; + /* TODO: currently, i.MX95 ENETC driver does not support advanced features */ if (!is_enetc_rev1(si)) { ndev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK);