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Mon, 30 Dec 2024 15:45:16 -0600 Received: from xcbalucerop41x.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39 via Frontend Transport; Mon, 30 Dec 2024 15:45:15 -0600 From: To: , , , , , , , , CC: Alejandro Lucero Subject: [PATCH v9 16/27] sfc: obtain root decoder with enough HPA free space Date: Mon, 30 Dec 2024 21:44:34 +0000 Message-ID: <20241230214445.27602-17-alejandro.lucero-palau@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241230214445.27602-1-alejandro.lucero-palau@amd.com> References: <20241230214445.27602-1-alejandro.lucero-palau@amd.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001EF:EE_|DM4PR12MB7622:EE_ X-MS-Office365-Filtering-Correlation-Id: 5834ee6f-3093-4c9d-5448-08dd291b4067 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Dec 2024 21:45:17.6441 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5834ee6f-3093-4c9d-5448-08dd291b4067 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001EF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7622 X-Patchwork-Delegate: kuba@kernel.org From: Alejandro Lucero Asking for available HPA space is the previous step to try to obtain an HPA range suitable to accel driver purposes. Add this call to efx cxl initialization. Make sfc cxl build dependent on CXL region. Signed-off-by: Alejandro Lucero Reviewed-by: Martin Habets Acked-by: Edward Cree Reviewed-by: Jonathan Cameron --- drivers/net/ethernet/sfc/Kconfig | 2 +- drivers/net/ethernet/sfc/efx_cxl.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/sfc/Kconfig b/drivers/net/ethernet/sfc/Kconfig index a8bc777baa95..36a7c4bec5a7 100644 --- a/drivers/net/ethernet/sfc/Kconfig +++ b/drivers/net/ethernet/sfc/Kconfig @@ -67,7 +67,7 @@ config SFC_MCDI_LOGGING a sysfs file 'mcdi_logging' under the PCI device. config SFC_CXL bool "Solarflare SFC9100-family CXL support" - depends on SFC && CXL_BUS && !(SFC=y && CXL_BUS=m) + depends on SFC && CXL_BUS && !(SFC=y && CXL_BUS=m) && CXL_REGION default y help This enables CXL support by the driver relying on kernel support diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c index f4bf137fd878..9413552d559d 100644 --- a/drivers/net/ethernet/sfc/efx_cxl.c +++ b/drivers/net/ethernet/sfc/efx_cxl.c @@ -24,6 +24,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data) struct pci_dev *pci_dev = efx->pci_dev; DECLARE_BITMAP(expected, CXL_MAX_CAPS); DECLARE_BITMAP(found, CXL_MAX_CAPS); + resource_size_t max_size; struct efx_cxl *cxl; struct resource res; u16 dvsec; @@ -103,6 +104,23 @@ int efx_cxl_init(struct efx_probe_data *probe_data) goto err_memdev; } + cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd, + CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2, + &max_size); + + if (IS_ERR(cxl->cxlrd)) { + pci_err(pci_dev, "cxl_get_hpa_freespace failed\n"); + rc = PTR_ERR(cxl->cxlrd); + goto err_memdev; + } + + if (max_size < EFX_CTPIO_BUFFER_SIZE) { + pci_err(pci_dev, "%s: not enough free HPA space %pap < %u\n", + __func__, &max_size, EFX_CTPIO_BUFFER_SIZE); + rc = -ENOSPC; + goto err_memdev; + } + probe_data->cxl = cxl; return 0;