From patchwork Fri Jan 10 09:38:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Ghosh X-Patchwork-Id: 13934101 X-Patchwork-Delegate: kuba@kernel.org Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68D3420967C; Fri, 10 Jan 2025 09:38:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.156.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736501931; cv=none; b=otOKWixNhu0JPLE9femmFc8vCls+16rMewPcAMLlNUO5FqXCFC4gw9Y4wmz4UeYESO3vvI2EVIhfnV+4DAZj4o9Im8TCIIzu/yzH8oEqGqop+6itmcBFHJdyADObA/hOUDDD+dLIg7Yn9Ydm9xW/OoisCW2l6FDq2C6wiRtz9+0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736501931; c=relaxed/simple; bh=GbBMBBGL28l0XUyDoJ6JE6ZMaor4YrSFO7p0VOLkIeM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=EcXQvMDEdECu1PX80eFHvlxFR30uleDt5XC2MJiLT0MVi8l1Y84IS2+Nerag3Q/OlOWq/v47xNNLCcOpRZQnn3f1HhCooTClWVS5t5W1ceruh/gpHJSp2Zm3ZSpaCVTHaL07m2P8JRfUz7dzYXL+TEjW6Yv5NAoOhWJE9dZs0aQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com; spf=pass smtp.mailfrom=marvell.com; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b=bC4QzmIC; arc=none smtp.client-ip=67.231.156.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=marvell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="bC4QzmIC" Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 50A8wbj4028303; Fri, 10 Jan 2025 01:38:24 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=G jF2Vau3Zojbciw43jB3kt9weEY4NNy5ohZ4IwzKiOo=; b=bC4QzmICCefWNCsrJ 9HgTYDHh76+zORcQ+wTsD72HgPTd8JYZsogqGw3BT8VgYzqir4+CvhDAQ5rkZXYW 6ekX1VrOHfQ1uowfzW0BCQH5dRrsBKSItc/XR/pjMm2lJiojG5V2Dc7Idc+pYITF 2dTSCHZfx3qojyAqNDKtJGq8F/h2jefsSm7wNtAWvubesQvXgosCDdFV1pvoznqY kzpEJmYLeymd2EZXwd8cfiU/EJgG773ZwtknSwjjyhbHLVGWvwSLoZph2oa2Y/v8 FgEVd5Z7l3joNP+ggWJZguX5Ds1cKN8oZqK8lmxdNj/wYPwYbjkF2eHTWmJcrX94 8EwqA== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 4430gw035g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Jan 2025 01:38:24 -0800 (PST) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Fri, 10 Jan 2025 01:38:23 -0800 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Fri, 10 Jan 2025 01:38:23 -0800 Received: from localhost.localdomain (unknown [10.28.36.166]) by maili.marvell.com (Postfix) with ESMTP id 9475C3F7084; Fri, 10 Jan 2025 01:38:17 -0800 (PST) From: Suman Ghosh To: , , , , , , , , , , , , , , , , , , , CC: Suman Ghosh Subject: [net-next PATCH v3 1/6] octeontx2-pf: Don't unmap page pool buffer used by XDP Date: Fri, 10 Jan 2025 15:08:02 +0530 Message-ID: <20250110093807.2451954-2-sumang@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250110093807.2451954-1-sumang@marvell.com> References: <20250110093807.2451954-1-sumang@marvell.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-GUID: -q7he8GPaXtE-3VP_9l3n_pSonIqZ5Go X-Proofpoint-ORIG-GUID: -q7he8GPaXtE-3VP_9l3n_pSonIqZ5Go X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Patchwork-Delegate: kuba@kernel.org From: Geetha sowjanya When xdp buffers are from page pool do not dma unmap the buffers. DMA map/unmap are handled by the page_pool APIs. Signed-off-by: Geetha sowjanya Signed-off-by: Suman Ghosh --- .../marvell/octeontx2/nic/otx2_common.h | 4 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 8 +++- .../marvell/octeontx2/nic/otx2_txrx.c | 43 +++++++++++++------ .../marvell/octeontx2/nic/otx2_txrx.h | 1 + 4 files changed, 41 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index 65814e3dc93f..951fdf6bc2c4 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -1094,7 +1095,8 @@ int otx2_del_macfilter(struct net_device *netdev, const u8 *mac); int otx2_add_macfilter(struct net_device *netdev, const u8 *mac); int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable); int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf); -bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 qidx); +bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, + u16 qidx, u16 flags); u16 otx2_get_max_mtu(struct otx2_nic *pfvf); int otx2_handle_ntuple_tc_features(struct net_device *netdev, netdev_features_t features); diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c index e1dde93e8af8..8ba44164736a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c @@ -2701,11 +2701,15 @@ static int otx2_xdp_xmit_tx(struct otx2_nic *pf, struct xdp_frame *xdpf, if (dma_mapping_error(pf->dev, dma_addr)) return -ENOMEM; - err = otx2_xdp_sq_append_pkt(pf, dma_addr, xdpf->len, qidx); + err = otx2_xdp_sq_append_pkt(pf, dma_addr, xdpf->len, + qidx, XDP_REDIRECT); if (!err) { otx2_dma_unmap_page(pf, dma_addr, xdpf->len, DMA_TO_DEVICE); page = virt_to_page(xdpf->data); - put_page(page); + if (page->pp) + page_pool_recycle_direct(page->pp, page); + else + put_page(page); return -ENOMEM; } return 0; diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c index 224cef938927..2859f397f99e 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c @@ -101,14 +101,20 @@ static void otx2_xdp_snd_pkt_handler(struct otx2_nic *pfvf, struct nix_send_comp_s *snd_comp = &cqe->comp; struct sg_list *sg; struct page *page; - u64 pa; + u64 pa, iova; sg = &sq->sg[snd_comp->sqe_id]; - pa = otx2_iova_to_phys(pfvf->iommu_domain, sg->dma_addr[0]); - otx2_dma_unmap_page(pfvf, sg->dma_addr[0], - sg->size[0], DMA_TO_DEVICE); + iova = sg->dma_addr[0] - OTX2_HEAD_ROOM; + pa = otx2_iova_to_phys(pfvf->iommu_domain, iova); page = virt_to_page(phys_to_virt(pa)); + if (sg->flags & XDP_REDIRECT) + otx2_dma_unmap_page(pfvf, sg->dma_addr[0], sg->size[0], DMA_TO_DEVICE); + + if (page->pp) { + page_pool_recycle_direct(page->pp, page); + return; + } put_page(page); } @@ -1360,7 +1366,7 @@ void otx2_free_pending_sqe(struct otx2_nic *pfvf) } static void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, u64 dma_addr, - int len, int *offset) + int len, int *offset, u16 flags) { struct nix_sqe_sg_s *sg = NULL; u64 *iova = NULL; @@ -1377,9 +1383,11 @@ static void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, u64 dma_addr, sq->sg[sq->head].dma_addr[0] = dma_addr; sq->sg[sq->head].size[0] = len; sq->sg[sq->head].num_segs = 1; + sq->sg[sq->head].flags = flags; } -bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 qidx) +bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, + u16 qidx, u16 flags) { struct nix_sqe_hdr_s *sqe_hdr; struct otx2_snd_queue *sq; @@ -1405,7 +1413,7 @@ bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 qidx) offset = sizeof(*sqe_hdr); - otx2_xdp_sqe_add_sg(sq, iova, len, &offset); + otx2_xdp_sqe_add_sg(sq, iova, len, &offset, flags); sqe_hdr->sizem1 = (offset / 16) - 1; pfvf->hw_ops->sqe_flush(pfvf, sq, offset, qidx); @@ -1419,6 +1427,7 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf, bool *need_xdp_flush) { unsigned char *hard_start; + struct otx2_pool *pool; int qidx = cq->cq_idx; struct xdp_buff xdp; struct page *page; @@ -1426,6 +1435,7 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf, u32 act; int err; + pool = &pfvf->qset.pool[qidx]; iova = cqe->sg.seg_addr - OTX2_HEAD_ROOM; pa = otx2_iova_to_phys(pfvf->iommu_domain, iova); page = virt_to_page(phys_to_virt(pa)); @@ -1444,18 +1454,23 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf, case XDP_TX: qidx += pfvf->hw.tx_queues; cq->pool_ptrs++; - return otx2_xdp_sq_append_pkt(pfvf, iova, - cqe->sg.seg_size, qidx); + return otx2_xdp_sq_append_pkt(pfvf, cqe->sg.seg_addr, + cqe->sg.seg_size, qidx, XDP_TX); case XDP_REDIRECT: cq->pool_ptrs++; err = xdp_do_redirect(pfvf->netdev, &xdp, prog); - otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize, - DMA_FROM_DEVICE); if (!err) { *need_xdp_flush = true; return true; } + if (page->pp) { + page_pool_recycle_direct(pool->page_pool, page); + return false; + } + + otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize, + DMA_FROM_DEVICE); put_page(page); break; default: @@ -1465,10 +1480,14 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf, trace_xdp_exception(pfvf->netdev, prog, act); break; case XDP_DROP: + cq->pool_ptrs++; + if (page->pp) { + page_pool_recycle_direct(pool->page_pool, page); + return true; + } otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize, DMA_FROM_DEVICE); put_page(page); - cq->pool_ptrs++; return true; } return false; diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h index d23810963fdb..92e1e84cad75 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h @@ -76,6 +76,7 @@ struct otx2_rcv_queue { struct sg_list { u16 num_segs; + u16 flags; u64 skb; u64 size[OTX2_MAX_FRAGS_IN_SQE]; u64 dma_addr[OTX2_MAX_FRAGS_IN_SQE];