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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Jianbo Liu , Moshe Shemesh , Leon Romanovsky , Mark Bloch , Carolina Jubran , Dragos Tatulea , Tariq Toukan Subject: [PATCH net-next 01/15] net/mlx5: Add helper functions for PTP callbacks Date: Mon, 3 Feb 2025 23:35:02 +0200 Message-ID: <20250203213516.227902-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250203213516.227902-1-tariqt@nvidia.com> References: <20250203213516.227902-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002321:EE_|PH7PR12MB7987:EE_ X-MS-Office365-Filtering-Correlation-Id: 3b490361-5a5d-4976-b69e-08dd449ad35b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: /H/n99tBjOMebn0yJRw/iIghbE97Y4MXMiQ3O1JkDRTBEj9dEGGivtrG7eu4aqoprLqVDIqHLLixA+tjTV1nXWame2qWWyfvGdgHzb7XiThGkNeASsudAGyfkS3OgOJYUfPTic+0PVuGpifgOwDPv8NUdRlRF4ZJ/go15T4Z5l8fkrYVWP1OyBwgldqzO7q1ZCp4BCOHw2k2RH2NJKcuaJOuugbP/eVjbwNqHCPI1UKlCbWIbpFFZgmvbPgoREZ8/mmsUrHDsf3/sJg6yaWKGafRhPPWq/CMC0oNux0mQ49P4giTyvB2aAGq1OxvYRm60IGYhDi4h+RECSw5rEoCdftJ/jrtUwLPoDRzvMFzFdiVVD5IJUWQ2GKoaRIkbfcYG+3pgL5SD6BwLgZmyeBnTC8do01c57hchJHtvRXYmLU86DFY4ZxNNmrBZpQ6pXSqzj9cXafIQ4dZHrZvFvH4TkoryHbsX9CjNhM8MGR3cl5Fb5vH81ej5Fsa3AMk1OjbIFtG0WAseF38/S+W8cfXKfJjxtzuw4kKlyH97pYz8K8Z6e2C4fM3XGv8pRHZY7/5ehTFpjFSYZ6+MmBY+geyCBJsmNwPWKtZuJa1dfNPQxIOWii9vCIBzD43wEdW8qt7HFfVQAkOvAQBqvfyZoQREHMeTes/XpBLDhTsBTCyB7wqDsRx9wRPQss30cccIQTbIIgCjkICD/oaDXi6Gt7yRcXT6wi/uSzh+GlDahiZdzvhXa3AiWCyn1y1THp9eE5Ywpql/N0JrM/UrFfn6pU2Qt6BROGqk/fdeLjEmzwQBs60QuKVVk5Ly0Z6xsspVQ2Lmp0ctpKExuytTflISnBSrgLESpK7oIK85FiquttaAdmABUDdELFdY50aOgnulIxyayDpMnK+WUNCKkn8H+YQPA9KqLubwkvUTIm1ATJ0l+tjTAHrCJF0kFSS1W0jql6NkC5bloxVPvwSkkXxmyh1o/E82GtiojY2xfRQQlSP0Pu5hDmTXin7Z6O9qAJnkovl3eGB5OON2j3Nc6T+BBLkTYmb5JPnOgBdL4MmodLGLWKtAQnCBxI9aGPaxJu3RobX22YcFNoMUSGuRGdYV+vGZx5uw0kCDbh4coTOT6kLAcNgQqdvdXKxzxPemlNCY6T0J/r5FKLh3Eupz0hWNbxvkIu6sic8XcD/WvBrRzskTcVQLk599sFU+S61fvupng29Q5af4/CfYcrkbUG25Ve7C2dKmfuPvr9nGqPHLsfkGvL1SUjaF86Pto/v1qbD0ccVnsnzLNvzyIMJmWOtWzAEpRkczcsckEOJGuM6PFjWj02TjIeVuQdVPsLvyNm7M76jxc3mU7CgN6rfbkBjdllTWysxys+pLI4VQi/TIf0eVSiW67q7NZ5OkTtcuu5zZVoMn7Hk/jj27fKY3miTUQ1dhCoaKU18Brk6H06CMdTL+Uo448gfu12yamhKhtr+0F/NOFql4IJYVpfLnhADMeoX/2Fk3crLzV9KzAmUEaujmBc= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2025 21:36:31.7665 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3b490361-5a5d-4976-b69e-08dd449ad35b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002321.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7987 X-Patchwork-Delegate: kuba@kernel.org From: Jianbo Liu The PTP callback functions should not be used directly by internal callers. Add helpers that can be used internally and externally. Signed-off-by: Jianbo Liu Reviewed-by: Carolina Jubran Reviewed-by: Dragos Tatulea Signed-off-by: Tariq Toukan Reviewed-by: Mateusz Polchlopek --- .../ethernet/mellanox/mlx5/core/lib/clock.c | 32 +++++++++++++------ 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c index d61a1a9297c9..eaf343756026 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c @@ -119,6 +119,13 @@ static u32 mlx5_ptp_shift_constant(u32 dev_freq_khz) ilog2((U32_MAX / NSEC_PER_MSEC) * dev_freq_khz)); } +static s32 mlx5_clock_getmaxphase(struct mlx5_core_dev *mdev) +{ + return MLX5_CAP_MCAM_FEATURE(mdev, mtutc_time_adjustment_extended_range) ? + MLX5_MTUTC_OPERATION_ADJUST_TIME_EXTENDED_MAX : + MLX5_MTUTC_OPERATION_ADJUST_TIME_MAX; +} + static s32 mlx5_ptp_getmaxphase(struct ptp_clock_info *ptp) { struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); @@ -126,14 +133,12 @@ static s32 mlx5_ptp_getmaxphase(struct ptp_clock_info *ptp) mdev = container_of(clock, struct mlx5_core_dev, clock); - return MLX5_CAP_MCAM_FEATURE(mdev, mtutc_time_adjustment_extended_range) ? - MLX5_MTUTC_OPERATION_ADJUST_TIME_EXTENDED_MAX : - MLX5_MTUTC_OPERATION_ADJUST_TIME_MAX; + return mlx5_clock_getmaxphase(mdev); } static bool mlx5_is_mtutc_time_adj_cap(struct mlx5_core_dev *mdev, s64 delta) { - s64 max = mlx5_ptp_getmaxphase(&mdev->clock.ptp_info); + s64 max = mlx5_clock_getmaxphase(mdev); if (delta < -max || delta > max) return false; @@ -361,15 +366,12 @@ static int mlx5_ptp_settime_real_time(struct mlx5_core_dev *mdev, return mlx5_set_mtutc(mdev, in, sizeof(in)); } -static int mlx5_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) +static int mlx5_clock_settime(struct mlx5_core_dev *mdev, struct mlx5_clock *clock, + const struct timespec64 *ts) { - struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); struct mlx5_timer *timer = &clock->timer; - struct mlx5_core_dev *mdev; unsigned long flags; - mdev = container_of(clock, struct mlx5_core_dev, clock); - if (mlx5_modify_mtutc_allowed(mdev)) { int err = mlx5_ptp_settime_real_time(mdev, ts); @@ -385,6 +387,16 @@ static int mlx5_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 return 0; } +static int mlx5_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) +{ + struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); + struct mlx5_core_dev *mdev; + + mdev = container_of(clock, struct mlx5_core_dev, clock); + + return mlx5_clock_settime(mdev, clock, ts); +} + static struct timespec64 mlx5_ptp_gettimex_real_time(struct mlx5_core_dev *mdev, struct ptp_system_timestamp *sts) @@ -1129,7 +1141,7 @@ static void mlx5_init_timer_clock(struct mlx5_core_dev *mdev) struct timespec64 ts; ktime_get_real_ts64(&ts); - mlx5_ptp_settime(&clock->ptp_info, &ts); + mlx5_clock_settime(mdev, clock, &ts); } }