From patchwork Tue Feb 4 13:09:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau via B4 Relay X-Patchwork-Id: 13959162 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D194C2163A9; Tue, 4 Feb 2025 13:09:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738674569; cv=none; b=RFGriKrj0lpACeEXuL+A7691o2UnyXSr+DLLfHl9bnfn2DfqkYZSW7wrbG4AzTrOmfqmFkSYkZwGB2NysCegB95jc5HRgfoITNmz+VujOH7wY8PeoHQDoIZFXOPFeO3sw9H2hmxjodL08H+874SYcSXHQzgo97/mQgqOth88PBY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738674569; c=relaxed/simple; bh=2X+zPAy5MdMpsTVgnQqcmPcBFIo9/Q2WHcdX8eB85ps=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FIEKfhwYWyMQXQD7lxjj2+DnOo/cKzWuv7QW0PmaT1yzk6wXdmGCJiG95zhy3zA6Z8PJbiSsPWYW+qpTRxOknxQ8eMpQi0bSVQ0uOt8gdstZ/kZPIVTQ2iAm/3EV0mmn3Mum+jRcYTj4MzOzrr7pPn0aZC0NaeS/CJVqRCPuWSQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=G5igzfAg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G5igzfAg" Received: by smtp.kernel.org (Postfix) with ESMTPS id 67DEDC4CEE7; Tue, 4 Feb 2025 13:09:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1738674569; bh=2X+zPAy5MdMpsTVgnQqcmPcBFIo9/Q2WHcdX8eB85ps=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=G5igzfAgTVt8xPJyAwRz2o3FJUTl6R+gZdaRu1YZMOSQanaP12PTzl0YslU5fM8QN G55riksZv1CYhuWRfRYgm5r/JdGSK/R/7kXWePai7C57Yj6kaKespZpd/u+aAGQP6f e5q84/6cDGGOQQT/K+baNeXshpyzvIwll4GSm5nFP9BfCd5FTAhOyU3iqonH09X4br 4n2LLv7oS9ajIGFT5wsZpR139x68w9zDsiZG3zJdXwWDQ3XyBUwa6Qir0bYq5QwE74 2FHxCoskQlZKhPw721OCr5+uj7hG8t/1bBsVKiEPqtjAnrAirsyCp0DByXYugNPExk Sp97f8rUwQlHQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B587C0219A; Tue, 4 Feb 2025 13:09:29 +0000 (UTC) From: Dimitri Fedrau via B4 Relay Date: Tue, 04 Feb 2025 14:09:17 +0100 Subject: [PATCH net-next v3 3/3] net: phy: dp83822: Add support for changing the transmit amplitude voltage Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250204-dp83822-tx-swing-v3-3-9798e96500d9@liebherr.com> References: <20250204-dp83822-tx-swing-v3-0-9798e96500d9@liebherr.com> In-Reply-To: <20250204-dp83822-tx-swing-v3-0-9798e96500d9@liebherr.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Davis , Andrew Lunn , Heiner Kallweit , Russell King , Florian Fainelli Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dimitri Fedrau , Dimitri Fedrau X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1738674559; l=3472; i=dimitri.fedrau@liebherr.com; s=20241202; h=from:subject:message-id; bh=ztpkGISeXg8t3r7zAhGd49uq4pvJ3laG+9qmmnQTdzo=; b=BsZ41GbYpZax+5vDhxewWKmmaKHE/FKYBeHN622wgJq6X0oRp3PKAC3X3J+ciPvUson3D4i00 JWq4JQ6U987ATfbvwMZ1XaBCQ+5FFR5qb2Pj5Z5B+M1n7oj3goYx0mm X-Developer-Key: i=dimitri.fedrau@liebherr.com; a=ed25519; pk=rT653x09JSQvotxIqQl4/XiI4AOiBZrdOGvxDUbb5m8= X-Endpoint-Received: by B4 Relay for dimitri.fedrau@liebherr.com/20241202 with auth_id=290 X-Original-From: Dimitri Fedrau Reply-To: dimitri.fedrau@liebherr.com X-Patchwork-Delegate: kuba@kernel.org From: Dimitri Fedrau Add support for changing the transmit amplitude voltage in 100BASE-TX mode. Modifying it can be necessary to compensate losses on the PCB and connector, so the voltages measured on the RJ45 pins are conforming. Signed-off-by: Dimitri Fedrau --- drivers/net/phy/dp83822.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c index 6599feca1967d705331d6e354205a2485ea962f2..80b49e7744d6d4c9571606455fe50534d2dee977 100644 --- a/drivers/net/phy/dp83822.c +++ b/drivers/net/phy/dp83822.c @@ -31,6 +31,7 @@ #define MII_DP83822_RCSR 0x17 #define MII_DP83822_RESET_CTRL 0x1f #define MII_DP83822_MLEDCR 0x25 +#define MII_DP83822_LDCTRL 0x403 #define MII_DP83822_LEDCFG1 0x460 #define MII_DP83822_IOCTRL1 0x462 #define MII_DP83822_IOCTRL2 0x463 @@ -123,6 +124,9 @@ #define DP83822_IOCTRL1_GPIO1_CTRL GENMASK(2, 0) #define DP83822_IOCTRL1_GPIO1_CTRL_LED_1 BIT(0) +/* LDCTRL bits */ +#define DP83822_100BASE_TX_LINE_DRIVER_SWING GENMASK(7, 4) + /* IOCTRL2 bits */ #define DP83822_IOCTRL2_GPIO2_CLK_SRC GENMASK(6, 4) #define DP83822_IOCTRL2_GPIO2_CTRL GENMASK(2, 0) @@ -197,6 +201,7 @@ struct dp83822_private { bool set_gpio2_clk_out; u32 gpio2_clk_out; bool led_pin_enable[DP83822_MAX_LED_PINS]; + int tx_amplitude_100base_tx_index; }; static int dp83822_config_wol(struct phy_device *phydev, @@ -522,6 +527,12 @@ static int dp83822_config_init(struct phy_device *phydev) FIELD_PREP(DP83822_IOCTRL2_GPIO2_CLK_SRC, dp83822->gpio2_clk_out)); + if (dp83822->tx_amplitude_100base_tx_index >= 0) + phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_LDCTRL, + DP83822_100BASE_TX_LINE_DRIVER_SWING, + FIELD_PREP(DP83822_100BASE_TX_LINE_DRIVER_SWING, + dp83822->tx_amplitude_100base_tx_index)); + err = dp83822_config_init_leds(phydev); if (err) return err; @@ -720,6 +731,11 @@ static int dp83822_phy_reset(struct phy_device *phydev) } #ifdef CONFIG_OF_MDIO +static const u32 tx_amplitude_100base_tx_gain[] = { + 80, 82, 83, 85, 87, 88, 90, 92, + 93, 95, 97, 98, 100, 102, 103, 105, +}; + static int dp83822_of_init_leds(struct phy_device *phydev) { struct device_node *node = phydev->mdio.dev.of_node; @@ -780,6 +796,8 @@ static int dp83822_of_init(struct phy_device *phydev) struct dp83822_private *dp83822 = phydev->priv; struct device *dev = &phydev->mdio.dev; const char *of_val; + s32 val; + int i; /* Signal detection for the PHY is only enabled if the FX_EN and the * SD_EN pins are strapped. Signal detection can only enabled if FX_EN @@ -815,6 +833,25 @@ static int dp83822_of_init(struct phy_device *phydev) dp83822->set_gpio2_clk_out = true; } + dp83822->tx_amplitude_100base_tx_index = -1; + val = phy_get_tx_amplitude_gain(phydev, dev, + ETHTOOL_LINK_MODE_100baseT_Full_BIT); + if (val > 0) { + for (i = 0; i < ARRAY_SIZE(tx_amplitude_100base_tx_gain); i++) { + if (tx_amplitude_100base_tx_gain[i] == val) { + dp83822->tx_amplitude_100base_tx_index = i; + break; + } + } + + if (dp83822->tx_amplitude_100base_tx_index < 0) { + phydev_err(phydev, + "Invalid value for tx-amplitude-100base-tx-percent property (%u)\n", + val); + return -EINVAL; + } + } + return dp83822_of_init_leds(phydev); }