| Message ID | 20250204030249.1965444-3-chris.packham@alliedtelesis.co.nz (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | RTL9300 MDIO driver | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Clearly marked for net-next |
| netdev/apply | fail | Patch does not apply to net-next-0 |
On Tue, 04 Feb 2025 16:02:45 +1300, Chris Packham wrote: > Add dtschema for the MDIO controller found in the RTL9300 SoCs. The > controller is slightly unusual in that direct MDIO communication is not > possible. We model the MDIO controller with the MDIO buses as child > nodes and the PHYs as children of the buses. The mapping of switch port > number to MDIO bus/addr requires the ethernet-ports sibling to provide > the mapping via the phy-handle property. > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> > --- > > Notes: > Changes in v6: > - Remove realtek,port property. The driver will parse the ethernet-ports > sibling node to figure out the mapping (do I need to mention that > somewhere in this binding?). > - Correct number of mdio buses. 4 possible buses numbered 0-3. > Changes in v5: > - Add back reg property to mdio-controller node > - Make unit address in the node name required > - Andrew suggested perhaps doing away with the realtek,port property and > providing the overall mapping via an array of phandles. I've explored > this a little, it is doable but I'm not sure it actually makes things > any clearer when the portmap has gaps so I haven't made this change. > Changes in v4: > - Model the MDIO controller with the buses as child nodes. We still need > to deal with the switch port number so this is represented with the > "realtek,port" property which needs to be added to the MDIO bus > children (i.e. the PHYs) > - Because the above is quite a departure from earlier I've dropped the > r-by > Changes in v3: > - Add r-by from Connor > Changes in v2: > - None > > .../bindings/net/realtek,rtl9301-mdio.yaml | 86 +++++++++++++++++++ > 1 file changed, 86 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml > Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml new file mode 100644 index 000000000000..02e4e33e9969 --- /dev/null +++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL9300 MDIO Controller + +maintainers: + - Chris Packham <chris.packham@alliedtelesis.co.nz> + +properties: + compatible: + oneOf: + - items: + - enum: + - realtek,rtl9302b-mdio + - realtek,rtl9302c-mdio + - realtek,rtl9303-mdio + - const: realtek,rtl9301-mdio + - const: realtek,rtl9301-mdio + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + reg: + maxItems: 1 + +patternProperties: + '^mdio-bus@[0-3]$': + $ref: mdio.yaml# + + properties: + reg: + maxItems: 1 + + required: + - reg + + patternProperties: + '^ethernet-phy@[a-f0-9]+$': + type: object + $ref: ethernet-phy.yaml# + unevaluatedProperties: false + + unevaluatedProperties: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + mdio-controller@ca00 { + compatible = "realtek,rtl9301-mdio"; + reg = <0xca00 0x200>; + #address-cells = <1>; + #size-cells = <0>; + + mdio-bus@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + }; + + mdio-bus@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + }; + };
Add dtschema for the MDIO controller found in the RTL9300 SoCs. The controller is slightly unusual in that direct MDIO communication is not possible. We model the MDIO controller with the MDIO buses as child nodes and the PHYs as children of the buses. The mapping of switch port number to MDIO bus/addr requires the ethernet-ports sibling to provide the mapping via the phy-handle property. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> --- Notes: Changes in v6: - Remove realtek,port property. The driver will parse the ethernet-ports sibling node to figure out the mapping (do I need to mention that somewhere in this binding?). - Correct number of mdio buses. 4 possible buses numbered 0-3. Changes in v5: - Add back reg property to mdio-controller node - Make unit address in the node name required - Andrew suggested perhaps doing away with the realtek,port property and providing the overall mapping via an array of phandles. I've explored this a little, it is doable but I'm not sure it actually makes things any clearer when the portmap has gaps so I haven't made this change. Changes in v4: - Model the MDIO controller with the buses as child nodes. We still need to deal with the switch port number so this is represented with the "realtek,port" property which needs to be added to the MDIO bus children (i.e. the PHYs) - Because the above is quite a departure from earlier I've dropped the r-by Changes in v3: - Add r-by from Connor Changes in v2: - None .../bindings/net/realtek,rtl9301-mdio.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml