| Message ID | 20250205-v6-12-topic-socfpga-agilex5-v4-3-ebf070e2075f@pengutronix.de (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | ARM64: dts: intel: agilex5: add nodes and new board | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Not a local patch |
diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.yaml b/Documentation/devicetree/bindings/net/socfpga-dwmac.yaml index 2568dd90f4555485f18912b5352f191824bb918c..31c163bf1b59e14216d1fb4b4b9aaa747e1b19e2 100644 --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.yaml @@ -21,6 +21,7 @@ select: enum: - altr,socfpga-stmmac # For Cyclone5/Arria5 SoCs - altr,socfpga-stmmac-a10-s10 # For Arria10/Agilex/Stratix10 SoCs + - altr,socfpga-stmmac-agilex5 # For Agilex5 SoCs required: - compatible @@ -45,6 +46,12 @@ properties: - altr,socfpga-stmmac-a10-s10 - const: snps,dwmac-3.74a - const: snps,dwmac + - items: + - enum: + - altr,socfpga-stmmac-agilex5 + - const: altr,socfpga-stmmac-a10-s10 + - const: snps,dwxgmac-2.10 + - const: snps,dwxgmac altr,sysmgr-syscon: $ref: /schemas/types.yaml#/definitions/phandle-array
The Agilex5 SoCs have three Synopsys DWXGMAC-compatible ethernet IP-cores. Add a SoC-specific front compatible to the binding. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- Documentation/devicetree/bindings/net/socfpga-dwmac.yaml | 7 +++++++ 1 file changed, 7 insertions(+)