diff mbox series

[v10,10/26] cxl: modify dpa setup process for supporting type2

Message ID 20250205151950.25268-11-alucerop@amd.com (mailing list archive)
State New
Headers show
Series cxl: add type2 device basic support | expand

Checks

Context Check Description
netdev/tree_selection success Guessing tree name failed - patch did not apply

Commit Message

Alejandro Lucero Palau Feb. 5, 2025, 3:19 p.m. UTC 
From: Alejandro Lucero <alucerop@amd.com>

Accel drivers allocate a memdev state struct but only able to use it
through the accel driver API for initialization and setup.

Modify current dpa setup by drivers for realying on memdev state instead
of dev state.

Allow accel drivers to use dpa structs and functions.

Signed-off-by: Alejandro Lucero <alucerop@amd.com>
---
 drivers/cxl/core/hdm.c |  4 +++-
 drivers/cxl/cxl.h      |  6 +-----
 drivers/cxl/cxlmem.h   | 14 --------------
 drivers/cxl/pci.c      |  2 +-
 include/cxl/cxl.h      | 19 +++++++++++++++++++
 5 files changed, 24 insertions(+), 21 deletions(-)
diff mbox series

Patch

diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index d705dec1471e..af025da81fa2 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -467,8 +467,10 @@  static const char *cxl_mode_name(enum cxl_partition_mode mode)
 }
 
 /* if this fails the caller must destroy @cxlds, there is no recovery */
-int cxl_dpa_setup(struct cxl_dev_state *cxlds, const struct cxl_dpa_info *info)
+int cxl_dpa_setup(struct cxl_memdev_state *cxlmds,
+		  const struct cxl_dpa_info *info)
 {
+	struct cxl_dev_state *cxlds = &cxlmds->cxlds;
 	struct device *dev = cxlds->dev;
 
 	guard(rwsem_write)(&cxl_dpa_rwsem);
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 27d1dc48611c..3faba6c9dbfb 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -11,6 +11,7 @@ 
 #include <linux/log2.h>
 #include <linux/node.h>
 #include <linux/io.h>
+#include <cxl/cxl.h>
 
 extern const struct nvdimm_security_ops *cxl_security_ops;
 
@@ -478,11 +479,6 @@  struct cxl_region_params {
 	int nr_targets;
 };
 
-enum cxl_partition_mode {
-	CXL_PARTMODE_RAM,
-	CXL_PARTMODE_PMEM,
-};
-
 /*
  * Indicate whether this region has been assembled by autodetection or
  * userspace assembly. Prevent endpoint decoders outside of automatic
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
index ab8c23009b9d..a5994061780c 100644
--- a/drivers/cxl/cxlmem.h
+++ b/drivers/cxl/cxlmem.h
@@ -98,19 +98,6 @@  int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
 			 resource_size_t base, resource_size_t len,
 			 resource_size_t skipped);
 
-#define CXL_NR_PARTITIONS_MAX 2
-
-struct cxl_dpa_info {
-	u64 size;
-	struct cxl_dpa_part_info {
-		struct range range;
-		enum cxl_partition_mode mode;
-	} part[CXL_NR_PARTITIONS_MAX];
-	int nr_partitions;
-};
-
-int cxl_dpa_setup(struct cxl_dev_state *cxlds, const struct cxl_dpa_info *info);
-
 static inline struct cxl_ep *cxl_ep_load(struct cxl_port *port,
 					 struct cxl_memdev *cxlmd)
 {
@@ -841,7 +828,6 @@  int cxl_internal_send_cmd(struct cxl_mailbox *cxl_mbox,
 			  struct cxl_mbox_cmd *cmd);
 int cxl_dev_state_identify(struct cxl_memdev_state *mds);
 int cxl_enumerate_cmds(struct cxl_memdev_state *mds);
-int cxl_mem_dpa_fetch(struct cxl_memdev_state *mds, struct cxl_dpa_info *info);
 struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev, u64 serial,
 						 u16 dvsec, enum cxl_devtype type);
 void set_exclusive_cxl_commands(struct cxl_memdev_state *mds,
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 5fe5f7ff4fb1..bcfa3d86c37b 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -955,7 +955,7 @@  static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	if (rc)
 		return rc;
 
-	rc = cxl_dpa_setup(cxlds, &range_info);
+	rc = cxl_dpa_setup(mds, &range_info);
 	if (rc)
 		return rc;
 
diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h
index 1b2224ee1d5b..ec56a82966c0 100644
--- a/include/cxl/cxl.h
+++ b/include/cxl/cxl.h
@@ -49,6 +49,23 @@  struct mds_info {
 	u64 persistent_only_bytes;
 };
 
+enum cxl_partition_mode {
+	CXL_PARTMODE_NONE,
+	CXL_PARTMODE_RAM,
+	CXL_PARTMODE_PMEM,
+};
+
+#define CXL_NR_PARTITIONS_MAX 2
+
+struct cxl_dpa_info {
+	u64 size;
+	struct cxl_dpa_part_info {
+		struct range range;
+		enum cxl_partition_mode mode;
+	} part[CXL_NR_PARTITIONS_MAX];
+	int nr_partitions;
+};
+
 struct device;
 struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev, u64 serial,
 					   u16 dvsec, enum cxl_devtype type);
@@ -59,4 +76,6 @@  int cxl_pci_accel_setup_regs(struct pci_dev *pdev, struct cxl_memdev_state *cxlm
 int cxl_await_media_ready(struct cxl_memdev_state *mds);
 void cxl_set_media_ready(struct cxl_memdev_state *mds);
 void cxl_dev_state_setup(struct cxl_memdev_state *mds, struct mds_info *info);
+int cxl_mem_dpa_fetch(struct cxl_memdev_state *mds, struct cxl_dpa_info *info);
+int cxl_dpa_setup(struct cxl_memdev_state *cxlmds, const struct cxl_dpa_info *info);
 #endif