| Message ID | 20250213094641.226501-4-tariqt@nvidia.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 633f16d7e07c129a36b882c05379e01ce5bdb542 |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | mlx5: Add sensor name in temperature message | expand |
On 2/13/2025 10:46 AM, Tariq Toukan wrote: > From: Shahar Shitrit <shshitrit@nvidia.com> > > In the sensor_count field of the MTEWE register, bits 1-62 are > supported only for unmanaged switches, not for NICs, and bit 63 > is reserved for internal use. > > To prevent confusing output that may include set bits that are > not relevant to NIC sensors, we update the bitmask to retain only > the first bit, which corresponds to the sensor ASIC. > > Signed-off-by: Shahar Shitrit <shshitrit@nvidia.com> > Signed-off-by: Tariq Toukan <tariqt@nvidia.com> > --- > drivers/net/ethernet/mellanox/mlx5/core/events.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/events.c b/drivers/net/ethernet/mellanox/mlx5/core/events.c > index a661aa522a9a..e85a9042e3c2 100644 > --- a/drivers/net/ethernet/mellanox/mlx5/core/events.c > +++ b/drivers/net/ethernet/mellanox/mlx5/core/events.c > @@ -163,6 +163,10 @@ static int temp_warn(struct notifier_block *nb, unsigned long type, void *data) > u64 value_msb; > > value_lsb = be64_to_cpu(eqe->data.temp_warning.sensor_warning_lsb); > + /* bit 1-63 are not supported for NICs, > + * hence read only bit 0 (asic) from lsb. > + */ > + value_lsb &= 0x1; > value_msb = be64_to_cpu(eqe->data.temp_warning.sensor_warning_msb); > > if (net_ratelimit()) Reviewed-by: Mateusz Polchlopek <mateusz.polchlopek@intel.com>
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/events.c b/drivers/net/ethernet/mellanox/mlx5/core/events.c index a661aa522a9a..e85a9042e3c2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/events.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/events.c @@ -163,6 +163,10 @@ static int temp_warn(struct notifier_block *nb, unsigned long type, void *data) u64 value_msb; value_lsb = be64_to_cpu(eqe->data.temp_warning.sensor_warning_lsb); + /* bit 1-63 are not supported for NICs, + * hence read only bit 0 (asic) from lsb. + */ + value_lsb &= 0x1; value_msb = be64_to_cpu(eqe->data.temp_warning.sensor_warning_msb); if (net_ratelimit())