From patchwork Tue Feb 25 08:54:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amelie Delaunay X-Patchwork-Id: 13989546 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B84D2641F7; Tue, 25 Feb 2025 08:57:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740473855; cv=none; b=gZp2oKuWxasSckmJ9maOWNFnA75LP5q+l9Cv5HV7bGaVN+l8zIAyjx0PGbBXl6wNdRs1YxQu/Yl/O847PrmlAYSu+FnvEAsF7Yk129RYJ8dQuqTedhX9zhv/Z57Bc/YCl/MPM1H0phlx3HxhfydBmEnaaagog2fK+gMnDeUlKWU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740473855; c=relaxed/simple; bh=umkacPyDflVbXgAITSeqvTTLqJu2drNofL2omG1v0Zk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=Z78pnGeqZw11DnZ1lUf2juUUMYDbMjB/pZwKBM1+dC7RBoabopfwb3M48G6u40ORWIa1fyHUqHj9FYrVaTx9lFsWls4aehUih9lCeI9PE/YoxiIMT4aKIdKbbsz9iT10wNlqNliO1epoSAKnF3PkXGmjW2l0Pe6kygQ/Oky/0kU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=xh2PbwJv; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="xh2PbwJv" Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51P7l6Vq017194; Tue, 25 Feb 2025 09:57:21 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= idrFBGMIPIFCPyff74L7u4581Vrt2Ghpfs2Wr1QBdUA=; b=xh2PbwJvciLrr1XS HNo3AaqyEeyvFDAMkuhRx8DWSpatbO8hZN+DTfodejRM4YcsbJjAjAKiI7R4i2Sy IkIVDQIoZ3gaWlarLzJSj+AMosIkXqIekK+BMbCs3aDCU4vpJecJORKo9IsQePbb FnnYgw5wJVoWwlJXWL/HuVJ0vg/GYB0Z8rHt385JengSQeIhNG8snBDlxN/EHGEW tzPFm1c3TkYRt+LWOnxp8QNx8/XipQ/hdQBjLCprD9vq6As9s9/tk8IVQNqvdovV UlYZK4aN/e8ey/yKOx+ORM1+8VL90L5/EQIEG2FXGWTiLRFOBrpHJMC39Ly09MkN QRAAsg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 4512sqsssm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 25 Feb 2025 09:57:21 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 2FCA14008B; Tue, 25 Feb 2025 09:56:12 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0E860426E84; Tue, 25 Feb 2025 09:54:31 +0100 (CET) Received: from localhost (10.48.87.120) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 25 Feb 2025 09:54:30 +0100 From: Amelie Delaunay Date: Tue, 25 Feb 2025 09:54:05 +0100 Subject: [PATCH v2 02/10] arm64: dts: st: add stm32mp257f-dk board support Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20250225-b4-stm32mp2_new_dts-v2-2-1a628c1580c7@foss.st.com> References: <20250225-b4-stm32mp2_new_dts-v2-0-1a628c1580c7@foss.st.com> In-Reply-To: <20250225-b4-stm32mp2_new_dts-v2-0-1a628c1580c7@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Catalin Marinas , Will Deacon , Richard Cochran , Christophe Roullier CC: , , , , , Amelie Delaunay X-Mailer: b4 0.14.2 X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-25_03,2025-02-24_02,2024-11-22_01 From: Alexandre Torgue Add STM32MP257F Discovery board support. It embeds a STM32MP257FAL SoC, with 4GB of LPDDR4, 2*USB typeA, 1*USB3 typeC, 1*ETH, wifi/BT combo, DSI HDMI, LVDS connector ... Signed-off-by: Alexandre Torgue Signed-off-by: Amelie Delaunay --- Changes in v2: - 'status' property removed from button nodes --- arch/arm64/boot/dts/st/Makefile | 4 +- arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 113 ++++++++++++++++++++++++++++++ 2 files changed, 116 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/st/Makefile b/arch/arm64/boot/dts/st/Makefile index 881fe1296c581621f1219dbfbb4b1e03179e0f6f..0cc12f2b1dfeea6510793ea26f599f767df77749 100644 --- a/arch/arm64/boot/dts/st/Makefile +++ b/arch/arm64/boot/dts/st/Makefile @@ -1,2 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_STM32) += stm32mp257f-ev1.dtb +dtb-$(CONFIG_ARCH_STM32) += \ + stm32mp257f-dk.dtb \ + stm32mp257f-ev1.dtb diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts new file mode 100644 index 0000000000000000000000000000000000000000..a278a1e3ce03aa379d40ef807d268bbf31a04546 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ + +/dts-v1/; + +#include +#include +#include +#include "stm32mp257.dtsi" +#include "stm32mp25xf.dtsi" +#include "stm32mp25-pinctrl.dtsi" +#include "stm32mp25xxak-pinctrl.dtsi" + +/ { + model = "STMicroelectronics STM32MP257F-DK Discovery Board"; + compatible = "st,stm32mp257f-dk", "st,stm32mp257"; + + aliases { + serial0 = &usart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-user-1 { + label = "User-1"; + linux,code = ; + gpios = <&gpioc 5 GPIO_ACTIVE_HIGH>; + }; + + button-user-2 { + label = "User-2"; + linux,code = ; + gpios = <&gpioc 11 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led-blue { + function = LED_FUNCTION_HEARTBEAT; + color = ; + gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x1 0x0>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + fw@80000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x80000000 0x0 0x4000000>; + no-map; + }; + }; +}; + +&arm_wdt { + timeout-sec = <32>; + status = "okay"; +}; + +&scmi_regu { + scmi_vddio1: regulator@0 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + scmi_vdd_sdcard: regulator@23 { + reg = ; + regulator-name = "vdd_sdcard"; + }; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpiod 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&scmi_vdd_sdcard>; + vqmmc-supply = <&scmi_vddio1>; + status = "okay"; +}; + +&usart2 { + pinctrl-names = "default", "idle", "sleep"; + pinctrl-0 = <&usart2_pins_a>; + pinctrl-1 = <&usart2_idle_pins_a>; + pinctrl-2 = <&usart2_sleep_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +};