From patchwork Sun Mar 9 10:46:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abdul Rahim, Faizal" X-Patchwork-Id: 14008314 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBDF31C5F0C; Sun, 9 Mar 2025 10:48:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741517295; cv=none; b=QpI+bX9CYjPmk2E1FF9HCyA9iCxwjVjL+gIrtAzDTseGcOok0Wgh/HgKj4KODu9o+Kw+pma5z2QA0etMBlbstvPFvj1E+C0MV8o6v/1dFR+q71Wc4/D4sJfYpozmEfANvJtNizfeLQfRohW7HDMrbfbzH1Ixu6N4nt/1sz0HeQg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741517295; c=relaxed/simple; bh=DBW4RiV1hA2krrTYWGgrezOQYwadpmAnsmYLouK0N2Y=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=X7SehimuE1DmhwIU919Q2GwTIVZ/0iG+j5WfHDnD1cJdViJ9rXpbefSzCmbi+NLiSdadUd0IxV8q1dQjtjuUBoww4NROqX0AZdcuvVqyq4C1QOisdDseaV31pyWoBDwKA7tJfhMICJpKOGgzsrHLgtO3LETvelrRwdEKY4kZ8b4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Q3UmEXya; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Q3UmEXya" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741517294; x=1773053294; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=DBW4RiV1hA2krrTYWGgrezOQYwadpmAnsmYLouK0N2Y=; b=Q3UmEXyabRAFIKVnYyXQY01AAurRiFnBwClcsXYLWO7/zA1oJsCyiasE KxdZkw5MOmg6vDIwG3VL6XAMNxHZhemN3V/IVulk+ctyWM6D9Q8i8Q6Zq gC1ZEHZPelsEQw6TS5/x+eDbW69fmhsYL/2qDWUayrxvcUWICQePe8LyR nYUKdUwqYXMmD5rjT11P2JGuLuUyb0CxZEz5vLnH65Xjd6bl56K2ehCw9 ZpmzHGZyBRex0BtMypgXMrjk/cIA8YWRxOxw9tPmAqT+6QhimJtRWb0mi BgcrAu5V8jis7I6jNpCFi/tAkn5vuftuRFbH5WbUDFG4VXxj9UqziTwUw g==; X-CSE-ConnectionGUID: oK3whb6kRLKmTEkGXTlWHg== X-CSE-MsgGUID: VM+i/p00TxKV6WFDHgezQQ== X-IronPort-AV: E=McAfee;i="6700,10204,11367"; a="42636088" X-IronPort-AV: E=Sophos;i="6.14,234,1736841600"; d="scan'208";a="42636088" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Mar 2025 03:48:13 -0700 X-CSE-ConnectionGUID: yJsTG5OWTBy0cmy9I6COow== X-CSE-MsgGUID: i23RBoWlS6OYZpjedHoAYQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,234,1736841600"; d="scan'208";a="124655092" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by orviesa003.jf.intel.com with ESMTP; 09 Mar 2025 03:48:05 -0700 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Choong Yong Liang , Chwee-Lin Choong , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v9 06/14] igc: use FIELD_PREP and GENMASK for existing TX packet buffer size Date: Sun, 9 Mar 2025 06:46:40 -0400 Message-Id: <20250309104648.3895551-7-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250309104648.3895551-1-faizal.abdul.rahim@linux.intel.com> References: <20250309104648.3895551-1-faizal.abdul.rahim@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org In preparation for an upcoming patch that will modify the TX buffer size in TSN mode, replace IGC_TXPBSIZE_TSN and IGC_TXPBSIZE_DEFAULT implementation with new macros that utilizes FIELD_PREP and GENMASK for clarity. The newly introduced macros follow the naming from the i226 SW User Manual for easy reference. I've tested IGC_TXPBSIZE_TSN and IGC_TXPBSIZE_DEFAULT before and after the refactoring, and their values remain unchanged. Signed-off-by: Faizal Rahim Reviewed-by: Vladimir Oltean --- drivers/net/ethernet/intel/igc/igc_defines.h | 23 ++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index b6744ece64f0..b180e1497cc5 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -398,10 +398,29 @@ /* RXPBSIZE default value for Express and BMC buffer */ #define IGC_RXPBSIZE_EXP_BMC_DEFAULT 0x000000A2 -#define IGC_TXPBSIZE_DEFAULT 0x04000014 /* TXPBSIZE default */ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ -#define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ +/* Mask for TX packet buffer size */ +#define IGC_TXPB0SIZE_MASK GENMASK(5, 0) +#define IGC_TXPB1SIZE_MASK GENMASK(11, 6) +#define IGC_TXPB2SIZE_MASK GENMASK(17, 12) +#define IGC_TXPB3SIZE_MASK GENMASK(23, 18) +/* Mask for OS to BMC packet buffer size */ +#define IGC_OS2BMCPBSIZE_MASK GENMASK(29, 24) +/* TX Packet buffer size in KB */ +#define IGC_TXPB0SIZE(x) FIELD_PREP(IGC_TXPB0SIZE_MASK, (x)) +#define IGC_TXPB1SIZE(x) FIELD_PREP(IGC_TXPB1SIZE_MASK, (x)) +#define IGC_TXPB2SIZE(x) FIELD_PREP(IGC_TXPB2SIZE_MASK, (x)) +#define IGC_TXPB3SIZE(x) FIELD_PREP(IGC_TXPB3SIZE_MASK, (x)) +/* OS to BMC packet buffer size in KB */ +#define IGC_OS2BMCPBSIZE(x) FIELD_PREP(IGC_OS2BMCPBSIZE_MASK, (x)) +/* Default value following I225/I226 SW User Manual Section 8.3.2 */ +#define IGC_TXPBSIZE_DEFAULT ( \ + IGC_TXPB0SIZE(20) | IGC_TXPB1SIZE(0) | IGC_TXPB2SIZE(0) | \ + IGC_TXPB3SIZE(0) | IGC_OS2BMCPBSIZE(4)) +#define IGC_TXPBSIZE_TSN ( \ + IGC_TXPB0SIZE(5) | IGC_TXPB1SIZE(5) | IGC_TXPB2SIZE(5) | \ + IGC_TXPB3SIZE(5) | IGC_OS2BMCPBSIZE(4)) #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */