From patchwork Mon Mar 10 11:12:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karol Kolacinski X-Patchwork-Id: 14009652 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCA9B229B02 for ; Mon, 10 Mar 2025 11:14:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605272; cv=none; b=TPr3YqojBx+58VRMKsSIx8MvBs07qu7Z/XRBDMjd3PBLVxg3xFEp6rIn/Y5h0Q+ofMFFbAIdfix+2Qd//4CGHATuFyjcmb65/CmgAsLalQrLUxAtAGlzbgVktQWh73OOFrlGV+MVEXdEWnUPgorkNcz6UtMLwUaEj6+CXxXiZ9c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605272; c=relaxed/simple; bh=ZzKHyybLRzj+cLYE+Y0p6hOfw8XOHj0aHJQ3+XfGgh0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=igXNvujibL0XxIUBr0p0TFC7HZCKy5UG7DEDHo7COxTkw+zCyShg9loAxJOdwS5YZJ+C6qYgvhR/PCrdQueMk302YGQX4mm5jsFiBVbIq43PGqu1zE+VaCI5vXZBGW8KdTKe2O1ZMRVFazY3ZTov8kdeQmCpufdMSSU2bhU30GY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=E0PvJV5c; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="E0PvJV5c" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741605271; x=1773141271; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZzKHyybLRzj+cLYE+Y0p6hOfw8XOHj0aHJQ3+XfGgh0=; b=E0PvJV5cmta7hlg/xXNL2VdUHHZCI8hoqzpe0PMtR2sENYT6TSWA1f0t eociAqrgUONJ0/PmTdd0Q0D4tXpYRnYXBCVlpNX0zvOiXG+I9cP8ltS38 S9o9iaNdcD9HMKgBVIsMTfkY+6s9aHrivsqdao6BeDQvbG59boxgSL6IG OCDgnDtHuOY/dGJoaB+tw89AqimyBl3P7K7i4Iu85roVevzDY3j3q0xlQ Pj3CFfNpO5FWUiOWan8SUmzSU5Sv23oBmyZHcL6vk/8735q+Y3Uyj1Duu 51KaRD0qAcrrakZTrp93lARqqqMwnU4M8GGFUib6PtZ3en+t8WBe3R32S g==; X-CSE-ConnectionGUID: E/Bqc7t7Rn+idfLI9jP4KA== X-CSE-MsgGUID: E1JODi1dTQKBUlSopc5u/Q== X-IronPort-AV: E=McAfee;i="6700,10204,11368"; a="65048712" X-IronPort-AV: E=Sophos;i="6.14,235,1736841600"; d="scan'208";a="65048712" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 04:14:30 -0700 X-CSE-ConnectionGUID: LZUhH7t/Q9WPOrI3G+emuw== X-CSE-MsgGUID: qdsfU8oQQceRTNOlLL8D7A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,235,1736841600"; d="scan'208";a="119968344" Received: from kkolacin-desk1.ger.corp.intel.com (HELO kkolacin-desk1.igk.intel.com) ([10.217.160.155]) by fmviesa007.fm.intel.com with ESMTP; 10 Mar 2025 04:14:28 -0700 From: Karol Kolacinski To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com, Karol Kolacinski , Michal Kubiak , Milena Olech Subject: [PATCH iwl-next 10/10] ice: move TSPLL init calls to ice_ptp.c Date: Mon, 10 Mar 2025 12:12:54 +0100 Message-ID: <20250310111357.1238454-22-karol.kolacinski@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111357.1238454-12-karol.kolacinski@intel.com> References: <20250310111357.1238454-12-karol.kolacinski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Initialize TSPLL after initializing PHC in ice_ptp.c instead of calling for each product in PHC init in ice_ptp_hw.c. Reviewed-by: Michal Kubiak Reviewed-by: Milena Olech Signed-off-by: Karol Kolacinski --- drivers/net/ethernet/intel/ice/ice_ptp.c | 11 ++++++++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 24 +-------------------- drivers/net/ethernet/intel/ice/ice_tspll.c | 5 +++++ 3 files changed, 17 insertions(+), 23 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index fdeb20ac831c..5fbd77e0cb17 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -2864,6 +2864,10 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf) if (err) return err; + err = ice_tspll_init(hw); + if (err) + return err; + /* Acquire the global hardware lock */ if (!ice_ptp_lock(hw)) { err = -EBUSY; @@ -3038,6 +3042,13 @@ static int ice_ptp_init_owner(struct ice_pf *pf) return err; } + err = ice_tspll_init(hw); + if (err) { + dev_err(ice_pf_to_dev(pf), "Failed to initialize CGU, status %d\n", + err); + return err; + } + /* Acquire the global hardware lock */ if (!ice_ptp_lock(hw)) { err = -EBUSY; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index 689feac7baf9..ba97a52917af 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -2107,22 +2107,6 @@ static void ice_sb_access_ena_eth56g(struct ice_hw *hw, bool enable) wr32(hw, PF_SB_REM_DEV_CTL, val); } -/** - * ice_ptp_init_phc_e825 - Perform E825 specific PHC initialization - * @hw: pointer to HW struct - * - * Perform E825-specific PTP hardware clock initialization steps. - * - * Return: 0 on success, negative error code otherwise. - */ -static int ice_ptp_init_phc_e825(struct ice_hw *hw) -{ - ice_sb_access_ena_eth56g(hw, true); - - /* Initialize the Clock Generation Unit */ - return ice_tspll_init(hw); -} - /** * ice_ptp_read_tx_hwtstamp_status_eth56g - Get TX timestamp status * @hw: pointer to the HW struct @@ -2784,7 +2768,6 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) */ static int ice_ptp_init_phc_e82x(struct ice_hw *hw) { - int err; u32 val; /* Enable reading switch and PHY registers over the sideband queue */ @@ -2794,11 +2777,6 @@ static int ice_ptp_init_phc_e82x(struct ice_hw *hw) val |= (PF_SB_REM_DEV_CTL_SWITCH_READ | PF_SB_REM_DEV_CTL_PHY0); wr32(hw, PF_SB_REM_DEV_CTL, val); - /* Initialize the Clock Generation Unit */ - err = ice_tspll_init(hw); - if (err) - return err; - /* Set window length for all the ports */ return ice_ptp_set_vernier_wl(hw); } @@ -5580,7 +5558,7 @@ int ice_ptp_init_phc(struct ice_hw *hw) case ICE_MAC_GENERIC: return ice_ptp_init_phc_e82x(hw); case ICE_MAC_GENERIC_3K_E825: - return ice_ptp_init_phc_e825(hw); + return 0; default: return -EOPNOTSUPP; } diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c index 37fcfdd5e032..17c23b29b53c 100644 --- a/drivers/net/ethernet/intel/ice/ice_tspll.c +++ b/drivers/net/ethernet/intel/ice/ice_tspll.c @@ -474,6 +474,11 @@ int ice_tspll_init(struct ice_hw *hw) enum ice_clk_src clk_src; int err; + /* Only E822, E823 and E825 products support TSPLL */ + if (hw->mac_type != ICE_MAC_GENERIC && + hw->mac_type != ICE_MAC_GENERIC_3K_E825) + return 0; + tspll_freq = (enum ice_tspll_freq)ts_info->time_ref; clk_src = (enum ice_clk_src)ts_info->clk_src; if (!ice_tspll_check_params(hw, tspll_freq, clk_src))