Message ID | 20250325115736.1732721-5-lukma@denx.de (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | net: mtip: Add support for MTIP imx287 L2 switch driver | expand |
On Tue, Mar 25, 2025 at 12:57:35PM +0100, Lukasz Majewski wrote: > This description is similar to one supprted with the cpsw_new.c > driver. > > It has separated ports and PHYs (connected to mdio bus). > > Signed-off-by: Lukasz Majewski <lukma@denx.de> > --- > arch/arm/boot/dts/nxp/mxs/imx28-xea.dts | 56 +++++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts > index 6c5e6856648a..e645b086574d 100644 > --- a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts > +++ b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts > @@ -5,6 +5,7 @@ > */ > > /dts-v1/; > +#include<dt-bindings/interrupt-controller/irq.h> > #include "imx28-lwe.dtsi" > > / { > @@ -18,6 +19,61 @@ &can0 { > status = "okay"; > }; > > +ð_switch { > + compatible = "fsl,imx287-mtip-switch"; The switch is part of the SoC. So i would expect the compatible to be in the .dtsi file for the SoC. > + pinctrl-names = "default"; > + pinctrl-0 = <&mac0_pins_a>, <&mac1_pins_a>; > + phy-supply = <®_fec_3v3>; > + phy-reset-duration = <25>; > + phy-reset-post-delay = <10>; > + interrupts = <100>, <101>, <102>; > + clocks = <&clks 57>, <&clks 57>, <&clks 64>, <&clks 35>; > + clock-names = "ipg", "ahb", "enet_out", "ptp"; Which of these properties are SoC properties? I _guess_ interrupts, clocks and clock-names. So they should be in the SoC .dtsi file. You should only add board properties here. Andrew
Hi Andrew, > On Tue, Mar 25, 2025 at 12:57:35PM +0100, Lukasz Majewski wrote: > > This description is similar to one supprted with the cpsw_new.c > > driver. > > > > It has separated ports and PHYs (connected to mdio bus). > > > > Signed-off-by: Lukasz Majewski <lukma@denx.de> > > --- > > arch/arm/boot/dts/nxp/mxs/imx28-xea.dts | 56 > > +++++++++++++++++++++++++ 1 file changed, 56 insertions(+) > > > > diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts > > b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts index > > 6c5e6856648a..e645b086574d 100644 --- > > a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts +++ > > b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts @@ -5,6 +5,7 @@ > > */ > > > > /dts-v1/; > > +#include<dt-bindings/interrupt-controller/irq.h> > > #include "imx28-lwe.dtsi" > > > > / { > > @@ -18,6 +19,61 @@ &can0 { > > status = "okay"; > > }; > > > > +ð_switch { > > + compatible = "fsl,imx287-mtip-switch"; > > The switch is part of the SoC. So i would expect the compatible to be > in the .dtsi file for the SoC. Ok. I'm also wondering if I shall use "fsl," or "nxp," prefix. The former one is the same as in fec_main.c, but as I do add new driver, the prefix could be updated. > > > + pinctrl-names = "default"; > > + pinctrl-0 = <&mac0_pins_a>, <&mac1_pins_a>; > > + phy-supply = <®_fec_3v3>; > > + phy-reset-duration = <25>; > > + phy-reset-post-delay = <10>; > > + interrupts = <100>, <101>, <102>; > > + clocks = <&clks 57>, <&clks 57>, <&clks 64>, <&clks 35>; > > + clock-names = "ipg", "ahb", "enet_out", "ptp"; > > Which of these properties are SoC properties? I _guess_ interrupts, > clocks and clock-names. So they should be in the SoC .dtsi file. You > should only add board properties here. Ok. I will add them. > > Andrew Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts index 6c5e6856648a..e645b086574d 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts @@ -5,6 +5,7 @@ */ /dts-v1/; +#include<dt-bindings/interrupt-controller/irq.h> #include "imx28-lwe.dtsi" / { @@ -18,6 +19,61 @@ &can0 { status = "okay"; }; +ð_switch { + compatible = "fsl,imx287-mtip-switch"; + pinctrl-names = "default"; + pinctrl-0 = <&mac0_pins_a>, <&mac1_pins_a>; + phy-supply = <®_fec_3v3>; + phy-reset-duration = <25>; + phy-reset-post-delay = <10>; + interrupts = <100>, <101>, <102>; + clocks = <&clks 57>, <&clks 57>, <&clks 64>, <&clks 35>; + clock-names = "ipg", "ahb", "enet_out", "ptp"; + status = "okay"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + mtip_port1: port@1 { + reg = <1>; + label = "lan0"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + }; + + mtip_port2: port@2 { + reg = <2>; + label = "lan1"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + reg = <0>; + smsc,disable-energy-detect; + /* Both PHYs (i.e. 0,1) have the same, single GPIO, */ + /* line to handle both, their interrupts (AND'ed) */ + interrupt-parent = <&gpio4>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + smsc,disable-energy-detect; + interrupt-parent = <&gpio4>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + }; + }; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_b>;
This description is similar to one supprted with the cpsw_new.c driver. It has separated ports and PHYs (connected to mdio bus). Signed-off-by: Lukasz Majewski <lukma@denx.de> --- arch/arm/boot/dts/nxp/mxs/imx28-xea.dts | 56 +++++++++++++++++++++++++ 1 file changed, 56 insertions(+)