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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Danielle Ratson , Petr Machata , Ido Schimmel , Amit Cohen , , Jiri Pirko Subject: [PATCH net 2/5] mlxsw: pci: Sync Rx buffers for CPU Date: Fri, 25 Oct 2024 16:26:26 +0200 Message-ID: <461486fac91755ca4e04c2068c102250026dcd0b.1729866134.git.petrm@nvidia.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB58:EE_|DS0PR12MB7899:EE_ X-MS-Office365-Filtering-Correlation-Id: 40a416bf-93fa-42ea-e355-08dcf5011f67 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: 9EHSnWwe9eGPMpY440CiGPs4dbwrJ0KepQfoX5Yz5M9LVBDS3GpHqtMyyyqwhrBukPit0c6Ze2/HFJBmR0UEVkA2I4swJ5UElQTpbQ6j7eVV4oFn5Y3wqilqJrF9K36skBVXBwP+khTaauTmRVo5eWMART+SF8n58v4M07PKTFkCzU9oXecFcoRT4556rS9y0zU1TjIxxI2rz8PeATbwJRw9JX3z/fxbVUKSrqEPY0PoPN43Fv6GEI662CmansqkGDDdsBDyiTlu5Kgbf8681ThGIj4LKr3td3Vg/YxsLGuFwmPsIQLgHRTEDylHGy4oB9G59sKXOuIemUJiqHbXWRSSnYiiD+CDLER1egIrIR5LmW0SbbRV9NXqCq/GQo6uZrd1yf7adnzJtLTgl2Co3EPmCm7ZWyKXzdPtwFj7eUfVghqk6kKjrWUoVyCM7yvVbXnGsxc3wkHjQNYTvvPdzq19gxcm8GTHjxfTVcBI4ZQSZlKOGy8s0YcAZA1rSkU67fF90oPPSUQln20/dkiPfiBJlsCmBCnlSds58IYPhmHNnXAi25izpSuGGJPHTFzswOPg5s+wYDw0+F3CYgMWDhwGFziWZmNj9w/V7CkWSTzR91eelk72RPN+9ZgxfxTY3HHyxRXR/qjEB8CRtv1zITZKFd0dG6HUz666arGghLmWYLPOmWsh1weESOtb+4nuDTj2v61YzTZ2leEjYXr7Mijz8nzMrqgBAra0SHjNuWACvQu1nW0bCCjWVhxv7640BTg/JDai2UqrDYpfnTyAyXihzYYaQfWI4J8h+NHvX5uQa8x7Pp5UAun3BFJz9WL16B/lb1J6DHZRK3fu5Ot8jJxaJW05c6GFNe54DufBFe4s3xmUlFkREPBySF7QVhIR4b8gVZq3fcEX0/rAhuPjxFxwufSLpD0pfLTllz1CJoF5hhB9DwscAJFYuU46uIQAuTfRv5Y8fV47Hn/clYIPWBh6SuV3Kto46aZa7BjLjKnNvJFkDztU5aX1NZRuFeqKnL4rl+EvZiMO6Y0U4iwGuDu2HeJtWNwg5d0sFD3E0jwomKDWBvrSe1eMDC9I0/5jBBD0fxbJQVvz+Rh75jGABsiptB6zXxDHK5FLksSz1EuUJz+KIRX+AE1OToDjkq9nE7CY1+Z9ByWzcHADV4U6fJUjEUA7tY0RA50c3HntN60JIgck7zjEpnUO2BKiKC45PwhutgzrGcgc8t1MrBt/2uiG9HeI/xb8bYeXfHr15+PBIsrmKfLVK2sXC0O4ZH0837MFoEbVBq9xSoAvtnOHyoqpe8GwfrfScyLJOHfK9tRTQ88sG+P+6084uSlNtE+4puiGQD6LbRyuZ5EggV8DUGUPFB49UbWkR8hCrnGmeH/WAs1iKWJA9TeLAPIaQ1BjptVBUQklQ8OzcbmRCF6cuQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 14:27:14.8567 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 40a416bf-93fa-42ea-e355-08dcf5011f67 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB58.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7899 X-Patchwork-Delegate: kuba@kernel.org From: Amit Cohen When Rx packet is received, drivers should sync the pages for CPU, to ensure the CPU reads the data written by the device and not stale data from its cache. Add the missing sync call in Rx path, sync the actual length of data for each fragment. Cc: Jiri Pirko Fixes: b5b60bb491b2 ("mlxsw: pci: Use page pool for Rx buffers allocation") Signed-off-by: Amit Cohen Reviewed-by: Ido Schimmel Signed-off-by: Petr Machata --- drivers/net/ethernet/mellanox/mlxsw/pci.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 060e5b939211..2320a5f323b4 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c @@ -389,15 +389,27 @@ static void mlxsw_pci_wqe_frag_unmap(struct mlxsw_pci *mlxsw_pci, char *wqe, dma_unmap_single(&pdev->dev, mapaddr, frag_len, direction); } -static struct sk_buff *mlxsw_pci_rdq_build_skb(struct page *pages[], +static struct sk_buff *mlxsw_pci_rdq_build_skb(struct mlxsw_pci_queue *q, + struct page *pages[], u16 byte_count) { + struct mlxsw_pci_queue *cq = q->u.rdq.cq; unsigned int linear_data_size; + struct page_pool *page_pool; struct sk_buff *skb; int page_index = 0; bool linear_only; void *data; + linear_only = byte_count + MLXSW_PCI_RX_BUF_SW_OVERHEAD <= PAGE_SIZE; + linear_data_size = linear_only ? byte_count : + PAGE_SIZE - + MLXSW_PCI_RX_BUF_SW_OVERHEAD; + + page_pool = cq->u.cq.page_pool; + page_pool_dma_sync_for_cpu(page_pool, pages[page_index], + MLXSW_PCI_SKB_HEADROOM, linear_data_size); + data = page_address(pages[page_index]); net_prefetch(data); @@ -405,11 +417,6 @@ static struct sk_buff *mlxsw_pci_rdq_build_skb(struct page *pages[], if (unlikely(!skb)) return ERR_PTR(-ENOMEM); - linear_only = byte_count + MLXSW_PCI_RX_BUF_SW_OVERHEAD <= PAGE_SIZE; - linear_data_size = linear_only ? byte_count : - PAGE_SIZE - - MLXSW_PCI_RX_BUF_SW_OVERHEAD; - skb_reserve(skb, MLXSW_PCI_SKB_HEADROOM); skb_put(skb, linear_data_size); @@ -425,6 +432,7 @@ static struct sk_buff *mlxsw_pci_rdq_build_skb(struct page *pages[], page = pages[page_index]; frag_size = min(byte_count, PAGE_SIZE); + page_pool_dma_sync_for_cpu(page_pool, page, 0, frag_size); skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page, 0, frag_size, PAGE_SIZE); byte_count -= frag_size; @@ -760,7 +768,7 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci, if (err) goto out; - skb = mlxsw_pci_rdq_build_skb(pages, byte_count); + skb = mlxsw_pci_rdq_build_skb(q, pages, byte_count); if (IS_ERR(skb)) { dev_err_ratelimited(&pdev->dev, "Failed to build skb for RDQ\n"); mlxsw_pci_rdq_pages_recycle(q, pages, num_sg_entries);