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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , CC: Amit Cohen , Ido Schimmel , "Petr Machata" , Alexei Starovoitov , "Daniel Borkmann" , Jesper Dangaard Brouer , John Fastabend , , Subject: [PATCH net-next 03/12] mlxsw: Add struct mlxsw_pci_rx_pkt_info Date: Tue, 4 Feb 2025 12:04:58 +0100 Message-ID: <67e4b6dbb35d1e977b56e1a40e8227704ba353a3.1738665783.git.petrm@nvidia.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B0:EE_|MN0PR12MB5906:EE_ X-MS-Office365-Filtering-Correlation-Id: 00016004-5e78-439e-90de-08dd450bfbdb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: KcOWS+dmy5ibopCPr5YKbQQc3EY+ofw8cml3ctw/RQBZGGHOsrgOKWZid8Uv/XBvQVSvU4UJFLYaDO5611Q1/Mzykg5nJ59OQJBuG+yoQpuQlcswAPHp9qUwZvfc8pFqI0HiLC0jnzMfF2XVhoOCdq5KC/QhEPyaalsHPpzXUlOlTTLPsH84TpTlICbeDKaEcWeGQZOrYnS1ejYoPqFWrN2lYuFCm7IXlmijvt6gh46zZ4EqH1eRNPchOyAQ79pfhqZwGeAYNRaD01L6Lqed/u/lxnwMqlkDY0sba9JNygN29v2MqBXIT51SGLIIfQjfK/bxCgQSVi+11dARIjCx4HKUSzlBscvYEYMFxcp+Xryl1p9+Mny/ytdkpit3IZB5Qwk61uo+fWUQPA7+gN3OOSGyqptLDJDxVJGEJjLFKxG2w1nq5Y5zrKF+ukggHW0Vz20Ayi9GLp7OQ3NphexlGiO9kGjUkkUynTz2qBwrv9p0gzecR4VtwCFM83cZP9/2cJOccAdjtjew0k1/a4xg31aDC0mpraxJ5T9ZCeHtHEDCwyHZPXm5Y5r9wYpMfLXDjtjXYzdoap6JC8f/c1JVDki7HDt/yX1iABRaetdqg528/hpJ/JboVm9qQglLOeHtq2ZGF1XY527cDdQ6pgqU2GIC/GujI4oqK1c+z2rcH/kOMIn5XOOnKeWvW4UAppjpnY2ewOnclsIySERbwpNPo706BXHn0pAw4kYI6VUBskgozfckHiSnVOLpic/SGmgnSYp7X27lsG0M6JzOrn0q+4Nt1/6cyvDU6ZVd4nDcjtPkOfiD00Kmo7UjAEaIqUniOvtItO2i+UaEWbash09YeSbIe1zLn7JZzBS7d58DxfaNRdRGQ29V2gD6tr7/LXwPrMJ9Qh6zEAPlnYYwx7G1KvOWG1B1DN4ujPWZoc8LK4GADPifcuhztr7J9xCFGm/A65S3bvItgRd92dR6z7YF09q2kDLASVTmP4wWvusdtxCPi6bqqbAw5QTw5xA/4SsoJpbb+BNA+/y1TGRTkRTj6F6/tRkN4KmHtj2HZlKq0EXQziAfs5KYBOc7yiaYg5xX8TWJ5o8vBLLNNH9qW1UEgHSxDpS8MfNJxYHd1sCsbbOG/zoFHYYDf89vOuSzA7GjcY9xE1BPeXzWj9F24aZ8Vl0JIOmviWkTRCXGXFTadqIwOwMRKIxbG/O5RKmZ9oHA0awDN+mOCWP9zwc3SaRFJqE6KzWPKcRHvoSRsW5fre5acT9AA7Oaqh7WE92Ityd7yZZnUueKS7Ech2j+jgsoVBfYb5JbxwyGRaFpG/6zGl3M0fJ8LETQw9q2UDKXeUDTRGqFC71/5SG6tIa3JeCjnMpp8rNosFVBEiFp9Se4BrrgiYU93giMoo5z0Ot0WW+BBYkhrb1F03RLSpuE5GdI6aMR6/n/Sw7esYgNg+yHuIqbxn8zUQsizlbJiED9mw8wSBnCuDJkbSUg5Bd5cNllbufkYAssaqwlhYDdaBKoriY= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(82310400026)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2025 11:06:32.7655 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 00016004-5e78-439e-90de-08dd450bfbdb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5906 X-Patchwork-Delegate: kuba@kernel.org From: Amit Cohen When Rx packet is received, given byte_count value from the CQE, we calculate how many scatter/gather entries are used and the size of each entry. Such calculation is used for syncing the buffers for CPU and for building SKB. When XDP will be supported, these values will be used also to create XDP buffer. To avoid recalculating number of scatter/gather entries and size of each entry, add a dedicated structure to hold such info. Store also pointers to pages. Initialize the new structure once Rx packet is received. This patch only initializes the structure, next patches will use it. Add struct mlxsw_pci_rx_pkt_info in pci.h as next patch in this set will use it from another file. Signed-off-by: Amit Cohen Reviewed-by: Ido Schimmel Signed-off-by: Petr Machata --- drivers/net/ethernet/mellanox/mlxsw/pci.c | 57 +++++++++++++++++--- drivers/net/ethernet/mellanox/mlxsw/pci.h | 8 +++ drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | 1 - 3 files changed, 57 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 55ef185c9f5a..aca1857a4e70 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c @@ -390,6 +390,49 @@ static void mlxsw_pci_wqe_frag_unmap(struct mlxsw_pci *mlxsw_pci, char *wqe, dma_unmap_single(&pdev->dev, mapaddr, frag_len, direction); } +static u8 mlxsw_pci_num_sg_entries_get(u16 byte_count) +{ + return DIV_ROUND_UP(byte_count + MLXSW_PCI_RX_BUF_SW_OVERHEAD, + PAGE_SIZE); +} + +static int +mlxsw_pci_rx_pkt_info_init(const struct mlxsw_pci *pci, + const struct mlxsw_pci_queue_elem_info *elem_info, + u16 byte_count, + struct mlxsw_pci_rx_pkt_info *rx_pkt_info) +{ + unsigned int linear_data_size; + u8 num_sg_entries; + bool linear_only; + int i; + + num_sg_entries = mlxsw_pci_num_sg_entries_get(byte_count); + if (WARN_ON_ONCE(num_sg_entries > pci->num_sg_entries)) + return -EINVAL; + + rx_pkt_info->num_sg_entries = num_sg_entries; + + linear_only = byte_count + MLXSW_PCI_RX_BUF_SW_OVERHEAD <= PAGE_SIZE; + linear_data_size = linear_only ? byte_count : + PAGE_SIZE - + MLXSW_PCI_RX_BUF_SW_OVERHEAD; + + for (i = 0; i < num_sg_entries; i++) { + unsigned int sg_entry_size; + + sg_entry_size = i ? min(byte_count, PAGE_SIZE) : + linear_data_size; + + rx_pkt_info->sg_entries_size[i] = sg_entry_size; + rx_pkt_info->pages[i] = elem_info->pages[i]; + + byte_count -= sg_entry_size; + } + + return 0; +} + static struct sk_buff *mlxsw_pci_rdq_build_skb(struct mlxsw_pci_queue *q, struct page *pages[], u16 byte_count) @@ -470,12 +513,6 @@ static void mlxsw_pci_rdq_page_free(struct mlxsw_pci_queue *q, false); } -static u8 mlxsw_pci_num_sg_entries_get(u16 byte_count) -{ - return DIV_ROUND_UP(byte_count + MLXSW_PCI_RX_BUF_SW_OVERHEAD, - PAGE_SIZE); -} - static int mlxsw_pci_elem_info_pages_ref_store(const struct mlxsw_pci_queue *q, const struct mlxsw_pci_queue_elem_info *el, @@ -486,8 +523,6 @@ mlxsw_pci_elem_info_pages_ref_store(const struct mlxsw_pci_queue *q, int i; num_sg_entries = mlxsw_pci_num_sg_entries_get(byte_count); - if (WARN_ON_ONCE(num_sg_entries > q->pci->num_sg_entries)) - return -EINVAL; for (i = 0; i < num_sg_entries; i++) pages[i] = el->pages[i]; @@ -743,6 +778,7 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci, u16 consumer_counter_limit, enum mlxsw_pci_cqe_v cqe_v, char *cqe) { + struct mlxsw_pci_rx_pkt_info rx_pkt_info = {}; struct pci_dev *pdev = mlxsw_pci->pdev; struct page *pages[MLXSW_PCI_WQE_SG_ENTRIES]; struct mlxsw_pci_queue_elem_info *elem_info; @@ -773,6 +809,11 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci, rx_info.local_port = mlxsw_pci_cqe_system_port_get(cqe); } + err = mlxsw_pci_rx_pkt_info_init(q->pci, elem_info, byte_count, + &rx_pkt_info); + if (err) + goto out; + err = mlxsw_pci_elem_info_pages_ref_store(q, elem_info, byte_count, pages, &num_sg_entries); if (err) diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.h b/drivers/net/ethernet/mellanox/mlxsw/pci.h index cacc2f9fa1d4..74677feacbb5 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.h @@ -11,11 +11,19 @@ #define PCI_DEVICE_ID_MELLANOX_SPECTRUM3 0xcf70 #define PCI_DEVICE_ID_MELLANOX_SPECTRUM4 0xcf80 +#define MLXSW_PCI_WQE_SG_ENTRIES 3 + #if IS_ENABLED(CONFIG_MLXSW_PCI) int mlxsw_pci_driver_register(struct pci_driver *pci_driver); void mlxsw_pci_driver_unregister(struct pci_driver *pci_driver); +struct mlxsw_pci_rx_pkt_info { + struct page *pages[MLXSW_PCI_WQE_SG_ENTRIES]; + unsigned int sg_entries_size[MLXSW_PCI_WQE_SG_ENTRIES]; + u8 num_sg_entries; +}; + #else static inline int diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h index 6bed495dcf0f..83d25f926287 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h @@ -64,7 +64,6 @@ #define MLXSW_PCI_EQE_COUNT (MLXSW_PCI_AQ_SIZE / MLXSW_PCI_EQE_SIZE) #define MLXSW_PCI_EQE_UPDATE_COUNT 0x80 -#define MLXSW_PCI_WQE_SG_ENTRIES 3 #define MLXSW_PCI_WQE_TYPE_ETHERNET 0xA /* pci_wqe_c