| Message ID | 72755b6b-f071-1c54-c2fd-5ea0376effe1@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net] net: stmmac: work around sporadic tx issue on link-up | expand |
On Sat, 20 Aug 2022 17:20:37 +0200 Heiner Kallweit wrote: > This is a follow-up to the discussion in [0]. It seems to me that > at least the IP version used on Amlogic SoC's sometimes has a problem > if register MAC_CTRL_REG is written whilst the chip is still processing > a previous write. But that's just a guess. > Adding a delay between two writes to this register helps, but we can > also simply omit the offending second write. This patch uses the second > approach and is based on a suggestion from Qi Duan. > Benefit of this approach is that we can save few register writes, also > on not affected chip versions. > > This patch doesn't apply cleanly before the commit marked as fixed. > There's nothing wrong with this commit. I don't think this is right, please do your best to identify where the bug was actually introduced and put that in the Fixes tag. IIRC this is not the first time you've made this choice so let's sort this out, we can bring it up with Greg if you would like, I don't see it clarified in the docs. My understanding and experience doing backports for my employer is that cutting off the Fixes tag at the place patch application fails is very counter productive. Better to go too far back and let the person maintaining the tree decide if the backport is needed. > [0] https://www.spinics.net/lists/netdev/msg831526.html > > Fixes: 11059740e616 ("net: pcs: xpcs: convert to phylink_pcs_ops")
On 24.08.2022 01:22, Jakub Kicinski wrote: > On Sat, 20 Aug 2022 17:20:37 +0200 Heiner Kallweit wrote: >> This is a follow-up to the discussion in [0]. It seems to me that >> at least the IP version used on Amlogic SoC's sometimes has a problem >> if register MAC_CTRL_REG is written whilst the chip is still processing >> a previous write. But that's just a guess. >> Adding a delay between two writes to this register helps, but we can >> also simply omit the offending second write. This patch uses the second >> approach and is based on a suggestion from Qi Duan. >> Benefit of this approach is that we can save few register writes, also >> on not affected chip versions. >> >> This patch doesn't apply cleanly before the commit marked as fixed. >> There's nothing wrong with this commit. > > I don't think this is right, please do your best to identify where > the bug was actually introduced and put that in the Fixes tag. > > IIRC this is not the first time you've made this choice so let's > sort this out, we can bring it up with Greg if you would like, > I don't see it clarified in the docs. > > My understanding and experience doing backports for my employer is > that cutting off the Fixes tag at the place patch application fails > is very counter productive. Better to go too far back and let > the person maintaining the tree decide if the backport is needed. > OK, I changed the Fixes tag accordingly and submitted a v2.
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c index caa4bfc4c..9b6138b11 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c @@ -258,14 +258,18 @@ EXPORT_SYMBOL_GPL(stmmac_set_mac_addr); /* Enable disable MAC RX/TX */ void stmmac_set_mac(void __iomem *ioaddr, bool enable) { - u32 value = readl(ioaddr + MAC_CTRL_REG); + u32 old_val, value; + + old_val = readl(ioaddr + MAC_CTRL_REG); + value = old_val; if (enable) value |= MAC_ENABLE_RX | MAC_ENABLE_TX; else value &= ~(MAC_ENABLE_TX | MAC_ENABLE_RX); - writel(value, ioaddr + MAC_CTRL_REG); + if (value != old_val) + writel(value, ioaddr + MAC_CTRL_REG); } void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr, diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 070b5ef16..592d29abc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -986,10 +986,10 @@ static void stmmac_mac_link_up(struct phylink_config *config, bool tx_pause, bool rx_pause) { struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev)); - u32 ctrl; + u32 old_ctrl, ctrl; - ctrl = readl(priv->ioaddr + MAC_CTRL_REG); - ctrl &= ~priv->hw->link.speed_mask; + old_ctrl = readl(priv->ioaddr + MAC_CTRL_REG); + ctrl = old_ctrl & ~priv->hw->link.speed_mask; if (interface == PHY_INTERFACE_MODE_USXGMII) { switch (speed) { @@ -1064,7 +1064,8 @@ static void stmmac_mac_link_up(struct phylink_config *config, if (tx_pause && rx_pause) stmmac_mac_flow_ctrl(priv, duplex); - writel(ctrl, priv->ioaddr + MAC_CTRL_REG); + if (ctrl != old_ctrl) + writel(ctrl, priv->ioaddr + MAC_CTRL_REG); stmmac_mac_set(priv, priv->ioaddr, true); if (phy && priv->dma_cap.eee) {
This is a follow-up to the discussion in [0]. It seems to me that at least the IP version used on Amlogic SoC's sometimes has a problem if register MAC_CTRL_REG is written whilst the chip is still processing a previous write. But that's just a guess. Adding a delay between two writes to this register helps, but we can also simply omit the offending second write. This patch uses the second approach and is based on a suggestion from Qi Duan. Benefit of this approach is that we can save few register writes, also on not affected chip versions. This patch doesn't apply cleanly before the commit marked as fixed. There's nothing wrong with this commit. [0] https://www.spinics.net/lists/netdev/msg831526.html Fixes: 11059740e616 ("net: pcs: xpcs: convert to phylink_pcs_ops") Suggested-by: Qi Duan <qi.duan@amlogic.com> Suggested-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 8 ++++++-- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 9 +++++---- 2 files changed, 11 insertions(+), 6 deletions(-)