Message ID | LV3P220MB12024CB984967E4AC05A1E13A0192@LV3P220MB1202.NAMP220.PROD.OUTLOOK.COM (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | ptp: clockmatrix: support 32-bit address space | expand |
The 05/01/2024 12:03, Min Li wrote: Hi Min Li, > > From: Min Li <min.li.xe@renesas.com> > > Set dco input-to-output delay is 20 FOD cycles + 8ns Can you explain why you are doing this change in the commit message? Is this a fix or just improvement? > > Signed-off-by: Min Li <min.li.xe@renesas.com> > --- > drivers/ptp/ptp_clockmatrix.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c > index d069b6e451ef..21f3a2c179f5 100644 > --- a/drivers/ptp/ptp_clockmatrix.c > +++ b/drivers/ptp/ptp_clockmatrix.c > @@ -2165,7 +2165,7 @@ static int configure_channel_pll(struct idtcm_channel *channel) > > /* > * Compensate for the PTP DCO input-to-output delay. > - * This delay is 18 FOD cycles. > + * This delay is 20 FOD cycles + 8ns. > */ > static u32 idtcm_get_dco_delay(struct idtcm_channel *channel) > { > @@ -2196,7 +2196,7 @@ static u32 idtcm_get_dco_delay(struct idtcm_channel *channel) > fodFreq = (u32)div_u64(m, n); > > if (fodFreq >= 500000000) > - return (u32)div_u64(18 * (u64)NSEC_PER_SEC, fodFreq); > + return (u32)div_u64(20 * (u64)NSEC_PER_SEC, fodFreq) + 8; > > return 0; > } > -- > 2.39.2 > >
> > Can you explain why you are doing this change in the commit message? > Is this a fix or just improvement? > This is a fix but the first patch of the series is an improvement. But they have code dependency so I am submitting them together to avoid the hassle Min
diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c index d069b6e451ef..21f3a2c179f5 100644 --- a/drivers/ptp/ptp_clockmatrix.c +++ b/drivers/ptp/ptp_clockmatrix.c @@ -2165,7 +2165,7 @@ static int configure_channel_pll(struct idtcm_channel *channel) /* * Compensate for the PTP DCO input-to-output delay. - * This delay is 18 FOD cycles. + * This delay is 20 FOD cycles + 8ns. */ static u32 idtcm_get_dco_delay(struct idtcm_channel *channel) { @@ -2196,7 +2196,7 @@ static u32 idtcm_get_dco_delay(struct idtcm_channel *channel) fodFreq = (u32)div_u64(m, n); if (fodFreq >= 500000000) - return (u32)div_u64(18 * (u64)NSEC_PER_SEC, fodFreq); + return (u32)div_u64(20 * (u64)NSEC_PER_SEC, fodFreq) + 8; return 0; }