From patchwork Fri Nov 10 09:27:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yanteng Si X-Patchwork-Id: 13452259 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6EAC6125A4 for ; Fri, 10 Nov 2023 09:27:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0F6A12BE37 for ; Fri, 10 Nov 2023 01:27:52 -0800 (PST) Received: from loongson.cn (unknown [112.20.112.120]) by gateway (Coremail) with SMTP id _____8CxLOuW901lUrQ4AA--.40523S3; Fri, 10 Nov 2023 17:27:50 +0800 (CST) Received: from localhost.localdomain (unknown [112.20.112.120]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxK9yQ901l5_o9AA--.4030S4; Fri, 10 Nov 2023 17:27:47 +0800 (CST) From: Yanteng Si To: andrew@lunn.ch, hkallweit1@gmail.com, peppe.cavallaro@st.com, alexandre.torgue@foss.st.com, joabreu@synopsys.com Cc: Yanteng Si , fancer.lancer@gmail.com, Jose.Abreu@synopsys.com, chenhuacai@loongson.cn, linux@armlinux.org.uk, dongbiao@loongson.cn, guyinggang@loongson.cn, netdev@vger.kernel.org, loongarch@lists.linux.dev, chris.chenfeiyang@gmail.com Subject: [PATCH v5 7/9] net: stmmac: dwmac-loongson: Add GNET support Date: Fri, 10 Nov 2023 17:27:32 +0800 Message-Id: X-Mailer: git-send-email 2.31.4 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxK9yQ901l5_o9AA--.4030S4 X-CM-SenderInfo: pvl1t0pwhqwqxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoWxuryktFyrKF1rWw1UXF1UArc_yoWrKrWrpw 43Aa4q9rWxtF1xKws5Jws8AFy5CFZxKrZ7WFW7twsIgFZFy34YqryjgFWjyr17CrWDu343 Xr4qkr48uFs8CrgCm3ZEXasCq-sJn29KB7ZKAUJUUUU3529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUBvb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r126r13M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAaw2AFwI0_JF0_Jw1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2 xF0cIa020Ex4CE44I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_ Wrv_ZF1lYx0Ex4A2jsIE14v26F4j6r4UJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2 Ij64vIr41lc7CjxVAaw2AFwI0_JF0_Jw1l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Y z7v_Jr0_Gr1l4IxYO2xFxVAFwI0_JF0_Jw1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x 8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE 2Ix0cI8IcVAFwI0_Ar0_tr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26F4j6r4UJwCI42IY6x AIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Cr0_Gr1UMIIF0xvEx4A2jsIE c7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07j2Hq7UUUUU= X-Patchwork-Delegate: kuba@kernel.org Add Loongson GNET (GMAC with PHY) support. Current GNET does not support half duplex mode, and GNET on LS7A only supports ANE when speed is set to 1000M. Signed-off-by: Yanteng Si Signed-off-by: Feiyang Chen Signed-off-by: Yinggang Gu --- .../ethernet/stmicro/stmmac/dwmac-loongson.c | 79 +++++++++++++++++++ .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 6 ++ include/linux/stmmac.h | 2 + 3 files changed, 87 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c index a23735371b35..575ec2d96741 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c @@ -179,6 +179,83 @@ static struct stmmac_pci_info loongson_gmac_pci_info = { .config = loongson_gmac_config, }; +static void loongson_gnet_fix_speed(void *priv, unsigned int speed, unsigned int mode) +{ + struct net_device *ndev = dev_get_drvdata(priv); + struct stmmac_priv *ptr = netdev_priv(ndev); + + /* The controller and PHY don't work well together. + * We need to use the PS bit to check if the controller's status + * is correct and reset PHY if necessary. + */ + if (speed == SPEED_1000) + if (readl(ptr->ioaddr + MAC_CTRL_REG) & (1 << 15) /* PS */) + phy_restart_aneg(ndev->phydev); +} + +static int loongson_gnet_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + loongson_default_data(pdev, plat); + + plat->multicast_filter_bins = 256; + + plat->mdio_bus_data->phy_mask = 0xfffffffb; + + plat->phy_addr = 2; + plat->phy_interface = PHY_INTERFACE_MODE_INTERNAL; + + plat->bsp_priv = &pdev->dev; + plat->fix_mac_speed = loongson_gnet_fix_speed; + + plat->dma_cfg->pbl = 32; + plat->dma_cfg->pblx8 = true; + + plat->clk_ref_rate = 125000000; + plat->clk_ptp_rate = 125000000; + + return 0; +} + +static int loongson_gnet_config(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat, + struct stmmac_resources *res, + struct device_node *np) +{ + int ret; + u32 version = readl(res->addr + GMAC_VERSION); + + switch (version & 0xff) { + case DWGMAC_CORE_1_00: + ret = loongson_dwmac_config_multi_msi(pdev, plat, res, np, 8); + break; + default: + ret = loongson_dwmac_config_legacy(pdev, plat, res, np); + break; + } + + switch (pdev->revision) { + case 0x00: + plat->flags |= + FIELD_PREP(STMMAC_FLAG_DISABLE_HALF_DUPLEX, 1) | + FIELD_PREP(STMMAC_FLAG_DISABLE_FORCE_1000, 1); + break; + case 0x01: + plat->flags |= + FIELD_PREP(STMMAC_FLAG_DISABLE_HALF_DUPLEX, 1); + break; + default: + break; + } + + return ret; +} + +static struct stmmac_pci_info loongson_gnet_pci_info = { + .setup = loongson_gnet_data, + .config = loongson_gnet_config, +}; + static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id *id) { @@ -327,9 +404,11 @@ static SIMPLE_DEV_PM_OPS(loongson_dwmac_pm_ops, loongson_dwmac_suspend, loongson_dwmac_resume); #define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03 +#define PCI_DEVICE_ID_LOONGSON_GNET 0x7a13 static const struct pci_device_id loongson_dwmac_id_table[] = { { PCI_DEVICE_DATA(LOONGSON, GMAC, &loongson_gmac_pci_info) }, + { PCI_DEVICE_DATA(LOONGSON, GNET, &loongson_gnet_pci_info) }, {} }; MODULE_DEVICE_TABLE(pci, loongson_dwmac_id_table); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index f628411ae4ae..646a1af12705 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -410,6 +410,12 @@ stmmac_ethtool_set_link_ksettings(struct net_device *dev, return 0; } + if (FIELD_GET(STMMAC_FLAG_DISABLE_FORCE_1000, priv->plat->flags)) { + if (cmd->base.speed == SPEED_1000 && + cmd->base.autoneg != AUTONEG_ENABLE) + return -EOPNOTSUPP; + } + return phylink_ethtool_ksettings_set(priv->phylink, cmd); } diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 664a0e1cefc2..2b8f5dc09920 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -220,6 +220,8 @@ struct dwmac4_addrs { #define STMMAC_FLAG_RX_CLK_RUNS_IN_LPI BIT(10) #define STMMAC_FLAG_EN_TX_LPI_CLOCKGATING BIT(11) #define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(12) +#define STMMAC_FLAG_DISABLE_HALF_DUPLEX BIT(13) +#define STMMAC_FLAG_DISABLE_FORCE_1000 BIT(14) struct plat_stmmacenet_data { int bus_id;