diff mbox series

forcedeth: fix excluded_middle.cocci warnings

Message ID alpine.DEB.2.22.394.2011020936100.3077@hadrien (mailing list archive)
State Not Applicable
Delegated to: Netdev Maintainers
Headers show
Series forcedeth: fix excluded_middle.cocci warnings | expand

Commit Message

Julia Lawall Nov. 2, 2020, 8:38 a.m. UTC 
From: kernel test robot <lkp@intel.com>

Condition !A || A && B is equivalent to !A || B.

Generated by: scripts/coccinelle/misc/excluded_middle.cocci

Fixes: b76f0ea01312 ("coccinelle: misc: add excluded_middle.cocci script")
CC: Denis Efremov <efremov@linux.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Signed-off-by: Julia Lawall <julia.lawall@inria.fr>
---

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   3cea11cd5e3b00d91caf0b4730194039b45c5891
commit: b76f0ea013125358d1b4ca147a6f9b6883dd2493 coccinelle: misc: add excluded_middle.cocci script
:::::: branch date: 7 hours ago
:::::: commit date: 6 weeks ago

 forcedeth.c |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Jakub Kicinski Nov. 4, 2020, 1:48 a.m. UTC | #1 
On Mon, 2 Nov 2020 09:38:30 +0100 (CET) Julia Lawall wrote:
> From: kernel test robot <lkp@intel.com>
> 
> Condition !A || A && B is equivalent to !A || B.
> 
> Generated by: scripts/coccinelle/misc/excluded_middle.cocci
> 
> Fixes: b76f0ea01312 ("coccinelle: misc: add excluded_middle.cocci script")
> CC: Denis Efremov <efremov@linux.com>
> Signed-off-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Julia Lawall <julia.lawall@inria.fr>

Applied, thanks!
diff mbox series

Patch

--- a/drivers/net/ethernet/nvidia/forcedeth.c
+++ b/drivers/net/ethernet/nvidia/forcedeth.c
@@ -1043,8 +1043,7 @@  static int using_multi_irqs(struct net_d
 	struct fe_priv *np = get_nvpriv(dev);

 	if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
-	    ((np->msi_flags & NV_MSI_X_ENABLED) &&
-	     ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1)))
+	    ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))
 		return 0;
 	else
 		return 1;