From patchwork Tue Dec 19 14:26:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yanteng Si X-Patchwork-Id: 13498382 X-Patchwork-Delegate: kuba@kernel.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0079E37D06 for ; Tue, 19 Dec 2023 14:27:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [112.20.110.252]) by gateway (Coremail) with SMTP id _____8BxbOk2qIFlW6MCAA--.13131S3; Tue, 19 Dec 2023 22:27:02 +0800 (CST) Received: from localhost.localdomain (unknown [112.20.110.252]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxneQxqIFlbHUAAA--.3423S4; Tue, 19 Dec 2023 22:27:01 +0800 (CST) From: Yanteng Si To: andrew@lunn.ch, hkallweit1@gmail.com, peppe.cavallaro@st.com, alexandre.torgue@foss.st.com, joabreu@synopsys.com Cc: Yanteng Si , fancer.lancer@gmail.com, Jose.Abreu@synopsys.com, chenhuacai@loongson.cn, linux@armlinux.org.uk, guyinggang@loongson.cn, netdev@vger.kernel.org, chris.chenfeiyang@gmail.com Subject: [PATCH net-next v7 7/9] net: stmmac: dwmac-loongson: Add GNET support Date: Tue, 19 Dec 2023 22:26:47 +0800 Message-Id: X-Mailer: git-send-email 2.31.4 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxneQxqIFlbHUAAA--.3423S4 X-CM-SenderInfo: pvl1t0pwhqwqxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoWxuryktFyrKF1rWw1UXF1UArc_yoWrKryxpw 43AasF9ry7tF1xKws5Jws8AFyYkFZxKrZ7WrW7tw1agFZFyryFqryjgFW2yry7CrWDury3 Xr4qkr48uFs8C3cCm3ZEXasCq-sJn29KB7ZKAUJUUUUx529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUBvb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Cr1j6rxdM2kKe7AKxVWUAVWUtwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07 AIYIkI8VC2zVCFFI0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWr XVW3AwAv7VC2z280aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x 0EwIxGrwCY1x0262kKe7AKxVWUAVWUtwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkE bVWUJVW8JwCFI7km07C267AKxVWUAVWUtwC20s026c02F40E14v26r1j6r18MI8I3I0E74 80Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0 I7IYx2IY67AKxVW7JVWDJwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr1UMIIF0xvE42 xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWxJVW8Jr1lIxAIcVC2z280aVCY 1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVjvjDU0xZFpf9x07jxxhdUUUUU= X-Patchwork-Delegate: kuba@kernel.org Add Loongson GNET (GMAC with PHY) support. Current GNET does not support half duplex mode, and GNET on LS7A only supports ANE when speed is set to 1000M. Signed-off-by: Yanteng Si Signed-off-by: Feiyang Chen Signed-off-by: Yinggang Gu --- .../ethernet/stmicro/stmmac/dwmac-loongson.c | 79 +++++++++++++++++++ .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 6 ++ include/linux/stmmac.h | 2 + 3 files changed, 87 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c index 2c08d5495214..9e4953c7e4e0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c @@ -168,6 +168,83 @@ static struct stmmac_pci_info loongson_gmac_pci_info = { .config = loongson_gmac_config, }; +static void loongson_gnet_fix_speed(void *priv, unsigned int speed, unsigned int mode) +{ + struct net_device *ndev = dev_get_drvdata(priv); + struct stmmac_priv *ptr = netdev_priv(ndev); + + /* The controller and PHY don't work well together. + * We need to use the PS bit to check if the controller's status + * is correct and reset PHY if necessary. + */ + if (speed == SPEED_1000) + if (readl(ptr->ioaddr + MAC_CTRL_REG) & (1 << 15) /* PS */) + phy_restart_aneg(ndev->phydev); +} + +static int loongson_gnet_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + loongson_default_data(pdev, plat); + + plat->multicast_filter_bins = 256; + + plat->mdio_bus_data->phy_mask = 0xfffffffb; + + plat->phy_addr = 2; + plat->phy_interface = PHY_INTERFACE_MODE_INTERNAL; + + plat->bsp_priv = &pdev->dev; + plat->fix_mac_speed = loongson_gnet_fix_speed; + + plat->dma_cfg->pbl = 32; + plat->dma_cfg->pblx8 = true; + + plat->clk_ref_rate = 125000000; + plat->clk_ptp_rate = 125000000; + + return 0; +} + +static int loongson_gnet_config(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat, + struct stmmac_resources *res, + struct device_node *np) +{ + int ret; + u32 version = readl(res->addr + GMAC_VERSION); + + switch (version & 0xff) { + case DWLGMAC_CORE_1_00: + ret = loongson_dwmac_config_multi_msi(pdev, plat, res, np, 8); + break; + default: + ret = loongson_dwmac_config_legacy(pdev, plat, res, np); + break; + } + + switch (pdev->revision) { + case 0x00: + plat->flags |= + FIELD_PREP(STMMAC_FLAG_DISABLE_HALF_DUPLEX, 1) | + FIELD_PREP(STMMAC_FLAG_DISABLE_FORCE_1000, 1); + break; + case 0x01: + plat->flags |= + FIELD_PREP(STMMAC_FLAG_DISABLE_HALF_DUPLEX, 1); + break; + default: + break; + } + + return ret; +} + +static struct stmmac_pci_info loongson_gnet_pci_info = { + .setup = loongson_gnet_data, + .config = loongson_gnet_config, +}; + static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id *id) { @@ -318,9 +395,11 @@ static SIMPLE_DEV_PM_OPS(loongson_dwmac_pm_ops, loongson_dwmac_suspend, loongson_dwmac_resume); #define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03 +#define PCI_DEVICE_ID_LOONGSON_GNET 0x7a13 static const struct pci_device_id loongson_dwmac_id_table[] = { { PCI_DEVICE_DATA(LOONGSON, GMAC, &loongson_gmac_pci_info) }, + { PCI_DEVICE_DATA(LOONGSON, GNET, &loongson_gnet_pci_info) }, {} }; MODULE_DEVICE_TABLE(pci, loongson_dwmac_id_table); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 8105ce47c6ad..d6939eb9a0d8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -420,6 +420,12 @@ stmmac_ethtool_set_link_ksettings(struct net_device *dev, return 0; } + if (FIELD_GET(STMMAC_FLAG_DISABLE_FORCE_1000, priv->plat->flags)) { + if (cmd->base.speed == SPEED_1000 && + cmd->base.autoneg != AUTONEG_ENABLE) + return -EOPNOTSUPP; + } + return phylink_ethtool_ksettings_set(priv->phylink, cmd); } diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index f07f79d50b06..067030cdb60f 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -222,6 +222,8 @@ struct dwmac4_addrs { #define STMMAC_FLAG_EN_TX_LPI_CLOCKGATING BIT(11) #define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(12) #define STMMAC_FLAG_HAS_LGMAC BIT(13) +#define STMMAC_FLAG_DISABLE_HALF_DUPLEX BIT(14) +#define STMMAC_FLAG_DISABLE_FORCE_1000 BIT(15) struct plat_stmmacenet_data { int bus_id;