diff mbox series

[net-next,01/12] arm64: dts: mediatek: mt7986: add support for Wireless Ethernet Dispatch

Message ID e034b4b71437bce747b128382f1504d5cdc6974b.1662661555.git.lorenzo@kernel.org (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series Add WED support for MT7986 chipset | expand

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netdev/fixes_present success Fixes tag not required for -next series
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netdev/cover_letter success Series has a cover letter
netdev/patch_count success Link
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/cc_maintainers warning 3 maintainers not CCed: linux-arm-kernel@lists.infradead.org robh+dt@kernel.org krzysztof.kozlowski+dt@linaro.org
netdev/build_clang success Errors and warnings before: 0 this patch: 0
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netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
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netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 32 lines checked
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Commit Message

Lorenzo Bianconi Sept. 8, 2022, 7:33 p.m. UTC 
Introduce wed0 and wed1 nodes in order to enable offloading forwarding
between ethernet and wireless devices on the mt7986 chipset.

Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
 arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

Comments

Rob Herring Sept. 13, 2022, 12:09 p.m. UTC | #1 
On Thu, Sep 08, 2022 at 09:33:35PM +0200, Lorenzo Bianconi wrote:
> Introduce wed0 and wed1 nodes in order to enable offloading forwarding
> between ethernet and wireless devices on the mt7986 chipset.
> 
> Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
> Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
>  arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> index e3a407d03551..419d056b8369 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> @@ -222,6 +222,25 @@ ethsys: syscon@15000000 {
>  			 #reset-cells = <1>;
>  		};
>  
> +		wed_pcie: wed_pcie@10003000 {
> +			compatible = "mediatek,wed";

This is undocumented. It needs a binding.

> +			reg = <0 0x10003000 0 0x10>;
> +		};
> +
> +		wed0: wed@15010000 {
> +			compatible = "mediatek,wed", "syscon";

Some are syscon's and some are not?

> +			reg = <0 0x15010000 0 0x1000>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +
> +		wed1: wed@15011000 {
> +			compatible = "mediatek,wed", "syscon";
> +			reg = <0 0x15011000 0 0x1000>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +
>  		eth: ethernet@15100000 {
>  			compatible = "mediatek,mt7986-eth";
>  			reg = <0 0x15100000 0 0x80000>;
> @@ -256,6 +275,7 @@ eth: ethernet@15100000 {
>  						 <&apmixedsys CLK_APMIXED_SGMPLL>;
>  			mediatek,ethsys = <&ethsys>;
>  			mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
> +			mediatek,wed = <&wed0>, <&wed1>;
>  			#reset-cells = <1>;
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> -- 
> 2.37.3
> 
>
Lorenzo Bianconi Sept. 13, 2022, 12:55 p.m. UTC | #2 
On Sep 13, Rob Herring wrote:
> On Thu, Sep 08, 2022 at 09:33:35PM +0200, Lorenzo Bianconi wrote:
> > Introduce wed0 and wed1 nodes in order to enable offloading forwarding
> > between ethernet and wireless devices on the mt7986 chipset.
> > 
> > Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
> > Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
> > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> > ---
> >  arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 20 ++++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> > index e3a407d03551..419d056b8369 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> > @@ -222,6 +222,25 @@ ethsys: syscon@15000000 {
> >  			 #reset-cells = <1>;
> >  		};
> >  
> > +		wed_pcie: wed_pcie@10003000 {
> > +			compatible = "mediatek,wed";
> 
> This is undocumented. It needs a binding.

ack I will fix it in v2.

> 
> > +			reg = <0 0x10003000 0 0x10>;
> > +		};
> > +
> > +		wed0: wed@15010000 {
> > +			compatible = "mediatek,wed", "syscon";
> 
> Some are syscon's and some are not?

ack I will fix it in v2.

Regards,
Lorenzo
> 
> > +			reg = <0 0x15010000 0 0x1000>;
> > +			interrupt-parent = <&gic>;
> > +			interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
> > +		};
> > +
> > +		wed1: wed@15011000 {
> > +			compatible = "mediatek,wed", "syscon";
> > +			reg = <0 0x15011000 0 0x1000>;
> > +			interrupt-parent = <&gic>;
> > +			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
> > +		};
> > +
> >  		eth: ethernet@15100000 {
> >  			compatible = "mediatek,mt7986-eth";
> >  			reg = <0 0x15100000 0 0x80000>;
> > @@ -256,6 +275,7 @@ eth: ethernet@15100000 {
> >  						 <&apmixedsys CLK_APMIXED_SGMPLL>;
> >  			mediatek,ethsys = <&ethsys>;
> >  			mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
> > +			mediatek,wed = <&wed0>, <&wed1>;
> >  			#reset-cells = <1>;
> >  			#address-cells = <1>;
> >  			#size-cells = <0>;
> > -- 
> > 2.37.3
> > 
> >
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index e3a407d03551..419d056b8369 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -222,6 +222,25 @@  ethsys: syscon@15000000 {
 			 #reset-cells = <1>;
 		};
 
+		wed_pcie: wed_pcie@10003000 {
+			compatible = "mediatek,wed";
+			reg = <0 0x10003000 0 0x10>;
+		};
+
+		wed0: wed@15010000 {
+			compatible = "mediatek,wed", "syscon";
+			reg = <0 0x15010000 0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		wed1: wed@15011000 {
+			compatible = "mediatek,wed", "syscon";
+			reg = <0 0x15011000 0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		eth: ethernet@15100000 {
 			compatible = "mediatek,mt7986-eth";
 			reg = <0 0x15100000 0 0x80000>;
@@ -256,6 +275,7 @@  eth: ethernet@15100000 {
 						 <&apmixedsys CLK_APMIXED_SGMPLL>;
 			mediatek,ethsys = <&ethsys>;
 			mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
+			mediatek,wed = <&wed0>, <&wed1>;
 			#reset-cells = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;