| Message ID | e56a9065f50cd90d33da7fe50bf01989adc65d26.1724885333.git.daniel@makrotopia.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net-next,v2,1/2] dt-bindings: net: marvell,aquantia: add properties to override MDI_CFG | expand |
On Wed, Aug 28, 2024 at 11:52:09PM +0100, Daniel Golle wrote: > Despite supporting Auto MDI-X, it looks like Aquantia only supports > swapping pair (1,2) with pair (3,6) like it used to be for MDI-X on > 100MBit/s networks. > > When all 4 pairs are in use (for 1000MBit/s or faster) the link does not > come up with pair order is not configured correctly, either using > MDI_CFG pin or using the "PMA Receive Reserved Vendor Provisioning 1" > register. > > Normally, the order of MDI pairs being either ABCD or DCBA is configured > by pulling the MDI_CFG pin. > > However, some hardware designs require overriding the value configured > by that bootstrap pin. The PHY allows doing that by setting a bit in > "PMA Receive Reserved Vendor Provisioning 1" register which allows > ignoring the state of the MDI_CFG pin and another bit configuring > whether the order of MDI pairs should be normal (ABCD) or reverse > (DCBA). Pair polarity is not affected and remains identical in both > settings. > > Introduce two mutually exclusive boolean properties which allow forcing > either normal or reverse order of the MDI pairs from DT. > > If none of the two new properties is present, the behavior is unchanged > and MDI pair order configuration is untouched (ie. either the result of > MDI_CFG pin pull-up/pull-down, or pair order override already configured > by the bootloader before Linux is started). > > Forcing normal pair order is required on the Adtran SDG-8733A Wi-Fi 7 > residential gateway. Is there an in-tree dts file for this? We like to see that options which are added are actually used. Andrew
On Thu, Aug 29, 2024 at 01:05:00AM +0200, Andrew Lunn wrote: > On Wed, Aug 28, 2024 at 11:52:09PM +0100, Daniel Golle wrote: > > Despite supporting Auto MDI-X, it looks like Aquantia only supports > > swapping pair (1,2) with pair (3,6) like it used to be for MDI-X on > > 100MBit/s networks. > > > > When all 4 pairs are in use (for 1000MBit/s or faster) the link does not > > come up with pair order is not configured correctly, either using > > MDI_CFG pin or using the "PMA Receive Reserved Vendor Provisioning 1" > > register. > > > > Normally, the order of MDI pairs being either ABCD or DCBA is configured > > by pulling the MDI_CFG pin. > > > > However, some hardware designs require overriding the value configured > > by that bootstrap pin. The PHY allows doing that by setting a bit in > > "PMA Receive Reserved Vendor Provisioning 1" register which allows > > ignoring the state of the MDI_CFG pin and another bit configuring > > whether the order of MDI pairs should be normal (ABCD) or reverse > > (DCBA). Pair polarity is not affected and remains identical in both > > settings. > > > > Introduce two mutually exclusive boolean properties which allow forcing > > either normal or reverse order of the MDI pairs from DT. > > > > If none of the two new properties is present, the behavior is unchanged > > and MDI pair order configuration is untouched (ie. either the result of > > MDI_CFG pin pull-up/pull-down, or pair order override already configured > > by the bootloader before Linux is started). > > > > Forcing normal pair order is required on the Adtran SDG-8733A Wi-Fi 7 > > residential gateway. > > Is there an in-tree dts file for this? We like to see that options > which are added are actually used. I planning to submit DTS for all the Adtran 8700 series once the MediaTek MT7988 SoC Ethernet is fully supported. At this point I'm still waiting for feedback on how to organize the PCS drivers for that SoC, see https://patchwork.kernel.org/comment/25954425/
diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c index e982e9ce44a59..32fdd203fcf05 100644 --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -11,6 +11,7 @@ #include <linux/module.h> #include <linux/delay.h> #include <linux/bitfield.h> +#include <linux/of.h> #include <linux/phy.h> #include "aquantia.h" @@ -71,6 +72,11 @@ #define MDIO_AN_TX_VEND_INT_MASK2 0xd401 #define MDIO_AN_TX_VEND_INT_MASK2_LINK BIT(0) +#define PMAPMD_RSVD_VEND_PROV 0xe400 +#define PMAPMD_RSVD_VEND_PROV_MDI_CONF GENMASK(1, 0) +#define PMAPMD_RSVD_VEND_PROV_MDI_REVERSE BIT(0) +#define PMAPMD_RSVD_VEND_PROV_MDI_FORCE BIT(1) + #define MDIO_AN_RX_LP_STAT1 0xe820 #define MDIO_AN_RX_LP_STAT1_1000BASET_FULL BIT(15) #define MDIO_AN_RX_LP_STAT1_1000BASET_HALF BIT(14) @@ -474,6 +480,31 @@ static void aqr107_chip_info(struct phy_device *phydev) fw_major, fw_minor, build_id, prov_id); } +static int aqr107_config_mdi(struct phy_device *phydev) +{ + struct device_node *np = phydev->mdio.dev.of_node; + bool force_normal, force_reverse; + + force_normal = of_property_read_bool(np, "marvell,force-mdi-order-normal"); + force_reverse = of_property_read_bool(np, "marvell,force-mdi-order-reverse"); + + if (force_normal && force_reverse) + return -EINVAL; + + if (force_normal) + return phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, PMAPMD_RSVD_VEND_PROV, + PMAPMD_RSVD_VEND_PROV_MDI_CONF, + PMAPMD_RSVD_VEND_PROV_MDI_FORCE); + + if (force_reverse) + return phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, PMAPMD_RSVD_VEND_PROV, + PMAPMD_RSVD_VEND_PROV_MDI_CONF, + PMAPMD_RSVD_VEND_PROV_MDI_REVERSE | + PMAPMD_RSVD_VEND_PROV_MDI_FORCE); + + return 0; +} + static int aqr107_config_init(struct phy_device *phydev) { struct aqr107_priv *priv = phydev->priv; @@ -503,6 +534,10 @@ static int aqr107_config_init(struct phy_device *phydev) if (ret) return ret; + ret = aqr107_config_mdi(phydev); + if (ret) + return ret; + /* Restore LED polarity state after reset */ for_each_set_bit(led_active_low, &priv->leds_active_low, AQR_MAX_LEDS) { ret = aqr_phy_led_active_low_set(phydev, index, led_active_low);
Despite supporting Auto MDI-X, it looks like Aquantia only supports swapping pair (1,2) with pair (3,6) like it used to be for MDI-X on 100MBit/s networks. When all 4 pairs are in use (for 1000MBit/s or faster) the link does not come up with pair order is not configured correctly, either using MDI_CFG pin or using the "PMA Receive Reserved Vendor Provisioning 1" register. Normally, the order of MDI pairs being either ABCD or DCBA is configured by pulling the MDI_CFG pin. However, some hardware designs require overriding the value configured by that bootstrap pin. The PHY allows doing that by setting a bit in "PMA Receive Reserved Vendor Provisioning 1" register which allows ignoring the state of the MDI_CFG pin and another bit configuring whether the order of MDI pairs should be normal (ABCD) or reverse (DCBA). Pair polarity is not affected and remains identical in both settings. Introduce two mutually exclusive boolean properties which allow forcing either normal or reverse order of the MDI pairs from DT. If none of the two new properties is present, the behavior is unchanged and MDI pair order configuration is untouched (ie. either the result of MDI_CFG pin pull-up/pull-down, or pair order override already configured by the bootloader before Linux is started). Forcing normal pair order is required on the Adtran SDG-8733A Wi-Fi 7 residential gateway. Signed-off-by: Daniel Golle <daniel@makrotopia.org> --- v2: add missing 'static' keyword, improve commit description drivers/net/phy/aquantia/aquantia_main.c | 35 ++++++++++++++++++++++++ 1 file changed, 35 insertions(+)