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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , CC: Ido Schimmel , Petr Machata , "Amit Cohen" , Subject: [PATCH net-next 09/17] mlxsw: spectrum_fid: Add an op for packing SFMR Date: Tue, 28 Nov 2023 16:50:42 +0100 Message-ID: X-Mailer: git-send-email 2.41.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F0:EE_|DS7PR12MB5792:EE_ X-MS-Office365-Filtering-Correlation-Id: 552e08bf-c9e0-49f4-9297-08dbf029ee16 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Tl47TF+3FL1x5lMBrhjQR91YlLfBSZtcVJ7hxdqID0IgNEgzQny6ailRfcvkeRfZMniWPgX3hwd8g0OC63QplLGD6MQsFdtlHc73smpDyATZYw79EFEygq2rTWK4K8spk6BMYtP8miCl6foyD1tTNytomC+QP0i3Z7aT/vB8TXyf5UEQOTrJgqS8lICYLUWrYPDTfmXPgfC41iqEYxy5/n+thklsJ1eXpBxujaHsnJaCAjRL5tvB9mKwEF7zOL7R6QWgR4FXAjrq8qBYJodt0DtYRyG1ygBEjNd59AXQOQORmk5H+h67CCkYXOyEBDC5BSbn7vGUPxXwlxEULditHGEQzClUqGbXgk9hQj999ZoX52M3JBakqBX9oW/F1HAaM8f2QXSzqFzW9VLisUsVq13ZR3JSMjygY5sb+qBqcIei6iWjAGktbYxmIBxq4KA6CXOIGnxxHdTxQBCA5DywDkGiHcWJJTfPaGxWKn5gaxVTz3alug79SA0qb88AviIwYdIXa4AKMbG3+JSwPWDXz7QpPkYXpB5XSBuGmVse47NhHjWDb4Qoz54+6rKd+mdmA6dKGXgg5ahzzLpdaraxsId1bFljnrEM1EErou9eSpmRTCQJ7UDHYLcvM9z/b6ieHpc0xiEvpKnfs1JptEH4V3lU5rcfzw+jEbyF5x4lK1JxlCkC/dWzpinRL0f8RofwWeeHTSl2NmLhyjfAHJZGFMY3JK6Q8dPIx8zrb831m90mpTBxFzn6E0RiZpmXr5JH X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(376002)(396003)(136003)(346002)(230922051799003)(451199024)(64100799003)(82310400011)(186009)(1800799012)(36840700001)(46966006)(40470700004)(40460700003)(107886003)(2616005)(26005)(16526019)(6666004)(336012)(426003)(8676002)(8936002)(4326008)(82740400003)(5660300002)(86362001)(478600001)(316002)(70586007)(70206006)(110136005)(54906003)(36860700001)(83380400001)(7636003)(356005)(47076005)(36756003)(40480700001)(41300700001)(2906002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2023 15:51:48.0901 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 552e08bf-c9e0-49f4-9297-08dbf029ee16 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5792 X-Patchwork-Delegate: kuba@kernel.org The way SFMR is packed differs between the controlled and CFF flood modes. Add an op to dispatch it dynamically. Signed-off-by: Petr Machata Reviewed-by: Amit Cohen Reviewed-by: Ido Schimmel --- drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c index c3f4ce3cf4e7..223716c51401 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c @@ -101,6 +101,8 @@ struct mlxsw_sp_fid_ops { u16 *p_pgt_size); u16 (*fid_mid)(const struct mlxsw_sp_fid *fid, const struct mlxsw_sp_flood_table *flood_table); + void (*fid_pack)(char *sfmr_pl, const struct mlxsw_sp_fid *fid, + enum mlxsw_reg_sfmr_op op); }; struct mlxsw_sp_fid_family { @@ -466,7 +468,8 @@ static int mlxsw_sp_fid_op(const struct mlxsw_sp_fid *fid, bool valid) struct mlxsw_sp *mlxsw_sp = fid->fid_family->mlxsw_sp; char sfmr_pl[MLXSW_REG_SFMR_LEN]; - mlxsw_sp_fid_pack_ctl(sfmr_pl, fid, mlxsw_sp_sfmr_op(valid)); + fid->fid_family->ops->fid_pack(sfmr_pl, fid, + mlxsw_sp_sfmr_op(valid)); return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); } @@ -476,7 +479,9 @@ static int mlxsw_sp_fid_edit_op(const struct mlxsw_sp_fid *fid, struct mlxsw_sp *mlxsw_sp = fid->fid_family->mlxsw_sp; char sfmr_pl[MLXSW_REG_SFMR_LEN]; - mlxsw_sp_fid_pack_ctl(sfmr_pl, fid, MLXSW_REG_SFMR_OP_CREATE_FID); + fid->fid_family->ops->fid_pack(sfmr_pl, fid, + MLXSW_REG_SFMR_OP_CREATE_FID); + mlxsw_reg_sfmr_vv_set(sfmr_pl, fid->vni_valid); mlxsw_reg_sfmr_vni_set(sfmr_pl, be32_to_cpu(fid->vni)); mlxsw_reg_sfmr_vtfp_set(sfmr_pl, fid->nve_flood_index_valid); @@ -1130,6 +1135,7 @@ static const struct mlxsw_sp_fid_ops mlxsw_sp_fid_8021d_ops_ctl = { .flood_table_init = mlxsw_sp_fid_flood_table_init_ctl, .pgt_size = mlxsw_sp_fid_8021d_pgt_size, .fid_mid = mlxsw_sp_fid_fid_mid_ctl, + .fid_pack = mlxsw_sp_fid_pack_ctl, }; #define MLXSW_SP_FID_8021Q_MAX (VLAN_N_VID - 2) @@ -1312,6 +1318,7 @@ static const struct mlxsw_sp_fid_ops mlxsw_sp_fid_rfid_ops_ctl = { .nve_flood_index_set = mlxsw_sp_fid_rfid_nve_flood_index_set, .nve_flood_index_clear = mlxsw_sp_fid_rfid_nve_flood_index_clear, .vid_to_fid_rif_update = mlxsw_sp_fid_rfid_vid_to_fid_rif_update, + .fid_pack = mlxsw_sp_fid_pack_ctl, }; static int mlxsw_sp_fid_dummy_setup(struct mlxsw_sp_fid *fid, const void *arg) @@ -1374,6 +1381,7 @@ static const struct mlxsw_sp_fid_ops mlxsw_sp_fid_dummy_ops = { .vni_clear = mlxsw_sp_fid_dummy_vni_clear, .nve_flood_index_set = mlxsw_sp_fid_dummy_nve_flood_index_set, .nve_flood_index_clear = mlxsw_sp_fid_dummy_nve_flood_index_clear, + .fid_pack = mlxsw_sp_fid_pack, }; static int mlxsw_sp_fid_8021q_configure(struct mlxsw_sp_fid *fid) @@ -1474,6 +1482,7 @@ static const struct mlxsw_sp_fid_ops mlxsw_sp_fid_8021q_ops_ctl = { .flood_table_init = mlxsw_sp_fid_flood_table_init_ctl, .pgt_size = mlxsw_sp_fid_8021d_pgt_size, .fid_mid = mlxsw_sp_fid_fid_mid_ctl, + .fid_pack = mlxsw_sp_fid_pack_ctl, }; /* There are 4K-2 802.1Q FIDs */