| Message ID | f25dc81e-7615-0b51-24cf-e1137f0f9969@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net-next] r8169: rename rtl_csi_access_enable to rtl_set_aspm_entry_latency | expand |
| Context | Check | Description |
|---|---|---|
| netdev/apply | fail | Patch does not apply to net-next |
| netdev/tree_selection | success | Clearly marked for net-next |
On 08.08.2021 15:06, Heiner Kallweit wrote: > Rename the function to reflect what it's doing. Also add a description > of the register values as kindly provided by Realtek. > > Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Just saw that the original patch was applied on net. Therefore this one will apply only once net is merged to net-next. > --- > drivers/net/ethernet/realtek/r8169_main.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c > index 2c643ec36..7a69b4685 100644 > --- a/drivers/net/ethernet/realtek/r8169_main.c > +++ b/drivers/net/ethernet/realtek/r8169_main.c > @@ -2598,7 +2598,7 @@ static u32 rtl_csi_read(struct rtl8169_private *tp, int addr) > RTL_R32(tp, CSIDR) : ~0; > } > > -static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val) > +static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val) > { > struct pci_dev *pdev = tp->pci_dev; > u32 csi; > @@ -2606,6 +2606,8 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val) > /* According to Realtek the value at config space address 0x070f > * controls the L0s/L1 entrance latency. We try standard ECAM access > * first and if it fails fall back to CSI. > + * bit 0..2: L0: 0 = 1us, 1 = 2us .. 6 = 7us, 7 = 7us (no typo) > + * bit 3..5: L1: 0 = 1us, 1 = 2us .. 6 = 64us, 7 = 64us > */ > if (pdev->cfg_size > 0x070f && > pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL) > @@ -2619,7 +2621,8 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val) > > static void rtl_set_def_aspm_entry_latency(struct rtl8169_private *tp) > { > - rtl_csi_access_enable(tp, 0x27); > + /* L0 7us, L1 16us */ > + rtl_set_aspm_entry_latency(tp, 0x27); > } > > struct ephy_info { > @@ -3502,8 +3505,8 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp) > RTL_W8(tp, MCU, RTL_R8(tp, MCU) | EN_NDP | EN_OOB_RESET); > RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN); > > - /* The default value is 0x13. Change it to 0x2f */ > - rtl_csi_access_enable(tp, 0x2f); > + /* L0 7us, L1 32us - needed to avoid issues with link-up detection */ > + rtl_set_aspm_entry_latency(tp, 0x2f); > > rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000); > >
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index 2c643ec36..7a69b4685 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -2598,7 +2598,7 @@ static u32 rtl_csi_read(struct rtl8169_private *tp, int addr) RTL_R32(tp, CSIDR) : ~0; } -static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val) +static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val) { struct pci_dev *pdev = tp->pci_dev; u32 csi; @@ -2606,6 +2606,8 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val) /* According to Realtek the value at config space address 0x070f * controls the L0s/L1 entrance latency. We try standard ECAM access * first and if it fails fall back to CSI. + * bit 0..2: L0: 0 = 1us, 1 = 2us .. 6 = 7us, 7 = 7us (no typo) + * bit 3..5: L1: 0 = 1us, 1 = 2us .. 6 = 64us, 7 = 64us */ if (pdev->cfg_size > 0x070f && pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL) @@ -2619,7 +2621,8 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val) static void rtl_set_def_aspm_entry_latency(struct rtl8169_private *tp) { - rtl_csi_access_enable(tp, 0x27); + /* L0 7us, L1 16us */ + rtl_set_aspm_entry_latency(tp, 0x27); } struct ephy_info { @@ -3502,8 +3505,8 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp) RTL_W8(tp, MCU, RTL_R8(tp, MCU) | EN_NDP | EN_OOB_RESET); RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN); - /* The default value is 0x13. Change it to 0x2f */ - rtl_csi_access_enable(tp, 0x2f); + /* L0 7us, L1 32us - needed to avoid issues with link-up detection */ + rtl_set_aspm_entry_latency(tp, 0x2f); rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000);
Rename the function to reflect what it's doing. Also add a description of the register values as kindly provided by Realtek. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> --- drivers/net/ethernet/realtek/r8169_main.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-)