[v6,0/2] Add support of AMD 3D V-Cache optimizer driver

Message

Basavaraj Natikar Nov. 12, 2024, 5:03 p.m. UTC

AMD 3D V-Cache Technology significantly enhances per-core performance by
increasing the amount of L3 cache available—up to three times compared
to traditional architectures. This large cache allows for quicker access
to frequently used data, minimizing latency and boosting overall
efficiency in tasks that depend heavily on rapid data retrieval.

To fully leverage this technology, the AMD 3D V-Cache Optimizer has been
developed. This patch series introduces two distinct modes: Frequency
mode and Cache mode.

Frequency Mode: In this setting, the optimizer prioritizes boosting the
clock speed of the cores. This is particularly advantageous for
applications and workloads that benefit from higher clock frequencies,
enabling faster processing of tasks that are less reliant on cache size.

Cache Mode: Conversely, this mode focuses on maximizing the usage of the
expanded L3 cache. For workloads that are cache-sensitive—such as
certain gaming applications, data analytics, and other compute-intensive
processes—this mode allows the system to take full advantage of the
increased cache capacity, improving data throughput and reducing
bottlenecks.

Changes in v6:
	- Added error checking for devm_mutex_init.
	- Rebased onto the pxd86/for-next branch.

Changes in v5:
	- Removed the extra line.
	- Added the missing #include directives.
	- Modified the splitting of the line.
	- Changed spaces to tabs.

Changes in v4:
	- Directly returned the result of function.

Changes in v3:
	- Changed the module parameter visibility to 0.
	- Removed the error log message.
	- Removed the error condition that will not be triggered.
	- Protected the data read case.
	- Moved the acpi_check_dsm check before allocation.
	- Added PM operations.

Changes in v2:
	- Used kfree() instead of ACPI_FREE(). 
	- Changed the ternary operator to an if statement.
	- Used acpi_check_dsm().
	- Used devm_mutex_init().
	- Removed acpi_match_device().
	- Removed the string format.

Basavaraj Natikar (2):
  platform/x86/amd: amd_3d_vcache: Add AMD 3D V-Cache optimizer driver
  platform/x86/amd: amd_3d_vcache: Add sysfs ABI documentation

 .../sysfs-bus-platform-drivers-amd_x3d_vcache |  12 ++
 MAINTAINERS                                   |   8 +
 drivers/platform/x86/amd/Kconfig              |  12 ++
 drivers/platform/x86/amd/Makefile             |   2 +
 drivers/platform/x86/amd/x3d_vcache.c         | 176 ++++++++++++++++++
 5 files changed, 210 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache
 create mode 100644 drivers/platform/x86/amd/x3d_vcache.c

Comments

Ilpo Järvinen Nov. 13, 2024, 1:52 p.m. UTC | #1

On Tue, 12 Nov 2024 22:33:05 +0530, Basavaraj Natikar wrote:

> AMD 3D V-Cache Technology significantly enhances per-core performance by
> increasing the amount of L3 cache available—up to three times compared
> to traditional architectures. This large cache allows for quicker access
> to frequently used data, minimizing latency and boosting overall
> efficiency in tasks that depend heavily on rapid data retrieval.
> 
> To fully leverage this technology, the AMD 3D V-Cache Optimizer has been
> developed. This patch series introduces two distinct modes: Frequency
> mode and Cache mode.
> 
> [...]


Thank you for your contribution, it has been applied to my local
review-ilpo branch. Note it will show up in the public
platform-drivers-x86/review-ilpo branch only once I've pushed my
local branch there, which might take a while.

The list of commits applied:
[1/2] platform/x86/amd: amd_3d_vcache: Add AMD 3D V-Cache optimizer driver
      commit: 5a67c0d1c8bdcdba5dff49cfbf0d4c453b827a9d
[2/2] platform/x86/amd: amd_3d_vcache: Add sysfs ABI documentation
      commit: bd17863a708692bbd7a265212daf8a3aa4a3d0b7

--
 i.