| Message ID | 1478768430-13422-2-git-send-email-jui.nee.tan@intel.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Delegated to: | Andy Shevchenko |
| Headers | show |
On Thu, 2016-11-10 at 17:00 +0800, Tan Jui Nee wrote: > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86 devices. > > Signed-off-by: Yong, Jonathan <jonathan.yong@intel.com> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > +int p2sb_bar(struct pci_dev *pdev, unsigned int devfn, > + struct resource *res) > +{ > + u32 base_addr; > + u64 base64_addr; > + unsigned long flags; > + > > + if (!res) > + return -EINVAL; I don't remember the details, one version was quite changed, so, I think these lines are not needed anymore. > + /* Get IO or MMIO BAR */ > + pci_bus_read_config_dword(pdev->bus, devfn, SBREG_BAR, > &base_addr); > + if ((base_addr & PCI_BASE_ADDRESS_SPACE) == > PCI_BASE_ADDRESS_SPACE_IO) { > + flags = IORESOURCE_IO; > + base64_addr = base_addr & PCI_BASE_ADDRESS_IO_MASK; > + } else { > + flags = IORESOURCE_MEM; > + base64_addr = base_addr & PCI_BASE_ADDRESS_MEM_MASK; > + if (base_addr & PCI_BASE_ADDRESS_MEM_TYPE_64) { > + flags |= IORESOURCE_MEM_64; > > + pci_bus_read_config_dword(pdev->bus, devfn, > + SBREG_BAR + 4, &base_addr); Fix indentation. > + base64_addr |= (u64)base_addr << 32; > + } > + } > + > + /* Hide the P2SB device */ > + pci_bus_write_config_byte(pdev->bus, devfn, SBREG_HIDE, > 0x01); > + > + spin_unlock(&p2sb_spinlock); > + > + /* User provides prefilled resources */ Not anymore as far I as I can see. You just return here the result. > + res->start = (resource_size_t)base64_addr; > + res->flags = flags;
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diff --git a/arch/x86/include/asm/p2sb.h b/arch/x86/include/asm/p2sb.h new file mode 100644 index 0000000..686e07b --- /dev/null +++ b/arch/x86/include/asm/p2sb.h @@ -0,0 +1,27 @@ +/* + * Primary to Sideband bridge (P2SB) access support + */ + +#ifndef P2SB_SYMS_H +#define P2SB_SYMS_H + +#include <linux/ioport.h> +#include <linux/pci.h> + +#if IS_ENABLED(CONFIG_P2SB) + +int p2sb_bar(struct pci_dev *pdev, unsigned int devfn, + struct resource *res); + +#else /* CONFIG_P2SB is not set */ + +static inline +int p2sb_bar(struct pci_dev *pdev, unsigned int devfn, + struct resource *res) +{ + return -ENODEV; +} + +#endif /* CONFIG_P2SB */ + +#endif /* P2SB_SYMS_H */ diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index b8a21d7..65ef6a0 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -1027,4 +1027,8 @@ config INTEL_TELEMETRY used to get various SoC events and parameters directly via debugfs files. Various tools may use this interface for SoC state monitoring. + +config P2SB + tristate + depends on PCI endif # X86_PLATFORM_DEVICES diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile index 2efa86d..c39a13d 100644 --- a/drivers/platform/x86/Makefile +++ b/drivers/platform/x86/Makefile @@ -71,3 +71,4 @@ obj-$(CONFIG_INTEL_TELEMETRY) += intel_telemetry_core.o \ intel_telemetry_pltdrv.o \ intel_telemetry_debugfs.o obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o +obj-$(CONFIG_P2SB) += p2sb.o diff --git a/drivers/platform/x86/p2sb.c b/drivers/platform/x86/p2sb.c new file mode 100644 index 0000000..b1d784c --- /dev/null +++ b/drivers/platform/x86/p2sb.c @@ -0,0 +1,98 @@ +/* + * Primary to Sideband bridge (P2SB) driver + * + * Copyright (c) 2016, Intel Corporation. + * + * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com> + * Jonathan Yong <jonathan.yong@intel.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#include <linux/ioport.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/spinlock.h> + +#include <asm/p2sb.h> + +#define SBREG_BAR 0x10 +#define SBREG_HIDE 0xe1 + +static DEFINE_SPINLOCK(p2sb_spinlock); + +/* + * p2sb_bar - Get Primary to Sideband bridge (P2SB) BAR + * @pdev: PCI device to get PCI bus to communicate with + * @devfn: PCI device and function to communicate with + * @res: resources to be filled in + * + * The BIOS prevents the P2SB device from being enumerated by the PCI + * subsystem, so we need to unhide and hide it back to lookup the P2SB BAR. + * + * Locking is handled by spinlock - cannot sleep. + * + * Return: + * 0 on success or appropriate errno value on error. + */ +int p2sb_bar(struct pci_dev *pdev, unsigned int devfn, + struct resource *res) +{ + u32 base_addr; + u64 base64_addr; + unsigned long flags; + + if (!res) + return -EINVAL; + + spin_lock(&p2sb_spinlock); + + /* Unhide the P2SB device */ + pci_bus_write_config_byte(pdev->bus, devfn, SBREG_HIDE, 0x00); + + /* Check if device present */ + pci_bus_read_config_dword(pdev->bus, devfn, 0, &base_addr); + if (base_addr == 0xffffffff || base_addr == 0x00000000) { + spin_unlock(&p2sb_spinlock); + dev_warn(&pdev->dev, "P2SB device access disabled by BIOS?\n"); + return -ENODEV; + } + + /* Get IO or MMIO BAR */ + pci_bus_read_config_dword(pdev->bus, devfn, SBREG_BAR, &base_addr); + if ((base_addr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) { + flags = IORESOURCE_IO; + base64_addr = base_addr & PCI_BASE_ADDRESS_IO_MASK; + } else { + flags = IORESOURCE_MEM; + base64_addr = base_addr & PCI_BASE_ADDRESS_MEM_MASK; + if (base_addr & PCI_BASE_ADDRESS_MEM_TYPE_64) { + flags |= IORESOURCE_MEM_64; + pci_bus_read_config_dword(pdev->bus, devfn, + SBREG_BAR + 4, &base_addr); + base64_addr |= (u64)base_addr << 32; + } + } + + /* Hide the P2SB device */ + pci_bus_write_config_byte(pdev->bus, devfn, SBREG_HIDE, 0x01); + + spin_unlock(&p2sb_spinlock); + + /* User provides prefilled resources */ + res->start = (resource_size_t)base64_addr; + res->flags = flags; + + return 0; +} +EXPORT_SYMBOL_GPL(p2sb_bar); + +MODULE_LICENSE("GPL v2");