From patchwork Sat Jul 8 00:02:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Basehore X-Patchwork-Id: 9831221 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 01B2760352 for ; Sat, 8 Jul 2017 00:03:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC20F28578 for ; Sat, 8 Jul 2017 00:03:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CEA942858E; Sat, 8 Jul 2017 00:03:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 876C028578 for ; Sat, 8 Jul 2017 00:03:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751916AbdGHADT (ORCPT ); Fri, 7 Jul 2017 20:03:19 -0400 Received: from mail-pf0-f170.google.com ([209.85.192.170]:35156 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751785AbdGHADS (ORCPT ); Fri, 7 Jul 2017 20:03:18 -0400 Received: by mail-pf0-f170.google.com with SMTP id c73so23901855pfk.2 for ; Fri, 07 Jul 2017 17:03:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=qcWPwW75tnWAcpfBfj49b0dZTQFpFGeLM85g4O30HSU=; b=NbRnqaDCTKP4bD/1DF6duGNrSYwEPDnr1gR2iNudpVVvyD93bGM9S5Rx51NNYgrYxD ckAkIhvVRyfLgR3fGU8oAfT761yPioJgep4hiUq9vpZqRU0J6E6xejCyw1tn9dL5SiqN wkniS1QOClsv0ARS75pzi3Qhwz+UG9Cv9xn9U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=qcWPwW75tnWAcpfBfj49b0dZTQFpFGeLM85g4O30HSU=; b=aII8PAuNvDIUTkm03Syd5uIBCqy4quHwhdG/nCflGHhpsqWI5pQatJVRQ/mFpu2Nmc AcB6eNd4f17mb/AW64ueEV++JEkebyukJ1ZBCvStPIk4C0RtjHWC03lfMjcWvt0thy95 jGnTbVbv3R30gCJx9fG6rT27eSqndfITPCo0zCd3fsChr4mxrdVu1mG0a8+6PLMGe0Eo C21J+RK8r7xJ4CxDMJGH8ejRu+FAztNOHzw1PCZgOg5yDiO1dLlMM+5zm+jQNA1gk4gH 8FfnrXDmsxSNh3Y1mFTrGvww0f6OAL3WQf/tJCyY225w0dnRfEzi1N1vHqA7UhzqjKeT j13Q== X-Gm-Message-State: AIVw110GD/E0ZmHJpo5jZ2EZKLIEfGTNsd/lHbKlCjXtRJnQ063+Xf4e 7gu4Ul0LQLNduvmB X-Received: by 10.84.198.129 with SMTP id p1mr5690175pld.120.1499472198238; Fri, 07 Jul 2017 17:03:18 -0700 (PDT) Received: from ketosis.mtv.corp.google.com ([172.22.65.104]) by smtp.gmail.com with ESMTPSA id p11sm10026278pfk.128.2017.07.07.17.03.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 07 Jul 2017 17:03:17 -0700 (PDT) From: Derek Basehore To: linux-kernel@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Rajneesh Bhardwaj , x86@kernel.org, platform-driver-x86@vger.kernel.org, "Rafael J . Wysocki" , Len Brown , linux-pm@vger.kernel.org, Derek Basehore Subject: [PATCH v5 1/5] x86: stub out pmc function Date: Fri, 7 Jul 2017 17:02:59 -0700 Message-Id: <20170708000303.21863-1-dbasehore@chromium.org> X-Mailer: git-send-email 2.13.2.725.g09c95d1e9-goog Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This creates an inline function of intel_pmc_slp_s0_counter_read for !CONFIG_INTEL_PMC_CORE. Signed-off-by: Derek Basehore --- arch/x86/include/asm/pmc_core.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/pmc_core.h b/arch/x86/include/asm/pmc_core.h index d4855f11136d..5d142d915f30 100644 --- a/arch/x86/include/asm/pmc_core.h +++ b/arch/x86/include/asm/pmc_core.h @@ -22,6 +22,10 @@ #define _ASM_PMC_CORE_H /* API to read SLP_S0_RESIDENCY counter */ -int intel_pmc_slp_s0_counter_read(u32 *data); +#ifdef CONFIG_INTEL_PMC_CORE +extern int intel_pmc_slp_s0_counter_read(u32 *data); +#else +static inline int intel_pmc_slp_s0_counter_read(u32 *data) { return -EPERM; } +#endif #endif /* _ASM_PMC_CORE_H */