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[06/10] x86/cpu: Add Icelake to Intel family

Message ID 20190201073234.13280-7-rajneesh.bhardwaj@linux.intel.com (mailing list archive)
State Superseded, archived
Delegated to: Andy Shevchenko
Headers show
Series ICL support and other enhancements for PMC Core | expand

Commit Message

Bhardwaj, Rajneesh Feb. 1, 2019, 7:32 a.m. UTC
Add CPUID of Icelake (ICL) mobile processors to Intel family list. The
Information related to ICL CPUID is referenced from below Coreboot
project link.

https://github.com/coreboot/coreboot/blob/5ebcea3aaaa3cd358bc5bccaa156b13a6ef25df6/src/soc/intel/common/block/include/intelblocks/mp_init.h

Cc: x86@kernel.org
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: "David E. Box" <david.e.box@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
---
 arch/x86/include/asm/intel-family.h | 2 ++
 1 file changed, 2 insertions(+)

Comments

Thomas Gleixner Feb. 4, 2019, 5:34 p.m. UTC | #1
On Fri, 1 Feb 2019, Rajneesh Bhardwaj wrote:

> Add CPUID of Icelake (ICL) mobile processors to Intel family list. The
> Information related to ICL CPUID is referenced from below Coreboot
> project link.
> 
> https://github.com/coreboot/coreboot/blob/5ebcea3aaaa3cd358bc5bccaa156b13a6ef25df6/src/soc/intel/common/block/include/intelblocks/mp_init.h

Coreboot files are hardly authoritive information about CPUIDs.

> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> index 0dd6b0f4000e..12b65bdb3d80 100644
> --- a/arch/x86/include/asm/intel-family.h
> +++ b/arch/x86/include/asm/intel-family.h
> @@ -52,6 +52,8 @@
>  
>  #define INTEL_FAM6_CANNONLAKE_MOBILE	0x66
>  
> +#define INTEL_FAM6_ICELAKE_MOBILE       0x7E

Please use TABs instead of a random number of spaces.

Thanks,

	tglx
Bhardwaj, Rajneesh Feb. 5, 2019, 3:51 a.m. UTC | #2
On 04-Feb-19 11:04 PM, Thomas Gleixner wrote:
> On Fri, 1 Feb 2019, Rajneesh Bhardwaj wrote:
>
>> Add CPUID of Icelake (ICL) mobile processors to Intel family list. The
>> Information related to ICL CPUID is referenced from below Coreboot
>> project link.
>>
>> https://github.com/coreboot/coreboot/blob/5ebcea3aaaa3cd358bc5bccaa156b13a6ef25df6/src/soc/intel/common/block/include/intelblocks/mp_init.h
> Coreboot files are hardly authoritive information about CPUIDs.

It may take a while for it to be published in the SDMs.

>
>> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
>> index 0dd6b0f4000e..12b65bdb3d80 100644
>> --- a/arch/x86/include/asm/intel-family.h
>> +++ b/arch/x86/include/asm/intel-family.h
>> @@ -52,6 +52,8 @@
>>   
>>   #define INTEL_FAM6_CANNONLAKE_MOBILE	0x66
>>   
>> +#define INTEL_FAM6_ICELAKE_MOBILE       0x7E
> Please use TABs instead of a random number of spaces.

Sure, I will fix this.

>
> Thanks,
>
> 	tglx
diff mbox series

Patch

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 0dd6b0f4000e..12b65bdb3d80 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -52,6 +52,8 @@ 
 
 #define INTEL_FAM6_CANNONLAKE_MOBILE	0x66
 
+#define INTEL_FAM6_ICELAKE_MOBILE       0x7E
+
 /* "Small Core" Processors (Atom) */
 
 #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */