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[v3,1/5] x86/cpu: Add Icelake to Intel family

Message ID 20190214115712.19642-2-rajneesh.bhardwaj@linux.intel.com (mailing list archive)
State Accepted, archived
Delegated to: Andy Shevchenko
Headers show
Series ICL support and other enhancements for PMC Core | expand

Commit Message

Bhardwaj, Rajneesh Feb. 14, 2019, 11:57 a.m. UTC
Add CPUID of Icelake (ICL) mobile processors to Intel family list.
Icelake U/Y series uses model no 0x7E. Public documentation related to
it is not available yet but this information is correct as per my
understanding.

Cc: x86@kernel.org
Cc: Borislav Petkov <bp@alien8.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: "David E. Box" <david.e.box@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
---
 arch/x86/include/asm/intel-family.h | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 0dd6b0f4000e..058b1a1994c4 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -52,6 +52,8 @@ 
 
 #define INTEL_FAM6_CANNONLAKE_MOBILE	0x66
 
+#define INTEL_FAM6_ICELAKE_MOBILE	0x7E
+
 /* "Small Core" Processors (Atom) */
 
 #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */