Message ID | 20210922213007.2738388-2-david.e.box@linux.intel.com (mailing list archive) |
---|---|
State | Deferred, archived |
Headers | show |
Series | Add general DVSEC/VSEC support | expand |
If you repost this for any reason, update the subject to: s/PCIE/PCIe/ So it matches the commit log and other usage in drivers/pci/ On Wed, Sep 22, 2021 at 02:30:03PM -0700, David E. Box wrote: > Add #defines for accessing Vendor ID, Revision, Length, and ID offsets > in the Designated Vendor Specific Extended Capability (DVSEC). Defined > in PCIe r5.0, sec 7.9.6. > > Signed-off-by: David E. Box <david.e.box@linux.intel.com> > Acked-by: Bjorn Helgaas <bhelgaas@google.com> > --- > > v3: No change > > include/uapi/linux/pci_regs.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h > index e709ae8235e7..57ee51f19283 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -1080,7 +1080,11 @@ > > /* Designated Vendor-Specific (DVSEC, PCI_EXT_CAP_ID_DVSEC) */ > #define PCI_DVSEC_HEADER1 0x4 /* Designated Vendor-Specific Header1 */ > +#define PCI_DVSEC_HEADER1_VID(x) ((x) & 0xffff) > +#define PCI_DVSEC_HEADER1_REV(x) (((x) >> 16) & 0xf) > +#define PCI_DVSEC_HEADER1_LEN(x) (((x) >> 20) & 0xfff) > #define PCI_DVSEC_HEADER2 0x8 /* Designated Vendor-Specific Header2 */ > +#define PCI_DVSEC_HEADER2_ID(x) ((x) & 0xffff) > > /* Data Link Feature */ > #define PCI_DLF_CAP 0x04 /* Capabilities Register */ > -- > 2.25.1 >
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index e709ae8235e7..57ee51f19283 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -1080,7 +1080,11 @@ /* Designated Vendor-Specific (DVSEC, PCI_EXT_CAP_ID_DVSEC) */ #define PCI_DVSEC_HEADER1 0x4 /* Designated Vendor-Specific Header1 */ +#define PCI_DVSEC_HEADER1_VID(x) ((x) & 0xffff) +#define PCI_DVSEC_HEADER1_REV(x) (((x) >> 16) & 0xf) +#define PCI_DVSEC_HEADER1_LEN(x) (((x) >> 20) & 0xfff) #define PCI_DVSEC_HEADER2 0x8 /* Designated Vendor-Specific Header2 */ +#define PCI_DVSEC_HEADER2_ID(x) ((x) & 0xffff) /* Data Link Feature */ #define PCI_DLF_CAP 0x04 /* Capabilities Register */