diff mbox series

[1/2] platform/x86/amd/pmc: Add PMFW command id to support S2D force flush

Message ID 20230828152134.4120496-1-Shyam-sundar.S-k@amd.com (mailing list archive)
State Superseded, archived
Headers show
Series [1/2] platform/x86/amd/pmc: Add PMFW command id to support S2D force flush | expand

Commit Message

Shyam Sundar S K Aug. 28, 2023, 3:21 p.m. UTC 
Recent PMFW have the capability that can force flush the FIFO
contents to DRAM on sending a command id via the mailbox. Add this support
to the driver.

Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
---
v1->v2:
 - rebase to 'review-hans' branch
 - drop 2/4 of v1
   (https://patchwork.kernel.org/project/platform-driver-x86/list/?series=775324&state=%2A&archive=both)

 drivers/platform/x86/amd/pmc/pmc.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

Mario Limonciello Aug. 28, 2023, 7:17 p.m. UTC | #1 
On 8/28/2023 10:21, Shyam Sundar S K wrote:
> Recent PMFW have the capability that can force flush the FIFO
> contents to DRAM on sending a command id via the mailbox. Add this support
> to the driver.
> 
> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
> v1->v2:
>   - rebase to 'review-hans' branch
>   - drop 2/4 of v1
>     (https://patchwork.kernel.org/project/platform-driver-x86/list/?series=775324&state=%2A&archive=both)
> 
>   drivers/platform/x86/amd/pmc/pmc.c | 9 ++++++++-
>   1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c
> index c1e788b67a74..c92dd5077a16 100644
> --- a/drivers/platform/x86/amd/pmc/pmc.c
> +++ b/drivers/platform/x86/amd/pmc/pmc.c
> @@ -55,6 +55,9 @@
>   #define S2D_TELEMETRY_BYTES_MAX		0x100000
>   #define S2D_TELEMETRY_DRAMBYTES_MAX	0x1000000
>   
> +/* STB Spill to DRAM Message Definition */
> +#define STB_FORCE_FLUSH_DATA		0xCF
> +
>   /* Base address of SMU for mapping physical address to virtual address */
>   #define AMD_PMC_MAPPING_SIZE		0x01000
>   #define AMD_PMC_BASE_ADDR_OFFSET	0x10000
> @@ -236,7 +239,7 @@ static const struct file_operations amd_pmc_stb_debugfs_fops = {
>   static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
>   {
>   	struct amd_pmc_dev *dev = filp->f_inode->i_private;
> -	u32 *buf, fsize, num_samples, stb_rdptr_offset = 0;
> +	u32 *buf, fsize, num_samples, val, stb_rdptr_offset = 0;
>   	int ret;
>   
>   	/* Write dummy postcode while reading the STB buffer */
> @@ -251,6 +254,10 @@ static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
>   	/* Spill to DRAM num_samples uses separate SMU message port */
>   	dev->msg_port = 1;
>   
> +	ret = amd_pmc_send_cmd(dev, 0, &val, STB_FORCE_FLUSH_DATA, 1);
> +	if (ret)
> +		dev_warn_once(dev->dev, "S2D force flush not supported\n");
> +

As this is only supported by some PMFW versions, isn't this message 
going to be pretty noisy if it's used on something older?

As it's not critical I think it can go down to dbg, and you should also 
add ": %d, ret)" so that we can confirm what error code if something 
ever goes wrong with this in the future.

>   	/* Get the num_samples to calculate the last push location */
>   	ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->s2d_msg_id, true);
>   	/* Clear msg_port for other SMU operation */
Shyam Sundar S K Aug. 29, 2023, 3:56 a.m. UTC | #2 
On 8/29/2023 12:47 AM, Mario Limonciello wrote:
> On 8/28/2023 10:21, Shyam Sundar S K wrote:
>> Recent PMFW have the capability that can force flush the FIFO
>> contents to DRAM on sending a command id via the mailbox. Add this
>> support
>> to the driver.
>>
>> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
>> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
>> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
>> ---
>> v1->v2:
>>   - rebase to 'review-hans' branch
>>   - drop 2/4 of v1
>>    
>> (https://patchwork.kernel.org/project/platform-driver-x86/list/?series=775324&state=%2A&archive=both)
>>
>>
>>   drivers/platform/x86/amd/pmc/pmc.c | 9 ++++++++-
>>   1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/platform/x86/amd/pmc/pmc.c
>> b/drivers/platform/x86/amd/pmc/pmc.c
>> index c1e788b67a74..c92dd5077a16 100644
>> --- a/drivers/platform/x86/amd/pmc/pmc.c
>> +++ b/drivers/platform/x86/amd/pmc/pmc.c
>> @@ -55,6 +55,9 @@
>>   #define S2D_TELEMETRY_BYTES_MAX        0x100000
>>   #define S2D_TELEMETRY_DRAMBYTES_MAX    0x1000000
>>   +/* STB Spill to DRAM Message Definition */
>> +#define STB_FORCE_FLUSH_DATA        0xCF
>> +
>>   /* Base address of SMU for mapping physical address to virtual
>> address */
>>   #define AMD_PMC_MAPPING_SIZE        0x01000
>>   #define AMD_PMC_BASE_ADDR_OFFSET    0x10000
>> @@ -236,7 +239,7 @@ static const struct file_operations
>> amd_pmc_stb_debugfs_fops = {
>>   static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct
>> file *filp)
>>   {
>>       struct amd_pmc_dev *dev = filp->f_inode->i_private;
>> -    u32 *buf, fsize, num_samples, stb_rdptr_offset = 0;
>> +    u32 *buf, fsize, num_samples, val, stb_rdptr_offset = 0;
>>       int ret;
>>         /* Write dummy postcode while reading the STB buffer */
>> @@ -251,6 +254,10 @@ static int amd_pmc_stb_debugfs_open_v2(struct
>> inode *inode, struct file *filp)
>>       /* Spill to DRAM num_samples uses separate SMU message port */
>>       dev->msg_port = 1;
>>   +    ret = amd_pmc_send_cmd(dev, 0, &val, STB_FORCE_FLUSH_DATA, 1);
>> +    if (ret)
>> +        dev_warn_once(dev->dev, "S2D force flush not supported\n");
>> +
> 
> As this is only supported by some PMFW versions, isn't this message

I believe this is going to be supported all the new PMFW version, but
yes its going to be noisy.

I have dropped to dbg and sent v3.

btw, I missed to add --subject-prefix to my v2 submission, apologies.


> going to be pretty noisy if it's used on something older?
> 
> As it's not critical I think it can go down to dbg, and you should also
> add ": %d, ret)" so that we can confirm what error code if something
> ever goes wrong with this in the future.
> 
>>       /* Get the num_samples to calculate the last push location */
>>       ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples,
>> dev->s2d_msg_id, true);
>>       /* Clear msg_port for other SMU operation */
>
diff mbox series

Patch

diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c
index c1e788b67a74..c92dd5077a16 100644
--- a/drivers/platform/x86/amd/pmc/pmc.c
+++ b/drivers/platform/x86/amd/pmc/pmc.c
@@ -55,6 +55,9 @@ 
 #define S2D_TELEMETRY_BYTES_MAX		0x100000
 #define S2D_TELEMETRY_DRAMBYTES_MAX	0x1000000
 
+/* STB Spill to DRAM Message Definition */
+#define STB_FORCE_FLUSH_DATA		0xCF
+
 /* Base address of SMU for mapping physical address to virtual address */
 #define AMD_PMC_MAPPING_SIZE		0x01000
 #define AMD_PMC_BASE_ADDR_OFFSET	0x10000
@@ -236,7 +239,7 @@  static const struct file_operations amd_pmc_stb_debugfs_fops = {
 static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
 {
 	struct amd_pmc_dev *dev = filp->f_inode->i_private;
-	u32 *buf, fsize, num_samples, stb_rdptr_offset = 0;
+	u32 *buf, fsize, num_samples, val, stb_rdptr_offset = 0;
 	int ret;
 
 	/* Write dummy postcode while reading the STB buffer */
@@ -251,6 +254,10 @@  static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp)
 	/* Spill to DRAM num_samples uses separate SMU message port */
 	dev->msg_port = 1;
 
+	ret = amd_pmc_send_cmd(dev, 0, &val, STB_FORCE_FLUSH_DATA, 1);
+	if (ret)
+		dev_warn_once(dev->dev, "S2D force flush not supported\n");
+
 	/* Get the num_samples to calculate the last push location */
 	ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->s2d_msg_id, true);
 	/* Clear msg_port for other SMU operation */