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[4/7] platform/x86:intel/pmt: Get PMC from SSRAM for available platforms

Message ID 20240809204648.1124545-5-xi.pardee@linux.intel.com (mailing list archive)
State Changes Requested, archived
Headers show
Series Create Intel PMC SSRAM Telemetry driver | expand

Commit Message

Xi Pardee Aug. 9, 2024, 8:46 p.m. UTC 
Add support to discover and achieve PMC information from Intel
SSRAM Telemetry driver for Meteor Lake, Lunar Lake and Arror Lake
platforms.

Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
 drivers/platform/x86/intel/pmc/arl.c  | 34 +++++++++++++++++++++++----
 drivers/platform/x86/intel/pmc/core.h |  3 +++
 drivers/platform/x86/intel/pmc/lnl.c  | 26 ++++++++++++++++----
 drivers/platform/x86/intel/pmc/mtl.c  | 34 +++++++++++++++++++++++----
 4 files changed, 85 insertions(+), 12 deletions(-)
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Patch

diff --git a/drivers/platform/x86/intel/pmc/arl.c b/drivers/platform/x86/intel/pmc/arl.c
index 4b824612f355..7a340b8c7b6a 100644
--- a/drivers/platform/x86/intel/pmc/arl.c
+++ b/drivers/platform/x86/intel/pmc/arl.c
@@ -640,6 +640,22 @@  const struct pmc_reg_map arl_pchs_reg_map = {
 	.etr3_offset = ETR3_OFFSET,
 };
 
+static struct pmc_info arl_pmc_info_list[] = {
+	{
+		.devid	= PMC_DEVID_MTL_IOEP,
+		.map	= &mtl_ioep_reg_map,
+	},
+	{
+		.devid	= PMC_DEVID_ARL_SOCS,
+		.map	= &arl_socs_reg_map,
+	},
+	{
+		.devid	= PMC_DEVID_ARL_PCHS,
+		.map	= &arl_pchs_reg_map,
+	},
+	{}
+};
+
 #define ARL_NPU_PCI_DEV			0xad1d
 #define ARL_GNA_PCI_DEV			0xae4c
 /*
@@ -669,10 +685,20 @@  int arl_core_init(struct pmc_dev *pmcdev)
 	pmcdev->suspend = cnl_suspend;
 	pmcdev->resume = arl_resume;
 
-	pmc->map = &arl_socs_reg_map;
-	ret = get_primary_reg_base(pmc);
-	if (ret)
-		return ret;
+	pmcdev->regmap_list = arl_pmc_info_list;
+	ret = pmc_core_ssram_get_reg_base(pmcdev);
+
+	/* Try again later after Intel PMC SSRAM Telemetry driver finishes probe */
+	if (ret == -EAGAIN)
+		return -EPROBE_DEFER;
+
+	/* If regbase not assigned, set map and discover using legacy method */
+	if (ret) {
+		pmc->map = &arl_socs_reg_map;
+		ret = get_primary_reg_base(pmc);
+		if (ret)
+			return ret;
+	}
 
 	pmc_core_get_low_power_modes(pmcdev);
 	pmc_core_punit_pmt_init(pmcdev, ARL_PMT_DMU_GUID);
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index 890caf558307..07f8c3070ab9 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -288,9 +288,12 @@  enum ppfear_regs {
 /* SSRAM PMC Device ID*/
 /* ARL */
 #define PMC_DEVID_ARL_SOCS	0xae7f
+#define PMC_DEVID_ARL_PCHS	0x7f27
 
 /* MTL */
 #define PMC_DEVID_MTL_SOCM	0x7e7f
+#define PMC_DEVID_MTL_IOEP	0x7ecf
+#define PMC_DEVID_MTL_IOEM	0x7ebf
 
 /* LNL */
 #define PMC_DEVID_LNL_SOCM	0xa87f
diff --git a/drivers/platform/x86/intel/pmc/lnl.c b/drivers/platform/x86/intel/pmc/lnl.c
index e7a8077d1a3e..109b08d43fc8 100644
--- a/drivers/platform/x86/intel/pmc/lnl.c
+++ b/drivers/platform/x86/intel/pmc/lnl.c
@@ -13,6 +13,14 @@ 
 
 #include "core.h"
 
+static struct pmc_info lnl_pmc_info_list[] = {
+	{
+		.devid	= PMC_DEVID_LNL_SOCM,
+		.map	= &lnl_socm_reg_map,
+	},
+	{}
+};
+
 const struct pmc_bit_map lnl_ltr_show_map[] = {
 	{"SOUTHPORT_A",		CNP_PMC_LTR_SPA},
 	{"SOUTHPORT_B",		CNP_PMC_LTR_SPB},
@@ -561,10 +569,20 @@  int lnl_core_init(struct pmc_dev *pmcdev)
 	pmcdev->suspend = cnl_suspend;
 	pmcdev->resume = lnl_resume;
 
-	pmc->map = &lnl_socm_reg_map;
-	ret = get_primary_reg_base(pmc);
-	if (ret)
-		return ret;
+	pmcdev->regmap_list = lnl_pmc_info_list;
+	ret = pmc_core_ssram_get_reg_base(pmcdev);
+
+	/* Try again later after Intel PMC SSRAM Telemetry driver finishes probe */
+	if (ret == -EAGAIN)
+		return -EPROBE_DEFER;
+
+	/* If regbase not assigned, set map and discover using legacy method */
+	if (ret) {
+		pmc->map = &lnl_socm_reg_map;
+		ret = get_primary_reg_base(pmc);
+		if (ret)
+			return ret;
+	}
 
 	pmc_core_get_low_power_modes(pmcdev);
 
diff --git a/drivers/platform/x86/intel/pmc/mtl.c b/drivers/platform/x86/intel/pmc/mtl.c
index 0b9efab21d60..86f8c2a24825 100644
--- a/drivers/platform/x86/intel/pmc/mtl.c
+++ b/drivers/platform/x86/intel/pmc/mtl.c
@@ -936,6 +936,22 @@  const struct pmc_reg_map mtl_ioem_reg_map = {
 	.lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET,
 };
 
+static struct pmc_info mtl_pmc_info_list[] = {
+	{
+		.devid	= PMC_DEVID_MTL_SOCM,
+		.map	= &mtl_socm_reg_map,
+	},
+	{
+		.devid	= PMC_DEVID_MTL_IOEP,
+		.map	= &mtl_ioep_reg_map,
+	},
+	{
+		.devid	= PMC_DEVID_MTL_IOEM,
+		.map	= &mtl_ioem_reg_map
+	},
+	{}
+};
+
 #define MTL_GNA_PCI_DEV	0x7e4c
 #define MTL_IPU_PCI_DEV	0x7d19
 #define MTL_VPU_PCI_DEV	0x7d1d
@@ -968,10 +984,20 @@  int mtl_core_init(struct pmc_dev *pmcdev)
 	pmcdev->suspend = cnl_suspend;
 	pmcdev->resume = mtl_resume;
 
-	pmc->map = &mtl_socm_reg_map;
-	ret = get_primary_reg_base(pmc);
-	if (ret)
-		return ret;
+	pmcdev->regmap_list = mtl_pmc_info_list;
+	ret = pmc_core_ssram_get_reg_base(pmcdev);
+
+	/* Try again later after Intel PMC SSRAM Telemetry driver finishes probe */
+	if (ret == -EAGAIN)
+		return -EPROBE_DEFER;
+
+	/* If regbase not assigned, set map and discover using legacy method */
+	if (ret) {
+		pmc->map = &mtl_socm_reg_map;
+		ret = get_primary_reg_base(pmc);
+		if (ret)
+			return ret;
+	}
 
 	pmc_core_get_low_power_modes(pmcdev);
 	pmc_core_punit_pmt_init(pmcdev, MTL_PMT_DMU_GUID);