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Shenoy" , "Mario Limonciello" , Perry Yuan , , , , , "Shyam Sundar S K" Subject: [PATCH v5 03/13] x86/cpufeatures: add X86_FEATURE_AMD_WORKLOAD_CLASS feature bit Date: Sun, 27 Oct 2024 21:02:41 -0500 Message-ID: <20241028020251.8085-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241028020251.8085-1-mario.limonciello@amd.com> References: <20241028020251.8085-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6F:EE_|SA3PR12MB7877:EE_ X-MS-Office365-Filtering-Correlation-Id: 0f4d552b-0209-4085-dc6a-08dcf6f4ae90 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: xqGrxs/kE32ewap0LALrv5laYvqf8awISVXa85tnAcbmGVC9oK6r6xJtEndlw38EMLYdSUZ+upT9ZYVosrY9+O34p1R+Mqy/iRHYJxTIqEzSqwX8ncKdR4SGs8JFPu3LBxJnE2upHXHJbw6VdQRHNA3CP4209CnMMJHk2nX02XlCISjnYsbizjreO3hg/SVAzWY2tD6hzggF1w1nObVQxxEBmQhdXnqVF23jYQtZ3PgXVgY0LZ5He/MrOSsMNJ7poBRwSfqOjEwz+Lpiz0+SuTdnaz9BYonbbWVvj73oHWiIiLxfx4CFmtwC0EG3+fNBy5195kpNCI7fTBBdq79hPl3kxK72Rbtpxb8k7vvsOOsLtm3OHkUu1mdEDCZk16COA0TcQr1uRumpnAo/zzRIIIX1JUw+N9iNM3bBOhJoSY+JICV42XDYMmjT0qe7Wt/3FUYbg/5Z6UjX3wTsVp23Ms0gNqlMeBZ7denuPa12omKv2cGeknlNFx/8UlAmxeWRKwcjlLxUPX+3yQ3o8nErfCWnZgH+kMR7HHu9VN/bYX7I3//UuYECQNWfd7+hbxSg3RUhgmMkVTp48KIwcKOF1e9sZyy0lvZVZeUHTcbhEVBXPxFQYNjDtqHvhWVfuEGjC3fCytsHkLvFRVDCWOX/0HnAsN3cbaDmtgmcKJ/VAOlkMhoEIi9gV1ElpVgqx6+1BSXleMyHiGt+cKaQ1K7Vn+P9hwO/JNAUETVdNo0pUSrtYJa5YhoOtC5cXmh61s91RacVlZxK029rL+RgrZ8C8FGLSQvZ5x7q7aupJOrWyKkItbfkn3EGt/L/iNtYNggwnE2WHZnDdMNTZJNwoxcOkGfpQH07rE3tacNTKpvBpZpFH3++R+mu/3R8jg7aq4uB58mfJqRd+X/9kS3P1YPmBNbbIfxgP6kmvQmmA50tT4mBigvtQ90GM/IUSOLLSn5P4ps8CcnT9q+t60B/rizEAyHHqKzikVShq5M180YC45IrJNPG2uF9NfYFbbAvUaC4nSiOCGxMgq6DoG4qnLr+MTiELv0bSDmYEP/5XsCqROL5cmKcLksGeTDyja4riaslX4rs9YP3jGsz0SYoynI/fu4fn0vEhZwbqyqJ3rOJXLZNrYms4eHO9GPQ6VgMPoxcNpSihv7MR8oH/9V15PT7Sa4SMdStT/WFZJ4KpnNlNeMV5MRJiKlw9B749xMJ9UidXhcDIfsxQA4gLzRBOF0U0XXVOi2MkvAXhImVk41rJKgxVbw7vle/+RkA9KnGdGDF7ZsdtizeCr0I90qvfWaa8wFKZCExpFlRvvf4uN+MewGZbW7VnqhdiYGosILwXcSAVRh7ZVbtqu4SXDQZIEkjrb/kqLH11ud/VFI4sG43ac65oWp23f66iF09wOpXzNoWo619ERRlTNqCfAYGue4Wrg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2024 02:03:14.0325 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0f4d552b-0209-4085-dc6a-08dcf6f4ae90 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7877 From: Perry Yuan Add new feature bit that indicates support for workload based heuristic feedback to OS for scheduling decisions. When the bit set, threads are classified during runtime into enumerated classes. The classes represent thread performance/power characteristics that may benefit from special scheduling behaviors. Reviewed-by: Gautham R. Shenoy Signed-off-by: Perry Yuan Signed-off-by: Mario Limonciello --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 1216a0588ba8e..05e985ce9880d 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -474,6 +474,7 @@ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ #define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */ #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */ +#define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */ /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 307a917415343..1e54332594443 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -49,6 +49,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, + { X86_FEATURE_AMD_WORKLOAD_CLASS, CPUID_EAX, 22, 0x80000021, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 },