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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DS1PEPF00017095.mail.protection.outlook.com (10.167.17.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8230.7 via Frontend Transport; Fri, 6 Dec 2024 16:12:30 +0000 Received: from purico-9eb2host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 6 Dec 2024 10:12:29 -0600 From: Yazen Ghannam To: , , Tony Luck , Mario Limonciello , "Bjorn Helgaas" , Jean Delvare , "Guenter Roeck" , Clemens Ladisch , "Shyam Sundar S K" , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , "Naveen Krishna Chatradhi" , Suma Hegde CC: , , , , Subject: [PATCH v2 07/16] x86/amd_nb: Use topology info to get AMD node count Date: Fri, 6 Dec 2024 16:12:00 +0000 Message-ID: <20241206161210.163701-8-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241206161210.163701-1-yazen.ghannam@amd.com> References: <20241206161210.163701-1-yazen.ghannam@amd.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017095:EE_|SJ0PR12MB6807:EE_ X-MS-Office365-Filtering-Correlation-Id: 0e40a525-8bf7-4a33-acab-08dd1610c94d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|7416014|376014|921020; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Dec 2024 16:12:30.7983 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0e40a525-8bf7-4a33-acab-08dd1610c94d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017095.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6807 Currently, the total AMD node count is determined by searching and counting CPU/node devices using PCI IDs. However, AMD node information is already available through topology CPUID/MSRs. The recent topology rework has made this info easier to access. Replace the node counting code with a simple product of topology info. Signed-off-by: Yazen Ghannam --- Notes: Link: https://lore.kernel.org/20241023172150.659002-8-yazen.ghannam@amd.com v1->v2: * No change. arch/x86/include/asm/amd_node.h | 5 +++++ arch/x86/kernel/amd_nb.c | 11 ++--------- 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/x86/include/asm/amd_node.h b/arch/x86/include/asm/amd_node.h index 3f097dd479f8..419a0ad13ef2 100644 --- a/arch/x86/include/asm/amd_node.h +++ b/arch/x86/include/asm/amd_node.h @@ -25,4 +25,9 @@ struct pci_dev *amd_node_get_func(u16 node, u8 func); struct pci_dev *amd_node_get_root(u16 node); +static inline u16 amd_num_nodes(void) +{ + return topology_amd_nodes_per_pkg() * topology_max_packages(); +} + #endif /*_ASM_X86_AMD_NODE_H_*/ diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index 6218a0428c77..371e33abbdc1 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -186,7 +186,6 @@ static int amd_cache_northbridges(void) const struct pci_device_id *misc_ids = amd_nb_misc_ids; struct pci_dev *misc; struct amd_northbridge *nb; - u16 misc_count = 0; u16 i; if (amd_northbridges.num) @@ -196,19 +195,13 @@ static int amd_cache_northbridges(void) misc_ids = hygon_nb_misc_ids; } - misc = NULL; - while ((misc = next_northbridge(misc, misc_ids))) - misc_count++; - - if (!misc_count) - return -ENODEV; + amd_northbridges.num = amd_num_nodes(); - nb = kcalloc(misc_count, sizeof(struct amd_northbridge), GFP_KERNEL); + nb = kcalloc(amd_northbridges.num, sizeof(struct amd_northbridge), GFP_KERNEL); if (!nb) return -ENOMEM; amd_northbridges.nb = nb; - amd_northbridges.num = misc_count; misc = NULL; for (i = 0; i < amd_northbridges.num; i++) {