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Sat, 12 Apr 2025 02:19:09 -0700 From: Vadim Pasternak To: , CC: , , , , , "Vadim Pasternak" Subject: [PATCH platform-next v8 1/7] platform/mellanox: Rename field to improve code readability Date: Sat, 12 Apr 2025 12:18:37 +0300 Message-ID: <20250412091843.33943-2-vadimp@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20250412091843.33943-1-vadimp@nvidia.com> References: <20250412091843.33943-1-vadimp@nvidia.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00005FFE:EE_|PH7PR12MB7137:EE_ X-MS-Office365-Filtering-Correlation-Id: 090acfa4-223f-4c10-5798-08dd79a31a5e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: 0/Ej4/gjdpzY0bZu7jBfaIG9t4Cv0QPjjCNZnDctAWRWwBzV2QggrOfT/PMolymm395QYHSGkYDwG0oRsYXD++SR9Tp5fDj3YGZz1PRBrie1ZpAKpziJ+WrvvYW13Mpdt4619k6KuBijW/Fm7EIigVJeLTvz2kU/LOS/h3t+JM7aPrWSMyad8WvF9t/sWq98HKQM3VOjfGnUqewL2W8DSMoYg8dzP58mo4Dy7s53OIgQPGi1m5ys9j5FTeVveS7zYPUouyH6VNpP8ZIb7s/vcXz8sw1gOw0a5F+kWHW3d4e1SVl18qbzeH09KDXlGncNzkmIkIN6NnSe54jeHXWaqfxgvZFmj9SBJFObaR3wZ/X9Ijwu9WfhtGBMGgM2EoCkByf7e+tZcD6/fszknvrXZ0u6td1VnAmdrZx8krs1TlONRGEMzGIy+rOtEqI9leqgY2bdhMQpOEZr15bd5qZZuLlEL1Dsoy/5ozXJ4egts3jl9aHNyVbFi7MPDFHi/Iw6gg9T6LQeXVtqaJJHdKz/QXFVblRc8gHlvz5fjx95FYgwjF0Ic9I3IMEi5QBCDXeVoPUtIP39GVsXnRw83l2Q28p5x8YBWo+z+48gFQ7r//bX+kHifLpS7rgfrvHjPJMZF8qYFGixIcA7eoXDoHa4AAFOqAUaN+YhvztTwneRQb6EqVXvqcCMryxjrHulkAi6M0cYvhD4LaQSzLv6OUsft2Xsj+VFiC/rRIag4JrPFXOPrEs8txZAz98/O0o7LyG5JLvJdYrVQ5ltrJ13IGwtQLm21cHPcMBzD3tPGEJnauJcQbJ3QlLKjsmHcPd5hrmr0kZSDSZsjLptN5Qrp/BHGkAL20HSyVklE9DUDQQJz4EIyf31WELmJxKBjLybBLLEE46DYiBy2TU35C2n6uTwuCTi3USDyAzDp1Zbxc0sK7LygiucByEhJpHtvyPgYfz5LAtx1GGNrl4dQ68OJM986nXhnaI82qmcmHBHVCyPupgmXHh8vIDfSNWquFhEFKxW5YWWCQpazQIOufCaMyFFLhhh1uD0vp6Pi8hniEgogGedjwYesIXeiFqR+7Fx9SCJ+JeWy+PV+ZqnUVkNb8RPJiDqk0SgzYffOJ5q5jhSfsvcDXljvTCL7SfU1MUsytHoGzG8H65h9xCfcIYXJwEILSqsrk6KNOfryGrXpxeLWTsSGBVsD2eIgWM5NNdy1PDAHQ68jeupZhOCgAtzuXuslal+vOe8pQekIIInQHLTydOWUsE5dW3tY5+CZH8aiXCTncZusU+TjS73EVhxCbItCeA7PUhWLSD+kps2mJ9ZRT2mCkEzjkugeCzSU/f1lSNUb/e1UVUwrUChxCvJw49/J9jrsjz2WtJvBrTD7vHPgDoDIwfKQJgAxCT1+LYgJQdJ6VL2A0ORFVgllFxSSTcL/IS9Q96G1+ZXBvE6sXUi1qurIWud/T1k8jqJgVTP1Rux4f8uie5z5IDk0jfnODAyzWGObxXYH70mrCCx7V2kV9goxhl/uCKF9VjRHJyx5l82 X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Apr 2025 09:19:18.3624 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 090acfa4-223f-4c10-5798-08dd79a31a5e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00005FFE.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7137 Rename field 'counter' in 'mlxreg_core_hotplug_platform_data' to count. Signed-off-by: Vadim Pasternak --- v5->v6 - Fix commit text. Only structure 'mlxreg_core_hotplug_platform_data' was modified. Field 'counter' in structure 'mlxreg_core_platform_data' is not renamed, since this change will affect other drivers in different subsystems and it will complicate submission. v4->v5 Comments pointed out by Ilpo: - Fix misspelling in submit text. - Fix structures names to 'count'. --- drivers/platform/mellanox/mlx-platform.c | 26 +++++++++++----------- drivers/platform/mellanox/mlxreg-hotplug.c | 8 +++---- drivers/platform/mellanox/nvsw-sn2201.c | 2 +- include/linux/platform_data/mlxreg.h | 4 ++-- 4 files changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/platform/mellanox/mlx-platform.c b/drivers/platform/mellanox/mlx-platform.c index bd3bb06ff8f2..2334b740267c 100644 --- a/drivers/platform/mellanox/mlx-platform.c +++ b/drivers/platform/mellanox/mlx-platform.c @@ -852,7 +852,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_comex_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_data = { .items = mlxplat_mlxcpld_default_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_default_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -892,7 +892,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_default_wc_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_wc_data = { .items = mlxplat_mlxcpld_default_wc_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_wc_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_default_wc_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -902,7 +902,7 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_wc_data = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_comex_data = { .items = mlxplat_mlxcpld_comex_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_comex_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_comex_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_CARR_DEF, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRCX_OFFSET, @@ -949,7 +949,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_msn21xx_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn21xx_data = { .items = mlxplat_mlxcpld_msn21xx_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -1058,7 +1058,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_msn274x_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn274x_data = { .items = mlxplat_mlxcpld_msn274x_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -1105,7 +1105,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_msn201x_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn201x_data = { .items = mlxplat_mlxcpld_msn201x_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn201x_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_msn201x_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -1229,7 +1229,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_default_ng_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_ng_data = { .items = mlxplat_mlxcpld_default_ng_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -1389,7 +1389,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_ng800_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { .items = mlxplat_mlxcpld_ext_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_ext_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -1399,7 +1399,7 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ng800_data = { .items = mlxplat_mlxcpld_ng800_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_ng800_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_ng800_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -2240,7 +2240,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_modular_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_modular_data = { .items = mlxplat_mlxcpld_modular_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_MODULAR, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -2272,7 +2272,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_chassis_blade_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = { .items = mlxplat_mlxcpld_chassis_blade_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -2363,7 +2363,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_rack_switch_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_rack_switch_data = { .items = mlxplat_mlxcpld_rack_switch_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_rack_switch_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_rack_switch_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, @@ -2518,7 +2518,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_l1_switch_events_items[] = { static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_l1_switch_data = { .items = mlxplat_mlxcpld_l1_switch_events_items, - .counter = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_events_items), + .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_events_items), .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, diff --git a/drivers/platform/mellanox/mlxreg-hotplug.c b/drivers/platform/mellanox/mlxreg-hotplug.c index 0ce9fff1f7d4..550378c2881a 100644 --- a/drivers/platform/mellanox/mlxreg-hotplug.c +++ b/drivers/platform/mellanox/mlxreg-hotplug.c @@ -262,7 +262,7 @@ static int mlxreg_hotplug_attr_init(struct mlxreg_hotplug_priv_data *priv) item = pdata->items; /* Go over all kinds of items - psu, pwr, fan. */ - for (i = 0; i < pdata->counter; i++, item++) { + for (i = 0; i < pdata->count; i++, item++) { if (item->capability) { /* * Read group capability register to get actual number @@ -541,7 +541,7 @@ static void mlxreg_hotplug_work_handler(struct work_struct *work) goto unmask_event; /* Handle topology and health configuration changes. */ - for (i = 0; i < pdata->counter; i++, item++) { + for (i = 0; i < pdata->count; i++, item++) { if (aggr_asserted & item->aggr_mask) { if (item->health) mlxreg_hotplug_health_work_helper(priv, item); @@ -590,7 +590,7 @@ static int mlxreg_hotplug_set_irq(struct mlxreg_hotplug_priv_data *priv) pdata = dev_get_platdata(&priv->pdev->dev); item = pdata->items; - for (i = 0; i < pdata->counter; i++, item++) { + for (i = 0; i < pdata->count; i++, item++) { /* Clear group presense event. */ ret = regmap_write(priv->regmap, item->reg + MLXREG_HOTPLUG_EVENT_OFF, 0); @@ -674,7 +674,7 @@ static void mlxreg_hotplug_unset_irq(struct mlxreg_hotplug_priv_data *priv) 0); /* Clear topology configurations. */ - for (i = 0; i < pdata->counter; i++, item++) { + for (i = 0; i < pdata->count; i++, item++) { data = item->data; /* Mask group presense event. */ regmap_write(priv->regmap, data->reg + MLXREG_HOTPLUG_MASK_OFF, diff --git a/drivers/platform/mellanox/nvsw-sn2201.c b/drivers/platform/mellanox/nvsw-sn2201.c index abe7be602f84..451d64c35c23 100644 --- a/drivers/platform/mellanox/nvsw-sn2201.c +++ b/drivers/platform/mellanox/nvsw-sn2201.c @@ -517,7 +517,7 @@ static struct mlxreg_core_item nvsw_sn2201_items[] = { static struct mlxreg_core_hotplug_platform_data nvsw_sn2201_hotplug = { .items = nvsw_sn2201_items, - .counter = ARRAY_SIZE(nvsw_sn2201_items), + .count = ARRAY_SIZE(nvsw_sn2201_items), .cell = NVSW_SN2201_SYS_INT_STATUS_OFFSET, .mask = NVSW_SN2201_CPLD_AGGR_MASK_DEF, }; diff --git a/include/linux/platform_data/mlxreg.h b/include/linux/platform_data/mlxreg.h index 0b9f81a6f753..f6cca7a035c7 100644 --- a/include/linux/platform_data/mlxreg.h +++ b/include/linux/platform_data/mlxreg.h @@ -209,7 +209,7 @@ struct mlxreg_core_platform_data { * @items: same type components with the hotplug capability; * @irq: platform interrupt number; * @regmap: register map of parent device; - * @counter: number of the components with the hotplug capability; + * @count: number of the components with the hotplug capability; * @cell: location of top aggregation interrupt register; * @mask: top aggregation interrupt common mask; * @cell_low: location of low aggregation interrupt register; @@ -224,7 +224,7 @@ struct mlxreg_core_hotplug_platform_data { struct mlxreg_core_item *items; int irq; void *regmap; - int counter; + int count; u32 cell; u32 mask; u32 cell_low;