From patchwork Tue Jan 12 10:44:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= X-Patchwork-Id: 12013203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79AC2C433E0 for ; Tue, 12 Jan 2021 11:03:23 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F0F852310C for ; Tue, 12 Jan 2021 11:03:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F0F852310C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:35554 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kzHSL-0005Fr-To for qemu-devel@archiver.kernel.org; Tue, 12 Jan 2021 06:03:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52466) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kzHAN-0002tO-73; Tue, 12 Jan 2021 05:44:47 -0500 Received: from poy.remlab.net ([2001:41d0:2:5a1a::]:56696 helo=ns207790.ip-94-23-215.eu) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kzHAL-0003Az-1Q; Tue, 12 Jan 2021 05:44:46 -0500 Received: from basile.remlab.net (dzyqn8ypzhx7l91mxjsvy-3.rev.dnainternet.fi [IPv6:2001:14ba:a01a:be01:9434:f69e:d553:3be2]) (Authenticated sender: remi) by ns207790.ip-94-23-215.eu (Postfix) with ESMTPSA id C06225FCEF; Tue, 12 Jan 2021 11:44:41 +0100 (CET) From: =?iso-8859-1?q?R=E9mi?= Denis-Courmont To: qemu-arm@nongnu.org Subject: [PATCHv5 00/19] ARMv8.4-A Secure EL2 Date: Tue, 12 Jan 2021 12:44:39 +0200 Message-ID: <12681824.uLZWGnKmhe@basile.remlab.net> Organization: Huawei Technologies, Finland MIME-Version: 1.0 Received-SPF: pass client-ip=2001:41d0:2:5a1a::; envelope-from=remi@remlab.net; helo=ns207790.ip-94-23-215.eu X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi, This adds Secure EL2. Changes since version 4: - Fix NS unitialised in secure state stage 2 translation. - Remove EEL2 translation block flag in 32-bit mode. - Clarify comments on arm_is_el2_enabled(). ---------------------------------------------------------------- Rémi Denis-Courmont (19): target/arm: remove redundant tests target/arm: add arm_is_el2_enabled() helper target/arm: use arm_is_el2_enabled() where applicable target/arm: use arm_hcr_el2_eff() where applicable target/arm: factor MDCR_EL2 common handling target/arm: declare new AA64PFR0 bit-fields target/arm: add 64-bit S-EL2 to EL exception table target/arm: add MMU stage 1 for Secure EL2 target/arm: add ARMv8.4-SEL2 system registers target/arm: handle VMID change in secure state target/arm: do S1_ptw_translate() before address space lookup target/arm: translate NS bit in page-walks target/arm: generalize 2-stage page-walk condition target/arm: secure stage 2 translation regime target/arm: set HPFAR_EL2.NS on secure stage 2 faults target/arm: revector to run-time pick target EL target/arm: add ARMv8.4-SEL2 extension target/arm: enable Secure EL2 in max CPU target/arm: refactor vae1_tlbmask() target/arm/cpu-param.h | 2 +- target/arm/cpu.c | 10 +- target/arm/cpu.h | 90 ++++++++-- target/arm/cpu64.c | 1 + target/arm/helper-a64.c | 8 +- target/arm/helper.c | 414 ++++++++++++++++++++++++++++++--------------- target/arm/internals.h | 36 ++++ target/arm/op_helper.c | 4 +- target/arm/tlb_helper.c | 3 + target/arm/translate-a64.c | 4 + target/arm/translate.c | 35 +++- 11 files changed, 430 insertions(+), 177 deletions(-)