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[0/6] x86_iommu/amd: add interrupt remap support

Message ID 1536684589-11718-1-git-send-email-brijesh.singh@amd.com (mailing list archive)
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Series x86_iommu/amd: add interrupt remap support | expand

Message

Brijesh Singh Sept. 11, 2018, 4:49 p.m. UTC 
This series adds the interrupt remapping support for amd-iommu device.

IOMMU spec is available at: https://support.amd.com/TechDocs/48882_IOMMU.pdf

To enable the interrupt remap use below qemu cli
# $QEMU \
  -device amd-iommu,intremap=on

I have tested FC-28 and Ubuntu 18.04 guest. 

Linux guest bootup log shows the interrupt remap supports:

[root@localhost ~]# dmesg | grep -i AMD-Vi
[    0.001761] AMD-Vi: Using IVHD type 0x10
[    0.003051] AMD-Vi: device: 00:03.0 cap: 0040 seg: 0 flags: d1 info 0000
[    0.004007] AMD-Vi:        mmio-addr: 00000000fed80000
[    0.004874] AMD-Vi:   DEV_ALL                        flags: 00
[    0.006236] AMD-Vi:   DEV_SPECIAL(IOAPIC[0])         devid: 00:14.0
[    0.667943] AMD-Vi: Found IOMMU at 0000:00:03.0 cap 0x40
[    0.668727] AMD-Vi: Extended features (0x29d3):
[    0.669874] AMD-Vi: Interrupt remapping enabled
[    0.671074] AMD-Vi: Lazy IO/TLB flushing enabled

cat /proc/interrupts confirms that its using IR

[root@localhost ~]# cat /proc/interrupts 
CPU0       
 0:         40  IR-IO-APIC    2-edge      timer
 1:          9  IR-IO-APIC    1-edge      i8042
 4:       1770  IR-IO-APIC    4-edge      ttyS0
 7:          0  IR-IO-APIC    7-edge      parport0
 8:          1  IR-IO-APIC    8-edge      rtc0
 9:          0  IR-IO-APIC    9-fasteoi   acpi
12:         15  IR-IO-APIC   12-edge      i8042
16:          0  IR-IO-APIC   16-fasteoi   i801_smbus
24:          0   PCI-MSI 49152-edge      AMD-Vi
25:      13070  IR-PCI-MSI 512000-edge      ahci[0000:00:1f.2]
26:         86  IR-PCI-MSI 32768-edge      enp0s2-rx-0
27:        139  IR-PCI-MSI 32769-edge      enp0s2-tx-0
28:          1  IR-PCI-MSI 32770-edge      enp0s2
NMI:          0   Non-maskable interrupts
LOC:      26686   Local timer interrupts
SPU:          0   Spurious interrupts
...
...

Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>

Brijesh Singh (6):
  x86_iommu: move the kernel-irqchip check in common code
  x86_iommu/amd: Prepare for interrupt remap support
  x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled
  i386: acpi: add IVHD device entry for IOAPIC
  x86_iommu/amd: Add interrupt remap support when VAPIC is enabled
  x86_iommu/amd: Enable Guest virtual APIC support

 hw/i386/acpi-build.c  |  23 +++-
 hw/i386/amd_iommu.c   | 360 ++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/i386/amd_iommu.h   | 115 +++++++++++++++-
 hw/i386/intel_iommu.c |   7 -
 hw/i386/trace-events  |  14 ++
 hw/i386/x86-iommu.c   |   9 ++
 6 files changed, 516 insertions(+), 12 deletions(-)

Comments

Suthikulpanit, Suravee Sept. 13, 2018, 7:16 a.m. UTC | #1 
Brijesh,

On 9/11/18 11:49 PM, Brijesh Singh wrote:
> Emulate the interrupt remapping support when guest virtual APIC is
> enabled.
> 
> See IOMMU spec:https://support.amd.com/TechDocs/48882_IOMMU.pdf
> (section 2.2.5.2) for details information.
> 
> When VAPIC is enabled, it uses interrupt remapping as defined in
> Table 22 and Figure 17 from IOMMU spec.
> 
> Cc: "Michael S. Tsirkin"<mst@redhat.com>
> Cc: Paolo Bonzini<pbonzini@redhat.com>
> Cc: Richard Henderson<rth@twiddle.net>
> Cc: Eduardo Habkost<ehabkost@redhat.com>
> Cc: Marcel Apfelbaum<marcel.apfelbaum@gmail.com>
> Cc: Tom Lendacky<Thomas.Lendacky@amd.com>
> Cc: Suravee Suthikulpanit<Suravee.Suthikulpanit@amd.com>
> Signed-off-by: Brijesh Singh<brijesh.singh@amd.com>
> ---
>   hw/i386/amd_iommu.c  | 68 +++++++++++++++++++++++++++++++++++++++++++++++++++-
>   hw/i386/amd_iommu.h  | 38 +++++++++++++++++++++++++++++
>   hw/i386/trace-events |  2 ++
>   3 files changed, 107 insertions(+), 1 deletion(-)

The commit message here is incorrect and/or misleading.
The GASup bit is essentially allow 128-bit IRTE format.
The guest virtual APIC support is really GAMSup bit.

Thanks,
Suravee