Message ID | 1554383690-28338-1-git-send-email-mateja.marjanovic@rt-rk.com (mailing list archive) |
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Headers | show
Return-Path: <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org> Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 74D6817EE for <patchwork-qemu-devel@patchwork.kernel.org>; Thu, 4 Apr 2019 13:20:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5BE40286C0 for <patchwork-qemu-devel@patchwork.kernel.org>; Thu, 4 Apr 2019 13:20:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E005286D6; Thu, 4 Apr 2019 13:20:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D6750286C0 for <patchwork-qemu-devel@patchwork.kernel.org>; Thu, 4 Apr 2019 13:20:23 +0000 (UTC) Received: from localhost ([127.0.0.1]:54627 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org>) id 1hC2I2-000881-EJ for patchwork-qemu-devel@patchwork.kernel.org; Thu, 04 Apr 2019 09:20:22 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51319) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <mateja.marjanovic@rt-rk.com>) id 1hC2Du-00053N-Py for qemu-devel@nongnu.org; Thu, 04 Apr 2019 09:16:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <mateja.marjanovic@rt-rk.com>) id 1hC2Dp-0004eM-U9 for qemu-devel@nongnu.org; Thu, 04 Apr 2019 09:16:06 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:40225 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from <mateja.marjanovic@rt-rk.com>) id 1hC2Dp-0003GT-IY for qemu-devel@nongnu.org; Thu, 04 Apr 2019 09:16:01 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 5DC411A213D; Thu, 4 Apr 2019 15:14:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw310-lin.domain.local (rtrkw310-lin.domain.local [10.10.13.97]) by mail.rt-rk.com (Postfix) with ESMTPSA id 3E38C1A208E; Thu, 4 Apr 2019 15:14:57 +0200 (CEST) From: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> To: qemu-devel@nongnu.org Date: Thu, 4 Apr 2019 15:14:46 +0200 Message-Id: <1554383690-28338-1-git-send-email-mateja.marjanovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v6 0/4] target/mips: Optimize MSA interleave instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: arikalo@wavecomp.com, richard.henderson@linaro.org, philmd@redhat.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org> X-Virus-Scanned: ClamAV using ClamSMTP |
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target/mips: Optimize MSA interleave instructions
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From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com> Optimize MSA instructions ILVEV.<B|H|W|D>, ILVOD.<B|H|W|D>, ILVL.<B|H|W|D> and ILVR.<B|H|W|D> using the hybrid approach, MSA helpers in some cases and directly tcg registers in other cases, so the performance would be better. v6: - Add ILVL.<B|H|W|D> and ILVR.<B|H|W|D> MSA instructions with mixed approaches (with helpers and with tcg registers). - Test the performance for ILVL.<B|H|W|D> and ILVR.<B|H|W|D> MSA instructions, with helpers, with tcg and with the mixed approach. - Use a tcg register instead of an int variable for storing a constant value of the mask (for logic operations). - Eliminate some unnecessary tcg_gen calls. - Changes in commit messages and the cover letter. v5: - Use tcg_gen_deposit function. - Added performance number for no-deposit and with-deposit cases of ILVEV.W. - Minor changes in commit messages and the cover letter. v4: - Clean up typing errors. - Change the commit message and the cover letter. - Fix bug for ILVEV.D, in case where the destination and one of the sources are the same register. v3: - Reduce the number of logic operations to a minimum. - Add comments. v2: - Minor changes in commit messages and the cover letter. Mateja Marjanovic (4): target/mips: Optimize ILVOD.<B|H|W|D> MSA instructions target/mips: Optimize ILVEV.<B|H|W|D> MSA instructions target/mips: Optimize ILVL.<B|H|W|D> MSA instructions target/mips: Optimize ILVR.<B|H|W|D> MSA instructions target/mips/helper.h | 7 +- target/mips/msa_helper.c | 82 +++++--- target/mips/translate.c | 498 ++++++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 547 insertions(+), 40 deletions(-)