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[v2,0/4] target/mips: Misc MIPS fixes and improvements for 5.0

Message ID 1576836531-2392-1-git-send-email-aleksandar.markovic@rt-rk.com (mailing list archive)
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Series target/mips: Misc MIPS fixes and improvements for 5.0 | expand

Message

Aleksandar Markovic Dec. 20, 2019, 10:08 a.m. UTC 
From: Aleksandar Markovic <amarkovic@wavecomp.com>

This series contains a variety of fixes and improvements for
target MIPS.

Aleksandar Markovic (2):
  target/mips: Rectify documentation on deprecating r4k machine
  target/mips: Add support for MIPS<32|64>R6 CRC32 ISA

Yongbok Kim (2):
  target/mips: Amend CP0 WatchHi register implementation
  target/mips: Add implementation of GINVT instruction

 disas/mips.c            |  10 +++
 qemu-deprecated.texi    |   2 +-
 target/mips/cpu.h       |   4 +-
 target/mips/helper.c    |  20 ++++-
 target/mips/helper.h    |   7 ++
 target/mips/internal.h  |   1 +
 target/mips/machine.c   |   6 +-
 target/mips/op_helper.c | 171 +++++++++++++++++++++++++++++++++-----
 target/mips/translate.c | 215 +++++++++++++++++++++++++++++++++++++++++++++++-
 9 files changed, 402 insertions(+), 34 deletions(-)