[v3,0/5] target/mips: Misc MIPS fixes and improvements for 5.0

Message

Aleksandar Markovic Jan. 21, 2020, 1:38 p.m. UTC

From: Aleksandar Markovic <[e-mail]>

This series contains a variety of fixes and improvements for
target MIPS.

v2->v3:

    - added micromips R6 disassembler

Aleksandar Markovic (3):
  target/mips: Rectify documentation on deprecating r4k machine
  target/mips: Add support for MIPS<32|64>R6 CRC32 ISA
  disas: mips: Add micromips R6 disassembler

Yongbok Kim (2):
  target/mips: Amend CP0 WatchHi register implementation
  target/mips: Add implementation of GINVT instruction

 disas/Makefile.objs     |    1 +
 disas/micromips_r6.c    | 5669 +++++++++++++++++++++++++++++++++++++++++++++++
 disas/mips.c            |   10 +
 include/disas/dis-asm.h |    1 +
 qemu-deprecated.texi    |    2 +-
 target/mips/cpu.c       |    4 +
 target/mips/cpu.h       |    4 +-
 target/mips/helper.c    |   20 +-
 target/mips/helper.h    |    7 +
 target/mips/internal.h  |    1 +
 target/mips/machine.c   |    6 +-
 target/mips/op_helper.c |  171 +-
 target/mips/translate.c |  215 +-
 13 files changed, 6077 insertions(+), 34 deletions(-)
 create mode 100644 disas/micromips_r6.c

Comments

[e-mail] Jan. 21, 2020, 3:31 p.m. UTC | #1

Patchew URL: https://patchew.org/QEMU/[e-mail]/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: [e-mail]
Subject: [PATCH v3 0/5] target/mips: Misc MIPS fixes and improvements for 5.0

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/[e-mail] -> patchew/[e-mail]
Switched to a new branch 'test'
af60c76 disas: mips: Add micromips R6 disassembler
bcb85b1 target/mips: Add implementation of GINVT instruction
1ffd785 target/mips: Amend CP0 WatchHi register implementation
fed74b1 target/mips: Add support for MIPS<32|64>R6 CRC32 ISA
868e28b target/mips: Rectify documentation on deprecating r4k machine

=== OUTPUT BEGIN ===
1/5 Checking commit 868e28b14a58 (target/mips: Rectify documentation on deprecating r4k machine)
2/5 Checking commit fed74b114541 (target/mips: Add support for MIPS<32|64>R6 CRC32 ISA)
3/5 Checking commit 1ffd785201f7 (target/mips: Amend CP0 WatchHi register implementation)
4/5 Checking commit bcb85b11ec7d (target/mips: Add implementation of GINVT instruction)
5/5 Checking commit af60c76c7db1 (disas: mips: Add micromips R6 disassembler)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: space prohibited between function name and open parenthesis '('
#5716: FILE: include/disas/dis-asm.h:392:
+int print_insn_micromips_r6      (bfd_vma, disassemble_info*);

total: 1 errors, 1 warnings, 5693 lines checked

Patch 5/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/[e-mail]/testing.checkpatch/?type=message.
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