From patchwork Mon Oct 22 17:35:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 10652305 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4698A1815 for ; Mon, 22 Oct 2018 17:39:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 46BB12913F for ; Mon, 22 Oct 2018 17:39:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3790729144; Mon, 22 Oct 2018 17:39:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FROM,FSL_HELO_FAKE,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C32652913F for ; Mon, 22 Oct 2018 17:39:38 +0000 (UTC) Received: from localhost ([::1]:36423 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEeB0-0008H6-5j for patchwork-qemu-devel@patchwork.kernel.org; Mon, 22 Oct 2018 13:39:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52323) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEe7b-0005su-JL for qemu-devel@nongnu.org; Mon, 22 Oct 2018 13:36:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gEe7Y-0002Tm-D4 for qemu-devel@nongnu.org; Mon, 22 Oct 2018 13:36:07 -0400 Received: from mail-lf1-x142.google.com ([2a00:1450:4864:20::142]:40167) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gEe7Y-0002Sf-3i; Mon, 22 Oct 2018 13:36:04 -0400 Received: by mail-lf1-x142.google.com with SMTP id n3-v6so4205846lfe.7; Mon, 22 Oct 2018 10:36:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=/AbcxCeMAc1cfai+vFAtEsOUQ/38xXGm1I7PN7mkYZY=; b=BU+cGjwe36BkOAFdpogbDz5KZdn5lJqT/VQAxVgNMSkMRCpCnBfFyYxsRwxUifCdx+ wcDMT7bk5ZpSx2Wx6WYqaeNzv6SdmtFKrX4eF05nuJ/kKsdEUF6CLr8scMVQSgfICPoj phrxnPpkmQhIVR+Vr4FNskFeTkLn4PrIwW5SchJAvchQ7NOgu2QwZDpRNNwkNgjr32ah YqKy2TepJsQB5sAHEoxreSjLgzZqsrlpZHAQK45P6GfMmZ1PiVtHQNipbdoreu0TPhfD hvUvcvHmXNDM9D+/rE64KNLxM1LF/oEszxLFLKS362iRtDKxpKuQ+LgJ01q8FVS9kiNw olmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=/AbcxCeMAc1cfai+vFAtEsOUQ/38xXGm1I7PN7mkYZY=; b=od+Kniu321IV08OjrIPL1acz9bRsBEXwYVt8Z8zmYppqMBYq0ifKeSQ4G/Cn0yLrzr SG+2BgYAW1MfUoyTApG0eptnP/sD06A/okMhdRc8rCyXahI4H79kSQ44OFaBZCv98TSw hz4ohY/oZPW8Bk0+pMM35EkRqdl0LGf7/NGOFuuQXSAKMWCaL/fNDkq77dXBs/ami7en 2yCxCLrpwD0zairB5JGrMS+wLzQh3eGLlK6kPZqsAJppfW3G12NaC+cxigiFfpntap4q 24fBHe9D2vEDk+a3qPAWl5Y8vz3/tYtb9IctP/FsQh9IivA937YT0mXVzckBsUvgj9lq WmuA== X-Gm-Message-State: ABuFfohwOlu48ID7UqZEODQOMPclFEDZMp+hIgv6HcC4nxL59xxm89+w PEpOldtGU1UvY5j2OzjnWobpGdXN X-Google-Smtp-Source: ACcGV63t/PPgKBPjAO5pXqjecIj4Z/+XYeYI+0yjah7K1EvwV379AFAHhJDMg8JzagRqqOo1w/CiwQ== X-Received: by 2002:a19:8c1a:: with SMTP id o26-v6mr9772304lfd.90.1540229761837; Mon, 22 Oct 2018 10:36:01 -0700 (PDT) Received: from gmail.com (81-231-232-130-no39.tbcn.telia.com. [81.231.232.130]) by smtp.gmail.com with ESMTPSA id b64-v6sm7180035ljf.0.2018.10.22.10.36.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Oct 2018 10:36:00 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Mon, 22 Oct 2018 19:35:55 +0200 Message-Id: <20181022173559.17111-1-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::142 Subject: [Qemu-devel] [PATCH v4 0/4] arm: Add first models of Xilinx Versal SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: figlesia@xilinx.com, peter.maydell@linaro.org, sstabellini@kernel.org, edgar.iglesias@xilinx.com, sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com, alistair@alistair23.me, richard.henderson@linaro.org, frederic.konrad@adacore.com, philmd@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: "Edgar E. Iglesias" This patch series adds initial support for Xilinx's Versal SoC. Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. More info can be found here: https://www.xilinx.com/news/press/2018/xilinx-unveils-versal-the-first-in-a-new-category-of-platforms-delivering-rapid-innovation-with-software-programmability-and-scalable-ai-inference.html In QEMU we'd like to have a virtual developer board with the Versal SoC and a selected set of peripherals under the control of QEMU. We'd like to gradually extend this board as QEMU gains more support for Versal hardware components. QEMU will generate a device-tree describing only the components it supports and includes in the virtual dev board. Before adding Versal support, this series starts with a few fixes to the GEM that I ran into when running recent kernels on the Versal and ZynqMP models. I also noticed a problem with HVC insns not being enabled when using QEMU's PSCI implementation on CPU's with EL2 and EL3 enabled. This causes problems for Linux/KVM guests, also fixed in this series. Best regards, Edgar ChangeLog: v3 -> v4: * Improve error handling for CPU and GIC creation * Remove KVM checks in GIC creation v2 -> v3: * Fix DESCONF6 queue mask generation for GEMs with only one queue. v1 -> v2: * Spell out OCM as On Chip Memory * apperture -> aperture * Remove copy+pasted virt board comment * Remove VMSD for Versal SoC (with a comment on why it's not needed) * Embedd AddressSpace dma object in GEM * Remove debug left-overs in arm-powerctl * Enable PMU in Cortex-A72 * Rename cortex_a57_a53_cp_reginfo -> cortex_a72_a57_a53_cp_reginfo Edgar E. Iglesias (4): net: cadence_gem: Announce availability of priority queues net: cadence_gem: Announce 64bit addressing support hw/arm: versal: Add a model of Xilinx Versal SoC hw/arm: versal: Add a virtual Xilinx Versal board default-configs/aarch64-softmmu.mak | 1 + hw/arm/Makefile.objs | 1 + hw/arm/xlnx-versal-virt.c | 494 ++++++++++++++++++++++++++++ hw/arm/xlnx-versal.c | 323 ++++++++++++++++++ hw/net/cadence_gem.c | 9 +- include/hw/arm/xlnx-versal.h | 122 +++++++ 6 files changed, 949 insertions(+), 1 deletion(-) create mode 100644 hw/arm/xlnx-versal-virt.c create mode 100644 hw/arm/xlnx-versal.c create mode 100644 include/hw/arm/xlnx-versal.h