From patchwork Fri Mar 1 11:53:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 10834995 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 166F3922 for ; Fri, 1 Mar 2019 11:56:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 048D22CC41 for ; Fri, 1 Mar 2019 11:56:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EC4922CDA1; Fri, 1 Mar 2019 11:56:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7246E2CC41 for ; Fri, 1 Mar 2019 11:56:02 +0000 (UTC) Received: from localhost ([127.0.0.1]:36170 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzgll-0004LM-20 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 06:56:01 -0500 Received: from eggs.gnu.org ([209.51.188.92]:39669) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzgk8-0002iB-HF for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:54:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzgk7-00068s-BN for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:54:20 -0500 Received: from mx1.redhat.com ([209.132.183.28]:56932) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gzgk7-00067v-1U; Fri, 01 Mar 2019 06:54:19 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1BAD330A2216; Fri, 1 Mar 2019 11:54:18 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-149.ams2.redhat.com [10.36.117.149]) by smtp.corp.redhat.com (Postfix) with ESMTP id AD8E45C1B5; Fri, 1 Mar 2019 11:54:14 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 12:53:41 +0100 Message-Id: <20190301115413.27153-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 01 Mar 2019 11:54:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 00/32] s390x/tcg: Vector Instruction Support Part 1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , David Hildenbrand , Thomas Huth , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is the first part of vector instruction support for s390x. Parts will be sent and reviewed piece by piece. Part 1: Vector Support Instructions Part 2: Vector Integer Instructions Part 3: Vector String Instructions Part 4: Vector Floating-Point Instructions The current state can be found at (kept updated): https://github.com/davidhildenbrand/qemu/tree/vx It is based on https://github.com/cohuck/qemu/tree/s390-next To make use of vector instructions on my branch, make sure to specify "-cpu max" for now. With the current state I can boot Linux kernel + user space compiled with SIMD support. This allows to boot distributions compiled exclusively for z13, requiring SIMD support. Also, I have a growing set of tests for kvm-unit-tests and tests/tcg which I cross-test on a real s390x system. In this part, the basic infrastructure and all Vector Support Instructions introduced with the "Vector Facility" are added. The Vector Extension Facilities are not considered for now. We make use of the existing gvec expansion + ool (out-of-line) support. This will be heavily used especially for part 2 (Integer Instructions) where we can actually reuse quite some existing gvec expansions. v1 -> v2: - Basically address all wonderful review comments from Richard (too many to name them all) - Probe write access to get rid of FIXMEs - Heavily rework "s390x/tcg: Implement VECTOR PACK *" -- Process cc and !cc separately. -- Helper for VPK - Don't use a temporary vector register (for now) - Drop load_vec_element() and store_vec_element() - Use ES_* instead of MO_*, will come in handy when we use ES_128 later - .... many many other minor things David Hildenbrand (32): s390x/tcg: Define vector instruction formats s390x/tcg: Check vector register instructions at central point s390x/tcg: Utilities for vector instruction helpers s390x/tcg: Implement VECTOR GATHER ELEMENT s390x/tcg: Implement VECTOR GENERATE BYTE MASK s390x/tcg: Implement VECTOR GENERATE MASK s390x/tcg: Implement VECTOR LOAD s390x/tcg: Implement VECTOR LOAD AND REPLICATE s390x/tcg: Implement VECTOR LOAD ELEMENT s390x/tcg: Implement VECTOR LOAD ELEMENT IMMEDIATE s390x/tcg: Implement VECTOR LOAD GR FROM VR ELEMENT s390x/tcg: Implement VECTOR LOAD LOGICAL ELEMENT AND ZERO s390x/tcg: Implement VECTOR LOAD MULTIPLE s390x/tcg: Implement VECTOR LOAD TO BLOCK BOUNDARY s390x/tcg: Implement VECTOR LOAD VR ELEMENT FROM GR s390x/tcg: Implement VECTOR LOAD VR FROM GRS DISJOINT s390x/tcg: Implement VECTOR LOAD WITH LENGTH s390x/tcg: Implement VECTOR MERGE (HIGH|LOW) s390x/tcg: Implement VECTOR PACK * s390x/tcg: Implement VECTOR PERMUTE s390x/tcg: Implement VECTOR PERMUTE DOUBLEWORD IMMEDIATE s390x/tcg: Implement VECTOR REPLICATE s390x/tcg: Implement VECTOR REPLICATE IMMEDIATE s390x/tcg: Implement VECTOR SCATTER ELEMENT s390x/tcg: Implement VECTOR SELECT s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORD s390x/tcg: Provide probe_write helper s390x/tcg: Implement VECTOR STORE s390x/tcg: Implement VECTOR STORE ELEMENT s390x/tcg: Implement VECTOR STORE MULTIPLE s390x/tcg: Implement VECTOR STORE WITH LENGTH s390x/tcg: Implement VECTOR UNPACK * target/s390x/Makefile.objs | 1 + target/s390x/cpu.h | 7 + target/s390x/helper.h | 21 + target/s390x/insn-data.def | 82 +++ target/s390x/insn-format.def | 25 + target/s390x/internal.h | 2 + target/s390x/mem_helper.c | 21 + target/s390x/translate.c | 61 ++- target/s390x/translate_vx.inc.c | 931 ++++++++++++++++++++++++++++++++ target/s390x/vec.h | 31 ++ target/s390x/vec_helper.c | 268 +++++++++ 11 files changed, 1449 insertions(+), 1 deletion(-) create mode 100644 target/s390x/translate_vx.inc.c create mode 100644 target/s390x/vec.h create mode 100644 target/s390x/vec_helper.c